Lines Matching full:nand
13 * Derived from drivers/mtd/nand/autcpu12.c (removed in v3.8)
24 * (u-boot-1.1.5/board/atmel/at91sam9263ek/nand.c)
30 * Add Nand Flash Controller support for SAMA5 SoC
201 struct atmel_nand *nand);
203 int (*setup_interface)(struct atmel_nand *nand, int csline,
205 int (*exec_op)(struct atmel_nand *nand,
337 dev_err(nc->base.dev, "Waiting NAND R/B Timeout\n"); in atmel_nfc_wait()
462 "Failed to send NAND command (err = %d)!", in atmel_nfc_exec_op()
471 static void atmel_nand_data_in(struct atmel_nand *nand, void *buf, in atmel_nand_data_in() argument
476 nc = to_nand_controller(nand->base.controller); in atmel_nand_data_in()
485 !atmel_nand_dma_transfer(nc, buf, nand->activecs->io.dma, len, in atmel_nand_data_in()
489 if ((nand->base.options & NAND_BUSWIDTH_16) && !force_8bit) in atmel_nand_data_in()
490 ioread16_rep(nand->activecs->io.virt, buf, len / 2); in atmel_nand_data_in()
492 ioread8_rep(nand->activecs->io.virt, buf, len); in atmel_nand_data_in()
495 static void atmel_nand_data_out(struct atmel_nand *nand, const void *buf, in atmel_nand_data_out() argument
500 nc = to_nand_controller(nand->base.controller); in atmel_nand_data_out()
509 !atmel_nand_dma_transfer(nc, (void *)buf, nand->activecs->io.dma, in atmel_nand_data_out()
513 if ((nand->base.options & NAND_BUSWIDTH_16) && !force_8bit) in atmel_nand_data_out()
514 iowrite16_rep(nand->activecs->io.virt, buf, len / 2); in atmel_nand_data_out()
516 iowrite8_rep(nand->activecs->io.virt, buf, len); in atmel_nand_data_out()
519 static int atmel_nand_waitrdy(struct atmel_nand *nand, unsigned int timeout_ms) in atmel_nand_waitrdy() argument
521 if (nand->activecs->rb.type == ATMEL_NAND_NO_RB) in atmel_nand_waitrdy()
522 return nand_soft_waitrdy(&nand->base, timeout_ms); in atmel_nand_waitrdy()
524 return nand_gpio_waitrdy(&nand->base, nand->activecs->rb.gpio, in atmel_nand_waitrdy()
528 static int atmel_hsmc_nand_waitrdy(struct atmel_nand *nand, in atmel_hsmc_nand_waitrdy() argument
534 if (nand->activecs->rb.type != ATMEL_NAND_NATIVE_RB) in atmel_hsmc_nand_waitrdy()
535 return atmel_nand_waitrdy(nand, timeout_ms); in atmel_hsmc_nand_waitrdy()
537 nc = to_hsmc_nand_controller(nand->base.controller); in atmel_hsmc_nand_waitrdy()
538 mask = ATMEL_HSMC_NFC_SR_RBEDGE(nand->activecs->rb.id); in atmel_hsmc_nand_waitrdy()
544 static void atmel_nand_select_target(struct atmel_nand *nand, in atmel_nand_select_target() argument
547 nand->activecs = &nand->cs[cs]; in atmel_nand_select_target()
550 static void atmel_hsmc_nand_select_target(struct atmel_nand *nand, in atmel_hsmc_nand_select_target() argument
553 struct mtd_info *mtd = nand_to_mtd(&nand->base); in atmel_hsmc_nand_select_target()
559 nand->activecs = &nand->cs[cs]; in atmel_hsmc_nand_select_target()
560 nc = to_hsmc_nand_controller(nand->base.controller); in atmel_hsmc_nand_select_target()
573 static int atmel_smc_nand_exec_instr(struct atmel_nand *nand, in atmel_smc_nand_exec_instr() argument
579 nc = to_nand_controller(nand->base.controller); in atmel_smc_nand_exec_instr()
583 nand->activecs->io.virt + nc->caps->cle_offs); in atmel_smc_nand_exec_instr()
588 nand->activecs->io.virt + nc->caps->ale_offs); in atmel_smc_nand_exec_instr()
591 atmel_nand_data_in(nand, instr->ctx.data.buf.in, in atmel_smc_nand_exec_instr()
596 atmel_nand_data_out(nand, instr->ctx.data.buf.out, in atmel_smc_nand_exec_instr()
601 return atmel_nand_waitrdy(nand, in atmel_smc_nand_exec_instr()
610 static int atmel_smc_nand_exec_op(struct atmel_nand *nand, in atmel_smc_nand_exec_op() argument
620 atmel_nand_select_target(nand, op->cs); in atmel_smc_nand_exec_op()
621 gpiod_set_value(nand->activecs->csgpio, 0); in atmel_smc_nand_exec_op()
623 ret = atmel_smc_nand_exec_instr(nand, &op->instrs[i]); in atmel_smc_nand_exec_op()
627 gpiod_set_value(nand->activecs->csgpio, 1); in atmel_smc_nand_exec_op()
635 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_hsmc_exec_cmd_addr() local
641 nc->op.cs = nand->activecs->id; in atmel_hsmc_exec_cmd_addr()
664 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_hsmc_exec_rw() local
667 atmel_nand_data_in(nand, instr->ctx.data.buf.in, in atmel_hsmc_exec_rw()
671 atmel_nand_data_out(nand, instr->ctx.data.buf.out, in atmel_hsmc_exec_rw()
682 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_hsmc_exec_waitrdy() local
684 return atmel_hsmc_nand_waitrdy(nand, instr->ctx.waitrdy.timeout_ms); in atmel_hsmc_exec_waitrdy()
700 static int atmel_hsmc_nand_exec_op(struct atmel_nand *nand, in atmel_hsmc_nand_exec_op() argument
707 return nand_op_parser_exec_op(&nand->base, in atmel_hsmc_nand_exec_op()
710 atmel_hsmc_nand_select_target(nand, op->cs); in atmel_hsmc_nand_exec_op()
711 ret = nand_op_parser_exec_op(&nand->base, &atmel_hsmc_op_parser, op, in atmel_hsmc_nand_exec_op()
790 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_pmecc_enable() local
799 ret = atmel_pmecc_enable(nand->pmecc, op); in atmel_nand_pmecc_enable()
809 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_pmecc_disable() local
812 atmel_pmecc_disable(nand->pmecc); in atmel_nand_pmecc_disable()
817 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_pmecc_generate_eccbytes() local
829 ret = atmel_pmecc_wait_rdy(nand->pmecc); in atmel_nand_pmecc_generate_eccbytes()
832 "Failed to transfer NAND page data (err = %d)\n", in atmel_nand_pmecc_generate_eccbytes()
841 atmel_pmecc_get_generated_eccbytes(nand->pmecc, i, in atmel_nand_pmecc_generate_eccbytes()
852 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_pmecc_correct_data() local
864 ret = atmel_pmecc_wait_rdy(nand->pmecc); in atmel_nand_pmecc_correct_data()
867 "Failed to read NAND page data (err = %d)\n", in atmel_nand_pmecc_correct_data()
877 ret = atmel_pmecc_correct_sector(nand->pmecc, i, databuf, in atmel_nand_pmecc_correct_data()
879 if (ret < 0 && !atmel_pmecc_correct_erased_chunks(nand->pmecc)) in atmel_nand_pmecc_correct_data()
905 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_pmecc_write_pg() local
918 atmel_pmecc_disable(nand->pmecc); in atmel_nand_pmecc_write_pg()
987 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_hsmc_nand_pmecc_write_pg() local
991 atmel_hsmc_nand_select_target(nand, chip->cur_cs); in atmel_hsmc_nand_pmecc_write_pg()
999 nc->op.cs = nand->activecs->id; in atmel_hsmc_nand_pmecc_write_pg()
1010 "Failed to transfer NAND page data (err = %d)\n", in atmel_hsmc_nand_pmecc_write_pg()
1048 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_hsmc_nand_pmecc_read_pg() local
1052 atmel_hsmc_nand_select_target(nand, chip->cur_cs); in atmel_hsmc_nand_pmecc_read_pg()
1056 * Optimized read page accessors only work when the NAND R/B pin is in atmel_hsmc_nand_pmecc_read_pg()
1060 if (nand->activecs->rb.type != ATMEL_NAND_NATIVE_RB) in atmel_hsmc_nand_pmecc_read_pg()
1070 nc->op.cs = nand->activecs->id; in atmel_hsmc_nand_pmecc_read_pg()
1081 "Failed to load NAND page data (err = %d)\n", in atmel_hsmc_nand_pmecc_read_pg()
1116 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_pmecc_init() local
1167 nand->pmecc = atmel_pmecc_create_user(nc->pmecc, &req); in atmel_nand_pmecc_init()
1168 if (IS_ERR(nand->pmecc)) in atmel_nand_pmecc_init()
1169 return PTR_ERR(nand->pmecc); in atmel_nand_pmecc_init()
1239 static int atmel_smc_nand_prepare_smcconf(struct atmel_nand *nand, in atmel_smc_nand_prepare_smcconf() argument
1247 nc = to_nand_controller(nand->base.controller); in atmel_smc_nand_prepare_smcconf()
1278 * The write setup timing depends on the operation done on the NAND. in atmel_smc_nand_prepare_smcconf()
1301 * operation done on the NAND: in atmel_smc_nand_prepare_smcconf()
1328 * transfer to the NAND. The only way to guarantee that is to have the in atmel_smc_nand_prepare_smcconf()
1340 * operation done on the NAND: in atmel_smc_nand_prepare_smcconf()
1357 * Just take the max value in this case and hope that the NAND is more in atmel_smc_nand_prepare_smcconf()
1398 * transfer from the NAND. The only way to guarantee that is to have in atmel_smc_nand_prepare_smcconf()
1459 if (nand->base.options & NAND_BUSWIDTH_16) in atmel_smc_nand_prepare_smcconf()
1469 static int atmel_smc_nand_setup_interface(struct atmel_nand *nand, in atmel_smc_nand_setup_interface() argument
1478 nc = to_nand_controller(nand->base.controller); in atmel_smc_nand_setup_interface()
1480 ret = atmel_smc_nand_prepare_smcconf(nand, conf, &smcconf); in atmel_smc_nand_setup_interface()
1487 cs = &nand->cs[csline]; in atmel_smc_nand_setup_interface()
1494 static int atmel_hsmc_nand_setup_interface(struct atmel_nand *nand, in atmel_hsmc_nand_setup_interface() argument
1503 nc = to_hsmc_nand_controller(nand->base.controller); in atmel_hsmc_nand_setup_interface()
1505 ret = atmel_smc_nand_prepare_smcconf(nand, conf, &smcconf); in atmel_hsmc_nand_setup_interface()
1512 cs = &nand->cs[csline]; in atmel_hsmc_nand_setup_interface()
1527 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_setup_interface() local
1535 nc = to_nand_controller(nand->base.controller); in atmel_nand_setup_interface()
1537 if (csline >= nand->numcs || in atmel_nand_setup_interface()
1541 return nc->caps->ops->setup_interface(nand, csline, conf); in atmel_nand_setup_interface()
1548 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_exec_op() local
1551 nc = to_nand_controller(nand->base.controller); in atmel_nand_exec_op()
1553 return nc->caps->ops->exec_op(nand, op, check_only); in atmel_nand_exec_op()
1557 struct atmel_nand *nand) in atmel_nand_init() argument
1559 struct nand_chip *chip = &nand->base; in atmel_nand_init()
1563 nand->base.controller = &nc->base; in atmel_nand_init()
1581 struct atmel_nand *nand) in atmel_smc_nand_init() argument
1583 struct nand_chip *chip = &nand->base; in atmel_smc_nand_init()
1587 atmel_nand_init(nc, nand); in atmel_smc_nand_init()
1593 /* Attach the CS to the NAND Flash logic. */ in atmel_smc_nand_init()
1594 for (i = 0; i < nand->numcs; i++) in atmel_smc_nand_init()
1597 BIT(nand->cs[i].id), BIT(nand->cs[i].id)); in atmel_smc_nand_init()
1606 static int atmel_nand_controller_remove_nand(struct atmel_nand *nand) in atmel_nand_controller_remove_nand() argument
1608 struct nand_chip *chip = &nand->base; in atmel_nand_controller_remove_nand()
1617 list_del(&nand->node); in atmel_nand_controller_remove_nand()
1626 struct atmel_nand *nand; in atmel_nand_create() local
1637 nand = devm_kzalloc(nc->dev, struct_size(nand, cs, numcs), GFP_KERNEL); in atmel_nand_create()
1638 if (!nand) in atmel_nand_create()
1641 nand->numcs = numcs; in atmel_nand_create()
1644 "det", GPIOD_IN, "nand-det"); in atmel_nand_create()
1653 nand->cdgpio = gpio; in atmel_nand_create()
1674 nand->cs[i].id = val; in atmel_nand_create()
1676 nand->cs[i].io.dma = res.start; in atmel_nand_create()
1677 nand->cs[i].io.virt = devm_ioremap_resource(nc->dev, &res); in atmel_nand_create()
1678 if (IS_ERR(nand->cs[i].io.virt)) in atmel_nand_create()
1679 return ERR_CAST(nand->cs[i].io.virt); in atmel_nand_create()
1685 nand->cs[i].rb.type = ATMEL_NAND_NATIVE_RB; in atmel_nand_create()
1686 nand->cs[i].rb.id = val; in atmel_nand_create()
1691 "nand-rb"); in atmel_nand_create()
1700 nand->cs[i].rb.type = ATMEL_NAND_GPIO_RB; in atmel_nand_create()
1701 nand->cs[i].rb.gpio = gpio; in atmel_nand_create()
1708 "nand-cs"); in atmel_nand_create()
1717 nand->cs[i].csgpio = gpio; in atmel_nand_create()
1720 nand_set_flash_node(&nand->base, np); in atmel_nand_create()
1722 return nand; in atmel_nand_create()
1727 struct atmel_nand *nand) in atmel_nand_controller_add_nand() argument
1729 struct nand_chip *chip = &nand->base; in atmel_nand_controller_add_nand()
1733 /* No card inserted, skip this NAND. */ in atmel_nand_controller_add_nand()
1734 if (nand->cdgpio && gpiod_get_value(nand->cdgpio)) { in atmel_nand_controller_add_nand()
1739 nc->caps->ops->nand_init(nc, nand); in atmel_nand_controller_add_nand()
1741 ret = nand_scan(chip, nand->numcs); in atmel_nand_controller_add_nand()
1743 dev_err(nc->dev, "NAND scan failed: %d\n", ret); in atmel_nand_controller_add_nand()
1754 list_add_tail(&nand->node, &nc->chips); in atmel_nand_controller_add_nand()
1762 struct atmel_nand *nand, *tmp; in atmel_nand_controller_remove_nands() local
1765 list_for_each_entry_safe(nand, tmp, &nc->chips, node) { in atmel_nand_controller_remove_nands()
1766 ret = atmel_nand_controller_remove_nand(nand); in atmel_nand_controller_remove_nands()
1779 struct atmel_nand *nand; in atmel_nand_controller_legacy_add_nands() local
1784 * Legacy bindings only allow connecting a single NAND with a unique CS in atmel_nand_controller_legacy_add_nands()
1787 nand = devm_kzalloc(nc->dev, sizeof(*nand) + sizeof(*nand->cs), in atmel_nand_controller_legacy_add_nands()
1789 if (!nand) in atmel_nand_controller_legacy_add_nands()
1792 nand->numcs = 1; in atmel_nand_controller_legacy_add_nands()
1794 nand->cs[0].io.virt = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in atmel_nand_controller_legacy_add_nands()
1795 if (IS_ERR(nand->cs[0].io.virt)) in atmel_nand_controller_legacy_add_nands()
1796 return PTR_ERR(nand->cs[0].io.virt); in atmel_nand_controller_legacy_add_nands()
1798 nand->cs[0].io.dma = res->start; in atmel_nand_controller_legacy_add_nands()
1805 * If one wants to connect a NAND to a different CS line, he will in atmel_nand_controller_legacy_add_nands()
1808 nand->cs[0].id = 3; in atmel_nand_controller_legacy_add_nands()
1819 nand->cs[0].rb.type = ATMEL_NAND_GPIO_RB; in atmel_nand_controller_legacy_add_nands()
1820 nand->cs[0].rb.gpio = gpio; in atmel_nand_controller_legacy_add_nands()
1831 nand->cs[0].csgpio = gpio; in atmel_nand_controller_legacy_add_nands()
1842 nand->cdgpio = gpio; in atmel_nand_controller_legacy_add_nands()
1844 nand_set_flash_node(&nand->base, nc->dev->of_node); in atmel_nand_controller_legacy_add_nands()
1846 return atmel_nand_controller_add_nand(nc, nand); in atmel_nand_controller_legacy_add_nands()
1879 struct atmel_nand *nand; in atmel_nand_controller_add_nands() local
1881 nand = atmel_nand_create(nc, nand_np, reg_cells); in atmel_nand_controller_add_nands()
1882 if (IS_ERR(nand)) { in atmel_nand_controller_add_nands()
1883 ret = PTR_ERR(nand); in atmel_nand_controller_add_nands()
1887 ret = atmel_nand_controller_add_nand(nc, nand); in atmel_nand_controller_add_nands()
1980 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_attach_chip() local
1999 * should define the following property in your nand node: in atmel_nand_attach_chip()
2007 "%s:nand.%d", dev_name(nc->dev), in atmel_nand_attach_chip()
2008 nand->cs[0].id); in atmel_nand_attach_chip()
2128 * The at91sam9263 has 2 EBIs, if the NAND controller is under EBI1 in atmel_smc_nand_controller_init()
2537 .compatible = "atmel,at91rm9200-nand-controller",
2541 .compatible = "atmel,at91sam9260-nand-controller",
2545 .compatible = "atmel,at91sam9261-nand-controller",
2549 .compatible = "atmel,at91sam9g45-nand-controller",
2553 .compatible = "atmel,sama5d3-nand-controller",
2557 .compatible = "microchip,sam9x60-nand-controller",
2562 .compatible = "atmel,at91rm9200-nand",
2566 .compatible = "atmel,sama5d4-nand",
2570 .compatible = "atmel,sama5d2-nand",
2608 * at91rm9200 controller, the atmel,nand-has-dma specify that in atmel_nand_controller_probe()
2614 "atmel,nand-has-dma")) in atmel_nand_controller_probe()
2619 * CLE to A22. If atmel,nand-addr-offset != 21 this means we're in atmel_nand_controller_probe()
2623 "atmel,nand-addr-offset", &ale_offs); in atmel_nand_controller_probe()
2641 struct atmel_nand *nand; in atmel_nand_controller_resume() local
2646 list_for_each_entry(nand, &nc->chips, node) { in atmel_nand_controller_resume()
2649 for (i = 0; i < nand->numcs; i++) in atmel_nand_controller_resume()
2650 nand_reset(&nand->base, i); in atmel_nand_controller_resume()
2661 .name = "atmel-nand-controller",
2672 MODULE_DESCRIPTION("NAND Flash Controller driver for Atmel SoCs");
2673 MODULE_ALIAS("platform:atmel-nand-controller");