1 // SPDX-License-Identifier: GPL-2.0
3  * Support for Realtek hardware ECC engine in RTL93xx SoCs
7 #include <linux/dma-mapping.h>
14  * The Realtek ECC engine has two operation modes.
16  * - BCH6  : Generate 10 ECC bytes from 512 data bytes plus 6 free bytes
17  * - BCH12 : Generate 20 ECC bytes from 512 data bytes plus 6 free bytes
20  * are only two known devices in the wild that have NAND flash and make use of this ECC engine
25  * This driver aligns with kernel ECC naming conventions. Neverthless a short notice on the
28  * - BBI      : Bad block indicator. The first two bytes of OOB. Protected by ECC!
29  * - tag      : 6 User/free bytes. First tag "contains" 2 bytes BBI. Protected by ECC!
30  * - syndrome : ECC/parity bytes
34  * +------+------+------+------+-----+------+------+------+------+-----+-----+-----+-----+
36  * +------+------+------+------+-----+------+------+------+------+-----+-----+-----+-----+
37  * | data | data | data | data | BBI | free | free | free | free | ECC | ECC | ECC | ECC |
38  * +------+------+------+------+-----+------+------+------+------+-----+-----+-----+-----+
101 	return nand->ecc.ctx.priv;  in nand_to_ctx()
106 	struct nand_ecc_engine *eng = nand->ecc.engine;  in nand_to_rtlc()
117 	if (section < 0 || section >= ctx->steps)  in rtl_ecc_ooblayout_ecc()
118 		return -ERANGE;  in rtl_ecc_ooblayout_ecc()
120 	oobregion->offset = ctx->steps * RTL_ECC_FREE_SIZE + section * ctx->parity_size;  in rtl_ecc_ooblayout_ecc()
121 	oobregion->length = ctx->parity_size;  in rtl_ecc_ooblayout_ecc()
133 	if (section < 0 || section >= ctx->steps)  in rtl_ecc_ooblayout_free()
134 		return -ERANGE;  in rtl_ecc_ooblayout_free()
138 	oobregion->offset = section * RTL_ECC_FREE_SIZE + bbm;  in rtl_ecc_ooblayout_free()
139 	oobregion->length = RTL_ECC_FREE_SIZE - bbm;  in rtl_ecc_ooblayout_free()
145 	.ecc = rtl_ecc_ooblayout_ecc,
151 	struct rtl_ecc_engine *rtlc = ctx->rtlc;  in rtl_ecc_kick_engine()
153 	regmap_write(rtlc->regmap, RTL_ECC_CFG,  in rtl_ecc_kick_engine()
154 		     ctx->bch_mode | RTL_ECC_BURST_128 | RTL_ECC_DMA_PRECISE);  in rtl_ecc_kick_engine()
156 	regmap_write(rtlc->regmap, RTL_ECC_DMA_START, rtlc->buf_dma);  in rtl_ecc_kick_engine()
157 	regmap_write(rtlc->regmap, RTL_ECC_DMA_TAG, rtlc->buf_dma + RTL_ECC_BLOCK_SIZE);  in rtl_ecc_kick_engine()
158 	regmap_write(rtlc->regmap, RTL_ECC_DMA_TRIGGER, operation);  in rtl_ecc_kick_engine()
163 	struct rtl_ecc_engine *rtlc = ctx->rtlc;  in rtl_ecc_wait_for_engine()
168 	 * The ECC engine needs 6-8 us to encode/decode a BCH6 syndrome for 512 bytes of data  in rtl_ecc_wait_for_engine()
175 	ret = regmap_read_poll_timeout(rtlc->regmap, RTL_ECC_STATUS, status,  in rtl_ecc_wait_for_engine()
188 	return ret ? -EBADMSG : bitflips;  in rtl_ecc_wait_for_engine()
194 	struct rtl_ecc_engine *rtlc = ctx->rtlc;  in rtl_ecc_run_engine()
195 	char *buf_parity = rtlc->buf + RTL_ECC_BLOCK_SIZE + RTL_ECC_FREE_SIZE;  in rtl_ecc_run_engine()
196 	char *buf_free = rtlc->buf + RTL_ECC_BLOCK_SIZE;  in rtl_ecc_run_engine()
197 	char *buf_data = rtlc->buf;  in rtl_ecc_run_engine()
200 	mutex_lock(&rtlc->lock);  in rtl_ecc_run_engine()
204 	memcpy(buf_parity, parity, ctx->parity_size);  in rtl_ecc_run_engine()
206 	dma_sync_single_for_device(rtlc->dev, rtlc->buf_dma, RTL_ECC_DMA_SIZE, DMA_TO_DEVICE);  in rtl_ecc_run_engine()
209 	dma_sync_single_for_cpu(rtlc->dev, rtlc->buf_dma, RTL_ECC_DMA_SIZE, DMA_FROM_DEVICE);  in rtl_ecc_run_engine()
214 		memcpy(parity, buf_parity, ctx->parity_size);  in rtl_ecc_run_engine()
217 	mutex_unlock(&rtlc->lock);  in rtl_ecc_run_engine()
229 	if (req->mode == MTD_OPS_RAW)  in rtl_ecc_prepare_io_req()
232 	nand_ecc_tweak_req(&ctx->req_ctx, req);  in rtl_ecc_prepare_io_req()
234 	if (req->type == NAND_PAGE_READ)  in rtl_ecc_prepare_io_req()
237 	free = req->oobbuf.in;  in rtl_ecc_prepare_io_req()
238 	data = req->databuf.in;  in rtl_ecc_prepare_io_req()
239 	parity = req->oobbuf.in + ctx->steps * RTL_ECC_FREE_SIZE;  in rtl_ecc_prepare_io_req()
241 	for (int i = 0; i < ctx->steps; i++) {  in rtl_ecc_prepare_io_req()
246 		parity += ctx->parity_size;  in rtl_ecc_prepare_io_req()
250 		dev_dbg(rtlc->dev, "ECC calculation failed\n");  in rtl_ecc_prepare_io_req()
252 	return ret ? -EBADMSG : 0;  in rtl_ecc_prepare_io_req()
264 	if (req->mode == MTD_OPS_RAW)  in rtl_ecc_finish_io_req()
267 	if (req->type == NAND_PAGE_WRITE) {  in rtl_ecc_finish_io_req()
268 		nand_ecc_restore_req(&ctx->req_ctx, req);  in rtl_ecc_finish_io_req()
272 	free = req->oobbuf.in;  in rtl_ecc_finish_io_req()
273 	data = req->databuf.in;  in rtl_ecc_finish_io_req()
274 	parity = req->oobbuf.in + ctx->steps * RTL_ECC_FREE_SIZE;  in rtl_ecc_finish_io_req()
276 	for (int i = 0 ; i < ctx->steps; i++) {  in rtl_ecc_finish_io_req()
280 			/* ECC totally fails for bitflips in erased blocks */  in rtl_ecc_finish_io_req()
282 							  parity, ctx->parity_size,  in rtl_ecc_finish_io_req()
284 							  ctx->strength);  in rtl_ecc_finish_io_req()
287 			mtd->ecc_stats.failed++;  in rtl_ecc_finish_io_req()
289 			mtd->ecc_stats.corrected += ret;  in rtl_ecc_finish_io_req()
295 		parity += ctx->parity_size;  in rtl_ecc_finish_io_req()
298 	nand_ecc_restore_req(&ctx->req_ctx, req);  in rtl_ecc_finish_io_req()
301 		dev_dbg(rtlc->dev, "ECC correction failed\n");  in rtl_ecc_finish_io_req()
303 		dev_dbg(rtlc->dev, "%d bitflips detected\n", bitflips);  in rtl_ecc_finish_io_req()
305 	return failure ? -EBADMSG : bitflips;  in rtl_ecc_finish_io_req()
311 	struct device *dev = nand->ecc.engine->dev;  in rtl_ecc_check_support()
313 	if (mtd->oobsize != RTL_ECC_ALLOWED_OOB_SIZE ||  in rtl_ecc_check_support()
314 	    mtd->writesize != RTL_ECC_ALLOWED_PAGE_SIZE) {  in rtl_ecc_check_support()
317 		return -EINVAL;  in rtl_ecc_check_support()
320 	if (nand->ecc.user_conf.algo != NAND_ECC_ALGO_BCH ||  in rtl_ecc_check_support()
321 	    nand->ecc.user_conf.strength != RTL_ECC_ALLOWED_STRENGTH ||  in rtl_ecc_check_support()
322 	    nand->ecc.user_conf.placement != NAND_ECC_PLACEMENT_OOB ||  in rtl_ecc_check_support()
323 	    nand->ecc.user_conf.step_size != RTL_ECC_BLOCK_SIZE) {  in rtl_ecc_check_support()
326 		return -EINVAL;  in rtl_ecc_check_support()
334 	struct nand_ecc_props *conf = &nand->ecc.ctx.conf;  in rtl_ecc_init_ctx()
337 	int strength = nand->ecc.user_conf.strength;  in rtl_ecc_init_ctx()
338 	struct device *dev = nand->ecc.engine->dev;  in rtl_ecc_init_ctx()
348 		return -ENOMEM;  in rtl_ecc_init_ctx()
350 	nand->ecc.ctx.priv = ctx;  in rtl_ecc_init_ctx()
353 	conf->algo = NAND_ECC_ALGO_BCH;  in rtl_ecc_init_ctx()
354 	conf->strength = strength;  in rtl_ecc_init_ctx()
355 	conf->step_size = RTL_ECC_BLOCK_SIZE;  in rtl_ecc_init_ctx()
356 	conf->engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;  in rtl_ecc_init_ctx()
358 	ctx->rtlc = rtlc;  in rtl_ecc_init_ctx()
359 	ctx->steps = mtd->writesize / RTL_ECC_BLOCK_SIZE;  in rtl_ecc_init_ctx()
360 	ctx->strength = strength;  in rtl_ecc_init_ctx()
361 	ctx->bch_mode = strength == 6 ? RTL_ECC_BCH6 : RTL_ECC_BCH12;  in rtl_ecc_init_ctx()
362 	ctx->parity_size = strength == 6 ? RTL_ECC_PARITY_SIZE_BCH6 : RTL_ECC_PARITY_SIZE_BCH12;  in rtl_ecc_init_ctx()
364 	ret = nand_ecc_init_req_tweaking(&ctx->req_ctx, nand);  in rtl_ecc_init_ctx()
369 		conf->strength, ctx->steps, conf->step_size,  in rtl_ecc_init_ctx()
370 		ctx->steps, ctx->steps, ctx->parity_size);  in rtl_ecc_init_ctx()
380 		nand_ecc_cleanup_req_tweaking(&ctx->req_ctx);  in rtl_ecc_cleanup_ctx()
392 	struct device *dev = &pdev->dev;  in rtl_ecc_probe()
399 		return -ENOMEM;  in rtl_ecc_probe()
405 	ret = devm_mutex_init(dev, &rtlc->lock);  in rtl_ecc_probe()
409 	rtlc->regmap = devm_regmap_init_mmio(dev, base, &rtl_ecc_regmap_config);  in rtl_ecc_probe()
410 	if (IS_ERR(rtlc->regmap))  in rtl_ecc_probe()
411 		return PTR_ERR(rtlc->regmap);  in rtl_ecc_probe()
419 	rtlc->buf = dma_alloc_noncoherent(dev, RTL_ECC_DMA_SIZE, &rtlc->buf_dma,  in rtl_ecc_probe()
421 	if (!rtlc->buf)  in rtl_ecc_probe()
422 		return -ENOMEM;  in rtl_ecc_probe()
424 	rtlc->dev = dev;  in rtl_ecc_probe()
425 	rtlc->engine.dev = dev;  in rtl_ecc_probe()
426 	rtlc->engine.ops = &rtl_ecc_engine_ops;  in rtl_ecc_probe()
427 	rtlc->engine.integration = NAND_ECC_ENGINE_INTEGRATION_EXTERNAL;  in rtl_ecc_probe()
429 	nand_ecc_register_on_host_hw_engine(&rtlc->engine);  in rtl_ecc_probe()
440 	nand_ecc_unregister_on_host_hw_engine(&rtlc->engine);  in rtl_ecc_remove()
441 	dma_free_noncoherent(rtlc->dev, RTL_ECC_DMA_SIZE, rtlc->buf, rtlc->buf_dma,  in rtl_ecc_remove()
447 		.compatible = "realtek,rtl9301-ecc",
454 		.name = "rtl-nand-ecc-engine",
464 MODULE_DESCRIPTION("Realtek NAND hardware ECC controller");