181 	struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host);  in sdhci_am654_setup_dll()  local
187 	regmap_update_bits(sdhci_am654->base, PHY_CTRL5,  in sdhci_am654_setup_dll()
190 	if (sdhci_am654->flags & FREQSEL_2_BIT) {  in sdhci_am654_setup_dll()
208 		regmap_update_bits(sdhci_am654->base, PHY_CTRL5, mask, val);  in sdhci_am654_setup_dll()
219 		regmap_update_bits(sdhci_am654->base, PHY_CTRL5, FREQSEL_MASK,  in sdhci_am654_setup_dll()
224 	val = sdhci_am654->trm_icp << DLL_TRIM_ICP_SHIFT;  in sdhci_am654_setup_dll()
228 	val |= sdhci_am654->drv_strength << DR_TY_SHIFT;  in sdhci_am654_setup_dll()
229 	regmap_update_bits(sdhci_am654->base, PHY_CTRL1, mask, val);  in sdhci_am654_setup_dll()
232 	regmap_update_bits(sdhci_am654->base, PHY_CTRL1, ENDLL_MASK,  in sdhci_am654_setup_dll()
238 	ret = regmap_read_poll_timeout(sdhci_am654->base, PHY_STAT1, val,  in sdhci_am654_setup_dll()
246 static void sdhci_am654_write_itapdly(struct sdhci_am654_data *sdhci_am654,  in sdhci_am654_write_itapdly()  argument
250 	regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPCHGWIN_MASK,  in sdhci_am654_write_itapdly()
252 	regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPDLYENA_MASK,  in sdhci_am654_write_itapdly()
254 	regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPDLYSEL_MASK,  in sdhci_am654_write_itapdly()
256 	regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPCHGWIN_MASK, 0);  in sdhci_am654_write_itapdly()
259 static void sdhci_am654_setup_delay_chain(struct sdhci_am654_data *sdhci_am654,  in sdhci_am654_setup_delay_chain()  argument
264 	regmap_update_bits(sdhci_am654->base, PHY_CTRL1, ENDLL_MASK, 0);  in sdhci_am654_setup_delay_chain()
268 	regmap_update_bits(sdhci_am654->base, PHY_CTRL5, mask, val);  in sdhci_am654_setup_delay_chain()
270 	sdhci_am654_write_itapdly(sdhci_am654, sdhci_am654->itap_del_sel[timing],  in sdhci_am654_setup_delay_chain()
271 				  sdhci_am654->itap_del_ena[timing]);  in sdhci_am654_setup_delay_chain()
277 	struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host);  in sdhci_am654_set_clock()  local
282 	regmap_update_bits(sdhci_am654->base, PHY_CTRL1, ENDLL_MASK, 0);  in sdhci_am654_set_clock()
287 	otap_del_sel = sdhci_am654->otap_del_sel[timing];  in sdhci_am654_set_clock()
295 		if (sdhci_am654->flags & STRBSEL_4_BIT)  in sdhci_am654_set_clock()
300 		val |= sdhci_am654->strb_sel << STRBSEL_SHIFT;  in sdhci_am654_set_clock()
303 	regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, val);  in sdhci_am654_set_clock()
307 		sdhci_am654->dll_enable = true;  in sdhci_am654_set_clock()
310 			sdhci_am654->itap_del_ena[timing] = 0x1;  in sdhci_am654_set_clock()
311 			sdhci_am654->itap_del_sel[timing] = sdhci_am654->itap_del_sel[timing - 1];  in sdhci_am654_set_clock()
314 		sdhci_am654_write_itapdly(sdhci_am654, sdhci_am654->itap_del_sel[timing],  in sdhci_am654_set_clock()
315 					  sdhci_am654->itap_del_ena[timing]);  in sdhci_am654_set_clock()
317 		sdhci_am654_setup_delay_chain(sdhci_am654, timing);  in sdhci_am654_set_clock()
318 		sdhci_am654->dll_enable = false;  in sdhci_am654_set_clock()
321 	regmap_update_bits(sdhci_am654->base, PHY_CTRL5, CLKBUFSEL_MASK,  in sdhci_am654_set_clock()
322 			   sdhci_am654->clkbuf_sel);  in sdhci_am654_set_clock()
329 	struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host);  in sdhci_j721e_4bit_set_clock()  local
337 	otap_del_sel = sdhci_am654->otap_del_sel[timing];  in sdhci_j721e_4bit_set_clock()
344 	itap_del_ena = sdhci_am654->itap_del_ena[timing];  in sdhci_j721e_4bit_set_clock()
345 	itap_del_sel = sdhci_am654->itap_del_sel[timing];  in sdhci_j721e_4bit_set_clock()
351 	regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPCHGWIN_MASK,  in sdhci_j721e_4bit_set_clock()
353 	regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, val);  in sdhci_j721e_4bit_set_clock()
354 	regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPCHGWIN_MASK, 0);  in sdhci_j721e_4bit_set_clock()
355 	regmap_update_bits(sdhci_am654->base, PHY_CTRL5, CLKBUFSEL_MASK,  in sdhci_j721e_4bit_set_clock()
356 			   sdhci_am654->clkbuf_sel);  in sdhci_j721e_4bit_set_clock()
365 	struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host);  in sdhci_am654_start_signal_voltage_switch()  local
368 	if ((sdhci_am654->quirks & SDHCI_AM654_QUIRK_SUPPRESS_V1P8_ENA) &&  in sdhci_am654_start_signal_voltage_switch()
430 	struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host);  in sdhci_am654_reset()  local
434 	if (sdhci_am654->quirks & SDHCI_AM654_QUIRK_FORCE_CDTEST) {  in sdhci_am654_reset()
532 	struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host);  in sdhci_am654_do_tuning()  local
543 	sdhci_am654->itap_del_ena[timing] = 0x1;  in sdhci_am654_do_tuning()
546 		sdhci_am654_write_itapdly(sdhci_am654, itap, sdhci_am654->itap_del_ena[timing]);  in sdhci_am654_do_tuning()
569 					 sdhci_am654->dll_enable);  in sdhci_am654_do_tuning()
576 	struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host);  in sdhci_am654_platform_execute_tuning()  local
585 	} while (++sdhci_am654->tuning_loop < RETRY_TUNING_MAX);  in sdhci_am654_platform_execute_tuning()
593 	sdhci_am654_write_itapdly(sdhci_am654, itapdly, sdhci_am654->itap_del_ena[timing]);  in sdhci_am654_platform_execute_tuning()
595 	sdhci_am654->itap_del_sel[timing] = itapdly;  in sdhci_am654_platform_execute_tuning()
726 				      struct sdhci_am654_data *sdhci_am654)  in sdhci_am654_get_otap_delay()  argument
735 					       &sdhci_am654->otap_del_sel[i]);  in sdhci_am654_get_otap_delay()
755 						       &sdhci_am654->itap_del_sel[i]);  in sdhci_am654_get_otap_delay()
757 				sdhci_am654->itap_del_ena[i] = 0x1;  in sdhci_am654_get_otap_delay()
767 	struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host);  in sdhci_am654_init()  local
775 	regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, 0x0);  in sdhci_am654_init()
777 	if (sdhci_am654->flags & DLL_CALIB) {  in sdhci_am654_init()
778 		regmap_read(sdhci_am654->base, PHY_STAT1, &val);  in sdhci_am654_init()
781 			regmap_update_bits(sdhci_am654->base, PHY_CTRL1,  in sdhci_am654_init()
783 			ret = regmap_read_poll_timeout(sdhci_am654->base,  in sdhci_am654_init()
793 	if (sdhci_am654->flags & IOMUX_PRESENT)  in sdhci_am654_init()
794 		regmap_update_bits(sdhci_am654->base, PHY_CTRL1,  in sdhci_am654_init()
801 	regmap_update_bits(sdhci_am654->base, CTL_CFG_2, SLOTTYPE_MASK,  in sdhci_am654_init()
805 	regmap_update_bits(sdhci_am654->base, CTL_CFG_3, TUNINGFORSDR50_MASK,  in sdhci_am654_init()
809 	sdhci_am654->tuning_loop = 0;  in sdhci_am654_init()
819 	ret = sdhci_am654_get_otap_delay(host, sdhci_am654);  in sdhci_am654_init()
835 					struct sdhci_am654_data *sdhci_am654)  in sdhci_am654_get_of_property()  argument
841 	if (sdhci_am654->flags & DLL_PRESENT) {  in sdhci_am654_get_of_property()
843 					       &sdhci_am654->trm_icp);  in sdhci_am654_get_of_property()
854 			sdhci_am654->drv_strength = DRIVER_STRENGTH_50_OHM;  in sdhci_am654_get_of_property()
857 			sdhci_am654->drv_strength = DRIVER_STRENGTH_33_OHM;  in sdhci_am654_get_of_property()
860 			sdhci_am654->drv_strength = DRIVER_STRENGTH_66_OHM;  in sdhci_am654_get_of_property()
863 			sdhci_am654->drv_strength = DRIVER_STRENGTH_100_OHM;  in sdhci_am654_get_of_property()
866 			sdhci_am654->drv_strength = DRIVER_STRENGTH_40_OHM;  in sdhci_am654_get_of_property()
874 	device_property_read_u32(dev, "ti,strobe-sel", &sdhci_am654->strb_sel);  in sdhci_am654_get_of_property()
876 				 &sdhci_am654->clkbuf_sel);  in sdhci_am654_get_of_property()
879 		sdhci_am654->quirks |= SDHCI_AM654_QUIRK_FORCE_CDTEST;  in sdhci_am654_get_of_property()
920 	struct sdhci_am654_data *sdhci_am654;  in sdhci_am654_probe()  local
936 	host = sdhci_pltfm_init(pdev, drvdata->pdata, sizeof(*sdhci_am654));  in sdhci_am654_probe()
941 	sdhci_am654 = sdhci_pltfm_priv(pltfm_host);  in sdhci_am654_probe()
942 	sdhci_am654->flags = drvdata->flags;  in sdhci_am654_probe()
943 	sdhci_am654->quirks = drvdata->quirks;  in sdhci_am654_probe()
958 	sdhci_am654->base = devm_regmap_init_mmio(dev, base,  in sdhci_am654_probe()
960 	if (IS_ERR(sdhci_am654->base)) {  in sdhci_am654_probe()
962 		return PTR_ERR(sdhci_am654->base);  in sdhci_am654_probe()
965 	ret = sdhci_am654_get_of_property(pdev, sdhci_am654);  in sdhci_am654_probe()
1025 	struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host);  in sdhci_am654_restore()  local
1030 	if (sdhci_am654->flags & DLL_CALIB) {  in sdhci_am654_restore()
1031 		regmap_read(sdhci_am654->base, PHY_STAT1, &val);  in sdhci_am654_restore()
1034 			regmap_update_bits(sdhci_am654->base, PHY_CTRL1,  in sdhci_am654_restore()
1036 			ret = regmap_read_poll_timeout(sdhci_am654->base,  in sdhci_am654_restore()
1046 	if (sdhci_am654->flags & IOMUX_PRESENT)  in sdhci_am654_restore()
1047 		regmap_update_bits(sdhci_am654->base, PHY_CTRL1,  in sdhci_am654_restore()
1054 	regmap_update_bits(sdhci_am654->base, CTL_CFG_2, SLOTTYPE_MASK,  in sdhci_am654_restore()
1057 	regmap_read(sdhci_am654->base, CTL_CFG_3, &val);  in sdhci_am654_restore()
1060 		regmap_update_bits(sdhci_am654->base, CTL_CFG_3, TUNINGFORSDR50_MASK,  in sdhci_am654_restore()