1 // SPDX-License-Identifier: GPL-2.0-only
18 #include "sdhci-pci.h"
101 			       mmc_hostname(host->mmc));  in sdhci_o2_wait_card_detect_stable()
137 			       mmc_hostname(host->mmc));  in sdhci_o2_enable_internal_clock()
171 	pci_read_config_dword(chip->pdev,  in o2_pci_set_baseclk()
177 	pci_write_config_dword(chip->pdev,  in o2_pci_set_baseclk()
221 				host->tuning_done = true;  in __sdhci_o2_execute_tuning()
225 				mmc_hostname(host->mmc));  in __sdhci_o2_execute_tuning()
233 		mmc_hostname(host->mmc));  in __sdhci_o2_execute_tuning()
250 	struct sdhci_pci_chip *chip = slot->chip;  in sdhci_o2_dll_recovery()
254 	pci_read_config_byte(chip->pdev,  in sdhci_o2_dll_recovery()
257 	pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);  in sdhci_o2_dll_recovery()
258 	while (o2_host->dll_adjust_count < DMDN_SZ && !ret) {  in sdhci_o2_dll_recovery()
267 		pci_read_config_dword(chip->pdev,  in sdhci_o2_dll_recovery()
272 		pci_write_config_dword(chip->pdev, O2_SD_FUNC_REG4, scratch_32);  in sdhci_o2_dll_recovery()
273 		o2_pci_set_baseclk(chip, dmdn_table[o2_host->dll_adjust_count]);  in sdhci_o2_dll_recovery()
279 		if (sdhci_o2_get_cd(host->mmc)) {  in sdhci_o2_dll_recovery()
292 					mmc_hostname(host->mmc),  in sdhci_o2_dll_recovery()
293 					o2_host->dll_adjust_count);  in sdhci_o2_dll_recovery()
297 				mmc_hostname(host->mmc));  in sdhci_o2_dll_recovery()
301 		o2_host->dll_adjust_count++;  in sdhci_o2_dll_recovery()
303 	if (!ret && o2_host->dll_adjust_count == DMDN_SZ)  in sdhci_o2_dll_recovery()
305 		mmc_hostname(host->mmc));  in sdhci_o2_dll_recovery()
307 	pci_read_config_byte(chip->pdev,  in sdhci_o2_dll_recovery()
310 	pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);  in sdhci_o2_dll_recovery()
318 	struct sdhci_pci_chip *chip = slot->chip;  in sdhci_o2_execute_tuning()
329 	if ((host->timing != MMC_TIMING_MMC_HS200) &&  in sdhci_o2_execute_tuning()
330 		(host->timing != MMC_TIMING_UHS_SDR104) &&  in sdhci_o2_execute_tuning()
331 		(host->timing != MMC_TIMING_UHS_SDR50))  in sdhci_o2_execute_tuning()
335 		return -EINVAL;  in sdhci_o2_execute_tuning()
343 	switch (chip->pdev->device) {  in sdhci_o2_execute_tuning()
354 		if (host->timing == MMC_TIMING_MMC_HS200 ||  in sdhci_o2_execute_tuning()
355 		    host->timing == MMC_TIMING_UHS_SDR104) {  in sdhci_o2_execute_tuning()
357 			pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8);  in sdhci_o2_execute_tuning()
359 			pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);  in sdhci_o2_execute_tuning()
362 			pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, &reg_val);  in sdhci_o2_execute_tuning()
365 			pci_write_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, reg_val);  in sdhci_o2_execute_tuning()
368 			pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8);  in sdhci_o2_execute_tuning()
370 			pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);  in sdhci_o2_execute_tuning()
386 				mmc_hostname(host->mmc));  in sdhci_o2_execute_tuning()
394 				mmc_hostname(host->mmc));  in sdhci_o2_execute_tuning()
395 			return -EINVAL;  in sdhci_o2_execute_tuning()
400 	if (mmc->ios.bus_width == MMC_BUS_WIDTH_8) {  in sdhci_o2_execute_tuning()
401 		current_bus_width = mmc->ios.bus_width;  in sdhci_o2_execute_tuning()
402 		mmc->ios.bus_width = MMC_BUS_WIDTH_4;  in sdhci_o2_execute_tuning()
415 		mmc->ios.bus_width = MMC_BUS_WIDTH_8;  in sdhci_o2_execute_tuning()
427 	host->flags &= ~SDHCI_HS400_TUNING;  in sdhci_o2_execute_tuning()
437 	ret = pci_read_config_dword(chip->pdev,  in o2_pci_led_enable()
443 	pci_write_config_dword(chip->pdev,  in o2_pci_led_enable()
446 	ret = pci_read_config_dword(chip->pdev,  in o2_pci_led_enable()
452 	pci_write_config_dword(chip->pdev,  in o2_pci_led_enable()
461 	ret = pci_read_config_dword(chip->pdev, O2_SD_DEV_CTRL, &scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
465 	pci_write_config_dword(chip->pdev, O2_SD_DEV_CTRL, scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
468 	ret = pci_read_config_dword(chip->pdev, O2_SD_MISC_REG5, &scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
473 	pci_write_config_dword(chip->pdev, O2_SD_MISC_REG5, scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
476 	ret = pci_read_config_dword(chip->pdev, O2_SD_TEST_REG, &scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
480 	pci_write_config_dword(chip->pdev, O2_SD_TEST_REG, scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
483 	pci_write_config_dword(chip->pdev, O2_SD_DELAY_CTRL, 0x00002492);  in sdhci_pci_o2_fujin2_pci_init()
486 	ret = pci_read_config_dword(chip->pdev, O2_SD_LD0_CTRL, &scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
490 	pci_write_config_dword(chip->pdev, O2_SD_LD0_CTRL, scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
492 	/* Set Max power supply capability of SD host */  in sdhci_pci_o2_fujin2_pci_init()
493 	ret = pci_read_config_dword(chip->pdev, O2_SD_CAP_REG0, &scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
498 	pci_write_config_dword(chip->pdev, O2_SD_CAP_REG0, scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
500 	ret = pci_read_config_dword(chip->pdev,  in sdhci_pci_o2_fujin2_pci_init()
506 	pci_write_config_dword(chip->pdev, O2_SD_TUNING_CTRL, scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
509 	ret = pci_read_config_dword(chip->pdev,  in sdhci_pci_o2_fujin2_pci_init()
515 	pci_write_config_dword(chip->pdev, O2_SD_UHS2_L1_CTRL, scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
518 	ret = pci_read_config_dword(chip->pdev, O2_SD_FUNC_REG3, &scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
523 	pci_write_config_dword(chip->pdev, O2_SD_FUNC_REG3, scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
526 	ret = pci_read_config_dword(chip->pdev, O2_SD_CAPS, &scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
531 	pci_write_config_dword(chip->pdev, O2_SD_CAPS, scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
533 	ret = pci_read_config_dword(chip->pdev,  in sdhci_pci_o2_fujin2_pci_init()
539 	pci_write_config_dword(chip->pdev, O2_SD_MISC_CTRL4, scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
547 	ret = pci_find_capability(chip->pdev, PCI_CAP_ID_MSI);  in sdhci_pci_o2_enable_msi()
550 			mmc_hostname(host->mmc));  in sdhci_pci_o2_enable_msi()
554 	ret = pci_alloc_irq_vectors(chip->pdev, 1, 1,  in sdhci_pci_o2_enable_msi()
558 		       mmc_hostname(host->mmc), ret);  in sdhci_pci_o2_enable_msi()
562 	host->irq = pci_irq_vector(chip->pdev, 0);  in sdhci_pci_o2_enable_msi()
572 	if (sdhci_o2_get_cd(host->mmc)) {  in sdhci_o2_enable_clk()
585 	struct sdhci_pci_chip *chip = slot->chip;  in sdhci_pci_o2_set_clock()
587 	host->mmc->actual_clock = 0;  in sdhci_pci_o2_set_clock()
595 	pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);  in sdhci_pci_o2_set_clock()
597 	pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);  in sdhci_pci_o2_set_clock()
599 	if (chip->pdev->device == PCI_DEVICE_ID_O2_GG8_9860 ||  in sdhci_pci_o2_set_clock()
600 	    chip->pdev->device == PCI_DEVICE_ID_O2_GG8_9861 ||  in sdhci_pci_o2_set_clock()
601 	    chip->pdev->device == PCI_DEVICE_ID_O2_GG8_9862 ||  in sdhci_pci_o2_set_clock()
602 	    chip->pdev->device == PCI_DEVICE_ID_O2_GG8_9863) {  in sdhci_pci_o2_set_clock()
610 	if ((host->timing == MMC_TIMING_UHS_SDR104) && (clock == 200000000)) {  in sdhci_pci_o2_set_clock()
611 		pci_read_config_dword(chip->pdev, O2_SD_PLL_SETTING, &scratch_32);  in sdhci_pci_o2_set_clock()
616 		pci_read_config_dword(chip->pdev, O2_SD_PLL_SETTING, &scratch_32);  in sdhci_pci_o2_set_clock()
622 	pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, &scratch_32);  in sdhci_pci_o2_set_clock()
624 	pci_write_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, scratch_32);  in sdhci_pci_o2_set_clock()
627 	pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);  in sdhci_pci_o2_set_clock()
629 	pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);  in sdhci_pci_o2_set_clock()
631 	clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);  in sdhci_pci_o2_set_clock()
639 	struct sdhci_pci_chip *chip = slot->chip;  in sdhci_pci_o2_init_sd_express()
647 	/* Set VDD2 voltage*/  in sdhci_pci_o2_init_sd_express()
650 	if (host->mmc->ios.timing == MMC_TIMING_SD_EXP_1_2V &&  in sdhci_pci_o2_init_sd_express()
651 	    host->mmc->caps2 & MMC_CAP2_SD_EXP_1_2V) {  in sdhci_pci_o2_init_sd_express()
660 	pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch8);  in sdhci_pci_o2_init_sd_express()
662 	pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch8);  in sdhci_pci_o2_init_sd_express()
674 		/* Power off VDD2 voltage*/  in sdhci_pci_o2_init_sd_express()
680 		pci_read_config_word(chip->pdev, O2_SD_PARA_SET_REG1, &scratch16);  in sdhci_pci_o2_init_sd_express()
682 		pci_write_config_word(chip->pdev, O2_SD_PARA_SET_REG1, scratch16);  in sdhci_pci_o2_init_sd_express()
684 		host->mmc->ios.timing = MMC_TIMING_LEGACY;  in sdhci_pci_o2_init_sd_express()
686 			mmc_hostname(host->mmc));  in sdhci_pci_o2_init_sd_express()
689 	pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch8);  in sdhci_pci_o2_init_sd_express()
691 	pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch8);  in sdhci_pci_o2_init_sd_express()
703 	chip = slot->chip;  in sdhci_pci_o2_set_power()
707 		pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8);  in sdhci_pci_o2_set_power()
709 		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);  in sdhci_pci_o2_set_power()
712 		pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, &scratch_32);  in sdhci_pci_o2_set_power()
714 		pci_write_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, scratch_32);  in sdhci_pci_o2_set_power()
717 		pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8);  in sdhci_pci_o2_set_power()
719 		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);  in sdhci_pci_o2_set_power()
733 	chip = slot->chip;  in sdhci_pci_o2_probe_slot()
734 	host = slot->host;  in sdhci_pci_o2_probe_slot()
736 	o2_host->dll_adjust_count = 0;  in sdhci_pci_o2_probe_slot()
744 		host->mmc->caps |= MMC_CAP_8_BIT_DATA;  in sdhci_pci_o2_probe_slot()
746 	host->quirks2 |= SDHCI_QUIRK2_BROKEN_DDR50;  in sdhci_pci_o2_probe_slot()
750 	host->mmc_host_ops.execute_tuning = sdhci_o2_execute_tuning;  in sdhci_pci_o2_probe_slot()
751 	switch (chip->pdev->device) {  in sdhci_pci_o2_probe_slot()
759 			host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;  in sdhci_pci_o2_probe_slot()
761 		if (chip->pdev->device == PCI_DEVICE_ID_O2_SEABIRD0) {  in sdhci_pci_o2_probe_slot()
762 			ret = pci_read_config_dword(chip->pdev,  in sdhci_pci_o2_probe_slot()
765 				return -EIO;  in sdhci_pci_o2_probe_slot()
768 					mmc_hostname(host->mmc));  in sdhci_pci_o2_probe_slot()
769 				host->flags &= ~SDHCI_SIGNALING_330;  in sdhci_pci_o2_probe_slot()
770 				host->flags |= SDHCI_SIGNALING_180;  in sdhci_pci_o2_probe_slot()
771 				host->mmc->caps2 |= MMC_CAP2_NO_SD;  in sdhci_pci_o2_probe_slot()
772 				host->mmc->caps2 |= MMC_CAP2_NO_SDIO;  in sdhci_pci_o2_probe_slot()
773 				pci_write_config_dword(chip->pdev,  in sdhci_pci_o2_probe_slot()
777 			slot->host->mmc_host_ops.get_cd = sdhci_o2_get_cd;  in sdhci_pci_o2_probe_slot()
780 		if (chip->pdev->device == PCI_DEVICE_ID_O2_SEABIRD1) {  in sdhci_pci_o2_probe_slot()
781 			slot->host->mmc_host_ops.get_cd = sdhci_o2_get_cd;  in sdhci_pci_o2_probe_slot()
782 			host->mmc->caps2 |= MMC_CAP2_NO_SDIO;  in sdhci_pci_o2_probe_slot()
783 			host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN;  in sdhci_pci_o2_probe_slot()
786 		if (chip->pdev->device != PCI_DEVICE_ID_O2_FUJIN2)  in sdhci_pci_o2_probe_slot()
797 		host->mmc->caps2 |= MMC_CAP2_NO_SDIO | MMC_CAP2_SD_EXP | MMC_CAP2_SD_EXP_1_2V;  in sdhci_pci_o2_probe_slot()
798 		host->mmc->caps |= MMC_CAP_HW_RESET;  in sdhci_pci_o2_probe_slot()
799 		host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN;  in sdhci_pci_o2_probe_slot()
800 		slot->host->mmc_host_ops.get_cd = sdhci_o2_get_cd;  in sdhci_pci_o2_probe_slot()
801 		host->mmc_host_ops.init_sd_express = sdhci_pci_o2_init_sd_express;  in sdhci_pci_o2_probe_slot()
817 	switch (chip->pdev->device) {  in sdhci_pci_o2_probe()
823 		ret = pci_read_config_byte(chip->pdev,  in sdhci_pci_o2_probe()
828 		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);  in sdhci_pci_o2_probe()
831 		pci_write_config_byte(chip->pdev, O2_SD_MULTI_VCC3V, 0x08);  in sdhci_pci_o2_probe()
834 		ret = pci_read_config_byte(chip->pdev,  in sdhci_pci_o2_probe()
839 		pci_write_config_byte(chip->pdev, O2_SD_CLKREQ, scratch);  in sdhci_pci_o2_probe()
844 		ret = pci_read_config_byte(chip->pdev, O2_SD_CAPS, &scratch);  in sdhci_pci_o2_probe()
848 		pci_write_config_byte(chip->pdev, O2_SD_CAPS, scratch);  in sdhci_pci_o2_probe()
849 		pci_write_config_byte(chip->pdev, O2_SD_CAPS, 0x73);  in sdhci_pci_o2_probe()
852 		pci_write_config_byte(chip->pdev, O2_SD_ADMA1, 0x39);  in sdhci_pci_o2_probe()
853 		pci_write_config_byte(chip->pdev, O2_SD_ADMA2, 0x08);  in sdhci_pci_o2_probe()
856 		ret = pci_read_config_byte(chip->pdev,  in sdhci_pci_o2_probe()
861 		pci_write_config_byte(chip->pdev, O2_SD_INF_MOD, scratch);  in sdhci_pci_o2_probe()
864 		ret = pci_read_config_byte(chip->pdev,  in sdhci_pci_o2_probe()
869 		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);  in sdhci_pci_o2_probe()
875 		ret = pci_read_config_byte(chip->pdev,  in sdhci_pci_o2_probe()
881 		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);  in sdhci_pci_o2_probe()
884 		if (chip->pdev->device == PCI_DEVICE_ID_O2_FUJIN2) {  in sdhci_pci_o2_probe()
885 			ret = pci_read_config_dword(chip->pdev,  in sdhci_pci_o2_probe()
897 				ret = pci_read_config_dword(chip->pdev,  in sdhci_pci_o2_probe()
905 				pci_write_config_dword(chip->pdev,  in sdhci_pci_o2_probe()
910 				pci_write_config_byte(chip->pdev,  in sdhci_pci_o2_probe()
921 		ret = pci_read_config_dword(chip->pdev,  in sdhci_pci_o2_probe()
928 		pci_write_config_dword(chip->pdev,  in sdhci_pci_o2_probe()
931 		ret = pci_read_config_dword(chip->pdev,  in sdhci_pci_o2_probe()
936 		pci_write_config_dword(chip->pdev, O2_SD_CLKREQ, scratch_32);  in sdhci_pci_o2_probe()
938 		ret = pci_read_config_dword(chip->pdev,  in sdhci_pci_o2_probe()
945 		pci_write_config_dword(chip->pdev,  in sdhci_pci_o2_probe()
949 		ret = pci_read_config_dword(chip->pdev,  in sdhci_pci_o2_probe()
954 		pci_write_config_dword(chip->pdev,  in sdhci_pci_o2_probe()
957 		if (chip->pdev->device == PCI_DEVICE_ID_O2_FUJIN2)  in sdhci_pci_o2_probe()
961 		ret = pci_read_config_byte(chip->pdev,  in sdhci_pci_o2_probe()
966 		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);  in sdhci_pci_o2_probe()
971 		ret = pci_read_config_byte(chip->pdev,  in sdhci_pci_o2_probe()
977 		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);  in sdhci_pci_o2_probe()
979 		ret = pci_read_config_dword(chip->pdev,  in sdhci_pci_o2_probe()
988 			pci_write_config_dword(chip->pdev,  in sdhci_pci_o2_probe()
994 			pci_write_config_dword(chip->pdev,  in sdhci_pci_o2_probe()
997 			ret = pci_read_config_dword(chip->pdev,  in sdhci_pci_o2_probe()
1003 			pci_write_config_dword(chip->pdev,  in sdhci_pci_o2_probe()
1008 		pci_write_config_byte(chip->pdev,  in sdhci_pci_o2_probe()
1011 		pci_read_config_dword(chip->pdev, O2_SD_MISC_CTRL2, &scratch_32);  in sdhci_pci_o2_probe()
1014 		pci_write_config_dword(chip->pdev, O2_SD_MISC_CTRL2, scratch_32);  in sdhci_pci_o2_probe()
1015 		pci_write_config_dword(chip->pdev, O2_SD_DETECT_SETTING, 1);  in sdhci_pci_o2_probe()
1017 		ret = pci_read_config_byte(chip->pdev,  in sdhci_pci_o2_probe()
1022 		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);  in sdhci_pci_o2_probe()
1029 		ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);  in sdhci_pci_o2_probe()
1033 		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);  in sdhci_pci_o2_probe()
1036 		pci_read_config_word(chip->pdev, O2_SD_PARA_SET_REG1, &scratch16);  in sdhci_pci_o2_probe()
1039 		pci_write_config_word(chip->pdev, O2_SD_PARA_SET_REG1, scratch16);  in sdhci_pci_o2_probe()
1041 		/* set VDD1 supply source */  in sdhci_pci_o2_probe()
1042 		pci_read_config_word(chip->pdev, O2_SD_VDDX_CTRL_REG, &scratch16);  in sdhci_pci_o2_probe()
1045 		pci_write_config_word(chip->pdev, O2_SD_VDDX_CTRL_REG, scratch16);  in sdhci_pci_o2_probe()
1049 		pci_write_config_word(chip->pdev, O2_SD_PLL_SETTING, scratch16);  in sdhci_pci_o2_probe()
1052 		pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, &scratch_32);  in sdhci_pci_o2_probe()
1055 		pci_write_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, scratch_32);  in sdhci_pci_o2_probe()
1058 		ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);  in sdhci_pci_o2_probe()
1062 		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);  in sdhci_pci_o2_probe()