Lines Matching full:pwr
946 u8 pwr = 0; in gl9755_set_power() local
949 pwr = sdhci_get_vdd_value(vdd); in gl9755_set_power()
950 if (!pwr) in gl9755_set_power()
952 pwr |= SDHCI_VDD2_POWER_180; in gl9755_set_power()
955 if (host->pwr == pwr) in gl9755_set_power()
958 host->pwr = pwr; in gl9755_set_power()
960 if (pwr == 0) { in gl9755_set_power()
967 pwr |= (SDHCI_POWER_ON | SDHCI_VDD2_POWER_ON); in gl9755_set_power()
969 sdhci_writeb(host, pwr & 0xf, SDHCI_POWER_CONTROL); in gl9755_set_power()
972 sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); in gl9755_set_power()
1211 u8 pwr = 0; in __gl9767_uhs2_set_power() local
1214 pwr = sdhci_get_vdd_value(vdd); in __gl9767_uhs2_set_power()
1215 if (!pwr) in __gl9767_uhs2_set_power()
1218 pwr |= SDHCI_VDD2_POWER_180; in __gl9767_uhs2_set_power()
1221 if (host->pwr == pwr) in __gl9767_uhs2_set_power()
1224 host->pwr = pwr; in __gl9767_uhs2_set_power()
1226 if (pwr == 0) { in __gl9767_uhs2_set_power()
1231 pwr |= SDHCI_POWER_ON; in __gl9767_uhs2_set_power()
1232 sdhci_writeb(host, pwr & 0xf, SDHCI_POWER_CONTROL); in __gl9767_uhs2_set_power()
1237 pwr |= SDHCI_VDD2_POWER_ON; in __gl9767_uhs2_set_power()
1238 sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); in __gl9767_uhs2_set_power()