Lines Matching full:extra
570 u32 extra, reg; in dwcmshc_rk3568_set_clock() local
593 extra = sdhci_readl(host, reg); in dwcmshc_rk3568_set_clock()
594 extra &= ~BIT(0); in dwcmshc_rk3568_set_clock()
595 sdhci_writel(host, extra, reg); in dwcmshc_rk3568_set_clock()
611 extra = DWCMSHC_EMMC_DLL_DLYENA | in dwcmshc_rk3568_set_clock()
614 sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_STRBIN); in dwcmshc_rk3568_set_clock()
627 extra = DWCMSHC_EMMC_DLL_DLYENA; in dwcmshc_rk3568_set_clock()
629 extra |= DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL; in dwcmshc_rk3568_set_clock()
630 sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK); in dwcmshc_rk3568_set_clock()
633 extra = 0x5 << DWCMSHC_EMMC_DLL_START_POINT | in dwcmshc_rk3568_set_clock()
636 sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_CTRL); in dwcmshc_rk3568_set_clock()
638 extra, DLL_LOCK_WO_TMOUT(extra), 1, in dwcmshc_rk3568_set_clock()
645 extra = 0x1 << 16 | /* tune clock stop en */ in dwcmshc_rk3568_set_clock()
648 sdhci_writel(host, extra, dwc_priv->vendor_specific_area1 + DWCMSHC_EMMC_ATCTRL); in dwcmshc_rk3568_set_clock()
657 extra = DLL_CMDOUT_SRC_CLK_NEG | in dwcmshc_rk3568_set_clock()
662 sdhci_writel(host, extra, DECMSHC_EMMC_DLL_CMDOUT); in dwcmshc_rk3568_set_clock()
665 extra = DWCMSHC_EMMC_DLL_DLYENA | in dwcmshc_rk3568_set_clock()
669 sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_TXCLK); in dwcmshc_rk3568_set_clock()
671 extra = DWCMSHC_EMMC_DLL_DLYENA | in dwcmshc_rk3568_set_clock()
674 sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_STRBIN); in dwcmshc_rk3568_set_clock()
1364 u32 extra, caps; in dwcmshc_probe() local
1378 * extra adma table cnt for cross 128M boundary handling. in dwcmshc_probe()
1380 extra = DIV_ROUND_UP_ULL(dma_get_required_mask(dev), SZ_128M); in dwcmshc_probe()
1381 if (extra > SDHCI_MAX_SEGS) in dwcmshc_probe()
1382 extra = SDHCI_MAX_SEGS; in dwcmshc_probe()
1383 host->adma_table_cnt += extra; in dwcmshc_probe()