47 	struct clk *gck;  member
181 	gck_rate = clk_get_rate(priv->gck);  in sdhci_at91_set_clks_presets()
201 	dev_dbg(dev, "update clk mul to %u as gck rate is %u Hz and clk base is %u Hz\n",  in sdhci_at91_set_clks_presets()
227 	clk_prepare_enable(priv->gck);  in sdhci_at91_set_clks_presets()
261 	clk_disable_unprepare(priv->gck);  in sdhci_at91_runtime_suspend()
296 	ret = clk_prepare_enable(priv->gck);  in sdhci_at91_runtime_resume()
298 		dev_err(dev, "can't enable gck\n");  in sdhci_at91_runtime_resume()
352 	priv->gck = devm_clk_get(&pdev->dev, "multclk");  in sdhci_at91_probe()
353 	if (IS_ERR(priv->gck)) {  in sdhci_at91_probe()
355 		ret = PTR_ERR(priv->gck);  in sdhci_at91_probe()
438 	clk_disable_unprepare(priv->gck);  in sdhci_at91_probe()
451 	struct clk *gck = priv->gck;  in sdhci_at91_remove()  local
461 	clk_disable_unprepare(gck);  in sdhci_at91_remove()