Lines Matching +full:mmc +full:-
2 * drivers/mmc/host/omap_hsmmc.c
4 * Driver for OMAP2430/3430 MMC controller.
27 #include <linux/dma-mapping.h>
34 #include <linux/mmc/host.h>
35 #include <linux/mmc/core.h>
36 #include <linux/mmc/mmc.h>
37 #include <linux/mmc/slot-gpio.h>
44 #include <linux/platform_data/hsmmc-omap.h>
153 #define mmc_pdata(host) host->pdata
156 * MMC Host controller read/write API's
171 struct mmc_host *mmc; member
216 static int omap_hsmmc_enable_supply(struct mmc_host *mmc) in omap_hsmmc_enable_supply() argument
219 struct omap_hsmmc_host *host = mmc_priv(mmc); in omap_hsmmc_enable_supply()
220 struct mmc_ios *ios = &mmc->ios; in omap_hsmmc_enable_supply()
222 if (!IS_ERR(mmc->supply.vmmc)) { in omap_hsmmc_enable_supply()
223 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd); in omap_hsmmc_enable_supply()
229 if (!IS_ERR(mmc->supply.vqmmc) && !host->vqmmc_enabled) { in omap_hsmmc_enable_supply()
230 ret = regulator_enable(mmc->supply.vqmmc); in omap_hsmmc_enable_supply()
232 dev_err(mmc_dev(mmc), "vmmc_aux reg enable failed\n"); in omap_hsmmc_enable_supply()
235 host->vqmmc_enabled = true; in omap_hsmmc_enable_supply()
241 if (!IS_ERR(mmc->supply.vmmc)) in omap_hsmmc_enable_supply()
242 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); in omap_hsmmc_enable_supply()
247 static int omap_hsmmc_disable_supply(struct mmc_host *mmc) in omap_hsmmc_disable_supply() argument
251 struct omap_hsmmc_host *host = mmc_priv(mmc); in omap_hsmmc_disable_supply()
253 if (!IS_ERR(mmc->supply.vqmmc) && host->vqmmc_enabled) { in omap_hsmmc_disable_supply()
254 ret = regulator_disable(mmc->supply.vqmmc); in omap_hsmmc_disable_supply()
256 dev_err(mmc_dev(mmc), "vmmc_aux reg disable failed\n"); in omap_hsmmc_disable_supply()
259 host->vqmmc_enabled = false; in omap_hsmmc_disable_supply()
262 if (!IS_ERR(mmc->supply.vmmc)) { in omap_hsmmc_disable_supply()
263 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); in omap_hsmmc_disable_supply()
271 if (!IS_ERR(mmc->supply.vqmmc)) { in omap_hsmmc_disable_supply()
272 status = regulator_enable(mmc->supply.vqmmc); in omap_hsmmc_disable_supply()
274 dev_err(mmc_dev(mmc), "vmmc_aux re-enable failed\n"); in omap_hsmmc_disable_supply()
284 if (IS_ERR(host->pbias)) in omap_hsmmc_set_pbias()
288 if (!host->pbias_enabled) { in omap_hsmmc_set_pbias()
289 ret = regulator_enable(host->pbias); in omap_hsmmc_set_pbias()
291 dev_err(host->dev, "pbias reg enable fail\n"); in omap_hsmmc_set_pbias()
294 host->pbias_enabled = true; in omap_hsmmc_set_pbias()
297 if (host->pbias_enabled) { in omap_hsmmc_set_pbias()
298 ret = regulator_disable(host->pbias); in omap_hsmmc_set_pbias()
300 dev_err(host->dev, "pbias reg disable fail\n"); in omap_hsmmc_set_pbias()
303 host->pbias_enabled = false; in omap_hsmmc_set_pbias()
312 struct mmc_host *mmc = host->mmc; in omap_hsmmc_set_power() local
317 * voltage always-on regulator. in omap_hsmmc_set_power()
319 if (IS_ERR(mmc->supply.vmmc)) in omap_hsmmc_set_power()
340 ret = omap_hsmmc_enable_supply(mmc); in omap_hsmmc_set_power()
348 ret = omap_hsmmc_disable_supply(mmc); in omap_hsmmc_set_power()
356 omap_hsmmc_disable_supply(mmc); in omap_hsmmc_set_power()
383 struct mmc_host *mmc = host->mmc; in omap_hsmmc_disable_boot_regulators() local
391 ret = omap_hsmmc_disable_boot_regulator(mmc->supply.vmmc); in omap_hsmmc_disable_boot_regulators()
393 dev_err(host->dev, "fail to disable boot enabled vmmc reg\n"); in omap_hsmmc_disable_boot_regulators()
397 ret = omap_hsmmc_disable_boot_regulator(mmc->supply.vqmmc); in omap_hsmmc_disable_boot_regulators()
399 dev_err(host->dev, in omap_hsmmc_disable_boot_regulators()
404 ret = omap_hsmmc_disable_boot_regulator(host->pbias); in omap_hsmmc_disable_boot_regulators()
406 dev_err(host->dev, in omap_hsmmc_disable_boot_regulators()
417 struct mmc_host *mmc = host->mmc; in omap_hsmmc_reg_get() local
420 ret = mmc_regulator_get_supply(mmc); in omap_hsmmc_reg_get()
425 if (IS_ERR(mmc->supply.vqmmc)) { in omap_hsmmc_reg_get()
426 mmc->supply.vqmmc = devm_regulator_get_optional(host->dev, in omap_hsmmc_reg_get()
428 if (IS_ERR(mmc->supply.vqmmc)) { in omap_hsmmc_reg_get()
429 ret = PTR_ERR(mmc->supply.vqmmc); in omap_hsmmc_reg_get()
430 if ((ret != -ENODEV) && host->dev->of_node) in omap_hsmmc_reg_get()
432 dev_dbg(host->dev, "unable to get vmmc_aux regulator %ld\n", in omap_hsmmc_reg_get()
433 PTR_ERR(mmc->supply.vqmmc)); in omap_hsmmc_reg_get()
437 host->pbias = devm_regulator_get_optional(host->dev, "pbias"); in omap_hsmmc_reg_get()
438 if (IS_ERR(host->pbias)) { in omap_hsmmc_reg_get()
439 ret = PTR_ERR(host->pbias); in omap_hsmmc_reg_get()
440 if ((ret != -ENODEV) && host->dev->of_node) { in omap_hsmmc_reg_get()
441 dev_err(host->dev, in omap_hsmmc_reg_get()
445 dev_dbg(host->dev, "unable to get pbias regulator %ld\n", in omap_hsmmc_reg_get()
446 PTR_ERR(host->pbias)); in omap_hsmmc_reg_get()
450 if (mmc_pdata(host)->no_regulator_off_init) in omap_hsmmc_reg_get()
465 OMAP_HSMMC_WRITE(host->base, SYSCTL, in omap_hsmmc_start_clock()
466 OMAP_HSMMC_READ(host->base, SYSCTL) | CEN); in omap_hsmmc_start_clock()
474 OMAP_HSMMC_WRITE(host->base, SYSCTL, in omap_hsmmc_stop_clock()
475 OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN); in omap_hsmmc_stop_clock()
476 if ((OMAP_HSMMC_READ(host->base, SYSCTL) & CEN) != 0x0) in omap_hsmmc_stop_clock()
477 dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stopped\n"); in omap_hsmmc_stop_clock()
486 if (host->use_dma) in omap_hsmmc_enable_irq()
490 if (cmd->opcode == MMC_ERASE) in omap_hsmmc_enable_irq()
493 spin_lock_irqsave(&host->irq_lock, flags); in omap_hsmmc_enable_irq()
494 OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); in omap_hsmmc_enable_irq()
495 OMAP_HSMMC_WRITE(host->base, ISE, irq_mask); in omap_hsmmc_enable_irq()
497 /* latch pending CIRQ, but don't signal MMC core */ in omap_hsmmc_enable_irq()
498 if (host->flags & HSMMC_SDIO_IRQ_ENABLED) in omap_hsmmc_enable_irq()
500 OMAP_HSMMC_WRITE(host->base, IE, irq_mask); in omap_hsmmc_enable_irq()
501 spin_unlock_irqrestore(&host->irq_lock, flags); in omap_hsmmc_enable_irq()
509 spin_lock_irqsave(&host->irq_lock, flags); in omap_hsmmc_disable_irq()
511 if (host->flags & HSMMC_SDIO_IRQ_ENABLED) in omap_hsmmc_disable_irq()
513 OMAP_HSMMC_WRITE(host->base, ISE, irq_mask); in omap_hsmmc_disable_irq()
514 OMAP_HSMMC_WRITE(host->base, IE, irq_mask); in omap_hsmmc_disable_irq()
515 OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); in omap_hsmmc_disable_irq()
516 spin_unlock_irqrestore(&host->irq_lock, flags); in omap_hsmmc_disable_irq()
524 if (ios->clock) { in calc_divisor()
525 dsor = DIV_ROUND_UP(clk_get_rate(host->fclk), ios->clock); in calc_divisor()
535 struct mmc_ios *ios = &host->mmc->ios; in omap_hsmmc_set_clock()
540 dev_vdbg(mmc_dev(host->mmc), "Set clock to %uHz\n", ios->clock); in omap_hsmmc_set_clock()
544 regval = OMAP_HSMMC_READ(host->base, SYSCTL); in omap_hsmmc_set_clock()
548 OMAP_HSMMC_WRITE(host->base, SYSCTL, regval); in omap_hsmmc_set_clock()
549 OMAP_HSMMC_WRITE(host->base, SYSCTL, in omap_hsmmc_set_clock()
550 OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); in omap_hsmmc_set_clock()
554 while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != ICS in omap_hsmmc_set_clock()
559 * Enable High-Speed Support in omap_hsmmc_set_clock()
560 * Pre-Requisites in omap_hsmmc_set_clock()
561 * - Controller should support High-Speed-Enable Bit in omap_hsmmc_set_clock()
562 * - Controller should not be using DDR Mode in omap_hsmmc_set_clock()
563 * - Controller should advertise that it supports High Speed in omap_hsmmc_set_clock()
565 * - MMC/SD clock coming out of controller > 25MHz in omap_hsmmc_set_clock()
567 if ((mmc_pdata(host)->features & HSMMC_HAS_HSPE_SUPPORT) && in omap_hsmmc_set_clock()
568 (ios->timing != MMC_TIMING_MMC_DDR52) && in omap_hsmmc_set_clock()
569 (ios->timing != MMC_TIMING_UHS_DDR50) && in omap_hsmmc_set_clock()
570 ((OMAP_HSMMC_READ(host->base, CAPA) & HSS) == HSS)) { in omap_hsmmc_set_clock()
571 regval = OMAP_HSMMC_READ(host->base, HCTL); in omap_hsmmc_set_clock()
572 if (clkdiv && (clk_get_rate(host->fclk)/clkdiv) > 25000000) in omap_hsmmc_set_clock()
577 OMAP_HSMMC_WRITE(host->base, HCTL, regval); in omap_hsmmc_set_clock()
585 struct mmc_ios *ios = &host->mmc->ios; in omap_hsmmc_set_bus_width()
588 con = OMAP_HSMMC_READ(host->base, CON); in omap_hsmmc_set_bus_width()
589 if (ios->timing == MMC_TIMING_MMC_DDR52 || in omap_hsmmc_set_bus_width()
590 ios->timing == MMC_TIMING_UHS_DDR50) in omap_hsmmc_set_bus_width()
594 switch (ios->bus_width) { in omap_hsmmc_set_bus_width()
596 OMAP_HSMMC_WRITE(host->base, CON, con | DW8); in omap_hsmmc_set_bus_width()
599 OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); in omap_hsmmc_set_bus_width()
600 OMAP_HSMMC_WRITE(host->base, HCTL, in omap_hsmmc_set_bus_width()
601 OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT); in omap_hsmmc_set_bus_width()
604 OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); in omap_hsmmc_set_bus_width()
605 OMAP_HSMMC_WRITE(host->base, HCTL, in omap_hsmmc_set_bus_width()
606 OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT); in omap_hsmmc_set_bus_width()
613 struct mmc_ios *ios = &host->mmc->ios; in omap_hsmmc_set_bus_mode()
616 con = OMAP_HSMMC_READ(host->base, CON); in omap_hsmmc_set_bus_mode()
617 if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) in omap_hsmmc_set_bus_mode()
618 OMAP_HSMMC_WRITE(host->base, CON, con | OD); in omap_hsmmc_set_bus_mode()
620 OMAP_HSMMC_WRITE(host->base, CON, con & ~OD); in omap_hsmmc_set_bus_mode()
626 * Restore the MMC host context, if it was lost as result of a
631 struct mmc_ios *ios = &host->mmc->ios; in omap_hsmmc_context_restore()
635 if (host->con == OMAP_HSMMC_READ(host->base, CON) && in omap_hsmmc_context_restore()
636 host->hctl == OMAP_HSMMC_READ(host->base, HCTL) && in omap_hsmmc_context_restore()
637 host->sysctl == OMAP_HSMMC_READ(host->base, SYSCTL) && in omap_hsmmc_context_restore()
638 host->capa == OMAP_HSMMC_READ(host->base, CAPA)) in omap_hsmmc_context_restore()
641 host->context_loss++; in omap_hsmmc_context_restore()
643 if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) { in omap_hsmmc_context_restore()
644 if (host->power_mode != MMC_POWER_OFF && in omap_hsmmc_context_restore()
645 (1 << ios->vdd) <= MMC_VDD_23_24) in omap_hsmmc_context_restore()
655 if (host->mmc->caps & MMC_CAP_SDIO_IRQ) in omap_hsmmc_context_restore()
658 OMAP_HSMMC_WRITE(host->base, HCTL, in omap_hsmmc_context_restore()
659 OMAP_HSMMC_READ(host->base, HCTL) | hctl); in omap_hsmmc_context_restore()
661 OMAP_HSMMC_WRITE(host->base, CAPA, in omap_hsmmc_context_restore()
662 OMAP_HSMMC_READ(host->base, CAPA) | capa); in omap_hsmmc_context_restore()
664 OMAP_HSMMC_WRITE(host->base, HCTL, in omap_hsmmc_context_restore()
665 OMAP_HSMMC_READ(host->base, HCTL) | SDBP); in omap_hsmmc_context_restore()
668 while ((OMAP_HSMMC_READ(host->base, HCTL) & SDBP) != SDBP in omap_hsmmc_context_restore()
672 OMAP_HSMMC_WRITE(host->base, ISE, 0); in omap_hsmmc_context_restore()
673 OMAP_HSMMC_WRITE(host->base, IE, 0); in omap_hsmmc_context_restore()
674 OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); in omap_hsmmc_context_restore()
676 /* Do not initialize card-specific things if the power is off */ in omap_hsmmc_context_restore()
677 if (host->power_mode == MMC_POWER_OFF) in omap_hsmmc_context_restore()
687 dev_dbg(mmc_dev(host->mmc), "context is restored: restore count %d\n", in omap_hsmmc_context_restore()
688 host->context_loss); in omap_hsmmc_context_restore()
693 * Save the MMC host context (store the number of power state changes so far).
697 host->con = OMAP_HSMMC_READ(host->base, CON); in omap_hsmmc_context_save()
698 host->hctl = OMAP_HSMMC_READ(host->base, HCTL); in omap_hsmmc_context_save()
699 host->sysctl = OMAP_HSMMC_READ(host->base, SYSCTL); in omap_hsmmc_context_save()
700 host->capa = OMAP_HSMMC_READ(host->base, CAPA); in omap_hsmmc_context_save()
720 disable_irq(host->irq); in send_init_stream()
722 OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); in send_init_stream()
723 OMAP_HSMMC_WRITE(host->base, CON, in send_init_stream()
724 OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM); in send_init_stream()
725 OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD); in send_init_stream()
729 reg = OMAP_HSMMC_READ(host->base, STAT) & CC_EN; in send_init_stream()
731 OMAP_HSMMC_WRITE(host->base, CON, in send_init_stream()
732 OMAP_HSMMC_READ(host->base, CON) & ~INIT_STREAM); in send_init_stream()
734 OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); in send_init_stream()
735 OMAP_HSMMC_READ(host->base, STAT); in send_init_stream()
737 enable_irq(host->irq); in send_init_stream()
744 struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); in omap_hsmmc_show_slot_name() local
745 struct omap_hsmmc_host *host = mmc_priv(mmc); in omap_hsmmc_show_slot_name()
747 return sprintf(buf, "%s\n", mmc_pdata(host)->name); in omap_hsmmc_show_slot_name()
761 dev_vdbg(mmc_dev(host->mmc), "%s: CMD%d, argument 0x%08x\n", in omap_hsmmc_start_command()
762 mmc_hostname(host->mmc), cmd->opcode, cmd->arg); in omap_hsmmc_start_command()
763 host->cmd = cmd; in omap_hsmmc_start_command()
767 host->response_busy = 0; in omap_hsmmc_start_command()
768 if (cmd->flags & MMC_RSP_PRESENT) { in omap_hsmmc_start_command()
769 if (cmd->flags & MMC_RSP_136) in omap_hsmmc_start_command()
771 else if (cmd->flags & MMC_RSP_BUSY) { in omap_hsmmc_start_command()
773 host->response_busy = 1; in omap_hsmmc_start_command()
783 if (cmd == host->mrq->stop) in omap_hsmmc_start_command()
786 cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22); in omap_hsmmc_start_command()
788 if ((host->flags & AUTO_CMD23) && mmc_op_multi(cmd->opcode) && in omap_hsmmc_start_command()
789 host->mrq->sbc) { in omap_hsmmc_start_command()
791 OMAP_HSMMC_WRITE(host->base, SDMASA, host->mrq->sbc->arg); in omap_hsmmc_start_command()
795 if (data->flags & MMC_DATA_READ) in omap_hsmmc_start_command()
801 if (host->use_dma) in omap_hsmmc_start_command()
804 host->req_in_progress = 1; in omap_hsmmc_start_command()
806 OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg); in omap_hsmmc_start_command()
807 OMAP_HSMMC_WRITE(host->base, CMD, cmdreg); in omap_hsmmc_start_command()
813 return data->flags & MMC_DATA_WRITE ? host->tx_chan : host->rx_chan; in omap_hsmmc_get_dma_chan()
821 spin_lock_irqsave(&host->irq_lock, flags); in omap_hsmmc_request_done()
822 host->req_in_progress = 0; in omap_hsmmc_request_done()
823 dma_ch = host->dma_ch; in omap_hsmmc_request_done()
824 spin_unlock_irqrestore(&host->irq_lock, flags); in omap_hsmmc_request_done()
828 if (mrq->data && host->use_dma && dma_ch != -1) in omap_hsmmc_request_done()
830 host->mrq = NULL; in omap_hsmmc_request_done()
831 mmc_request_done(host->mmc, mrq); in omap_hsmmc_request_done()
835 * Notify the transfer complete to MMC core
841 struct mmc_request *mrq = host->mrq; in omap_hsmmc_xfer_done()
843 /* TC before CC from CMD6 - don't know why, but it happens */ in omap_hsmmc_xfer_done()
844 if (host->cmd && host->cmd->opcode == 6 && in omap_hsmmc_xfer_done()
845 host->response_busy) { in omap_hsmmc_xfer_done()
846 host->response_busy = 0; in omap_hsmmc_xfer_done()
854 host->data = NULL; in omap_hsmmc_xfer_done()
856 if (!data->error) in omap_hsmmc_xfer_done()
857 data->bytes_xfered += data->blocks * (data->blksz); in omap_hsmmc_xfer_done()
859 data->bytes_xfered = 0; in omap_hsmmc_xfer_done()
861 if (data->stop && (data->error || !host->mrq->sbc)) in omap_hsmmc_xfer_done()
862 omap_hsmmc_start_command(host, data->stop, NULL); in omap_hsmmc_xfer_done()
864 omap_hsmmc_request_done(host, data->mrq); in omap_hsmmc_xfer_done()
873 if (host->mrq->sbc && (host->cmd == host->mrq->sbc) && in omap_hsmmc_cmd_done()
874 !host->mrq->sbc->error && !(host->flags & AUTO_CMD23)) { in omap_hsmmc_cmd_done()
875 host->cmd = NULL; in omap_hsmmc_cmd_done()
877 omap_hsmmc_start_command(host, host->mrq->cmd, in omap_hsmmc_cmd_done()
878 host->mrq->data); in omap_hsmmc_cmd_done()
882 host->cmd = NULL; in omap_hsmmc_cmd_done()
884 if (cmd->flags & MMC_RSP_PRESENT) { in omap_hsmmc_cmd_done()
885 if (cmd->flags & MMC_RSP_136) { in omap_hsmmc_cmd_done()
887 cmd->resp[3] = OMAP_HSMMC_READ(host->base, RSP10); in omap_hsmmc_cmd_done()
888 cmd->resp[2] = OMAP_HSMMC_READ(host->base, RSP32); in omap_hsmmc_cmd_done()
889 cmd->resp[1] = OMAP_HSMMC_READ(host->base, RSP54); in omap_hsmmc_cmd_done()
890 cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP76); in omap_hsmmc_cmd_done()
893 cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP10); in omap_hsmmc_cmd_done()
896 if ((host->data == NULL && !host->response_busy) || cmd->error) in omap_hsmmc_cmd_done()
897 omap_hsmmc_request_done(host, host->mrq); in omap_hsmmc_cmd_done()
908 host->data->error = errno; in omap_hsmmc_dma_cleanup()
910 spin_lock_irqsave(&host->irq_lock, flags); in omap_hsmmc_dma_cleanup()
911 dma_ch = host->dma_ch; in omap_hsmmc_dma_cleanup()
912 host->dma_ch = -1; in omap_hsmmc_dma_cleanup()
913 spin_unlock_irqrestore(&host->irq_lock, flags); in omap_hsmmc_dma_cleanup()
915 if (host->use_dma && dma_ch != -1) { in omap_hsmmc_dma_cleanup()
916 struct dma_chan *chan = omap_hsmmc_get_dma_chan(host, host->data); in omap_hsmmc_dma_cleanup()
919 dma_unmap_sg(chan->device->dev, in omap_hsmmc_dma_cleanup()
920 host->data->sg, host->data->sg_len, in omap_hsmmc_dma_cleanup()
921 mmc_get_dma_dir(host->data)); in omap_hsmmc_dma_cleanup()
923 host->data->host_cookie = 0; in omap_hsmmc_dma_cleanup()
925 host->data = NULL; in omap_hsmmc_dma_cleanup()
934 /* --- means reserved bit without definition at documentation */ in omap_hsmmc_dbg_report_irq()
936 "CC" , "TC" , "BGE", "---", "BWR" , "BRR" , "---" , "---" , in omap_hsmmc_dbg_report_irq()
937 "CIRQ", "OBI" , "---", "---", "---" , "---" , "---" , "ERRI", in omap_hsmmc_dbg_report_irq()
938 "CTO" , "CCRC", "CEB", "CIE", "DTO" , "DCRC", "DEB" , "---" , in omap_hsmmc_dbg_report_irq()
939 "ACE" , "---" , "---", "---", "CERR", "BADA", "---" , "---" in omap_hsmmc_dbg_report_irq()
945 len = sprintf(buf, "MMC IRQ 0x%x :", status); in omap_hsmmc_dbg_report_irq()
954 dev_vdbg(mmc_dev(host->mmc), "%s\n", res); in omap_hsmmc_dbg_report_irq()
964 * MMC controller internal state machines reset
976 OMAP_HSMMC_WRITE(host->base, SYSCTL, in omap_hsmmc_reset_controller_fsm()
977 OMAP_HSMMC_READ(host->base, SYSCTL) | bit); in omap_hsmmc_reset_controller_fsm()
981 * Monitor a 0->1 transition first in omap_hsmmc_reset_controller_fsm()
983 if (mmc_pdata(host)->features & HSMMC_HAS_UPDATED_RESET) { in omap_hsmmc_reset_controller_fsm()
984 while ((!(OMAP_HSMMC_READ(host->base, SYSCTL) & bit)) in omap_hsmmc_reset_controller_fsm()
990 while ((OMAP_HSMMC_READ(host->base, SYSCTL) & bit) && in omap_hsmmc_reset_controller_fsm()
994 if (OMAP_HSMMC_READ(host->base, SYSCTL) & bit) in omap_hsmmc_reset_controller_fsm()
995 dev_err(mmc_dev(host->mmc), in omap_hsmmc_reset_controller_fsm()
1005 if (host->cmd) in hsmmc_command_incomplete()
1006 host->cmd->error = err; in hsmmc_command_incomplete()
1009 if (host->data) { in hsmmc_command_incomplete()
1012 } else if (host->mrq && host->mrq->cmd) in hsmmc_command_incomplete()
1013 host->mrq->cmd->error = err; in hsmmc_command_incomplete()
1022 data = host->data; in omap_hsmmc_do_irq()
1023 dev_vdbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); in omap_hsmmc_do_irq()
1030 if (host->data || host->response_busy) { in omap_hsmmc_do_irq()
1032 host->response_busy = 0; in omap_hsmmc_do_irq()
1035 hsmmc_command_incomplete(host, -ETIMEDOUT, end_cmd); in omap_hsmmc_do_irq()
1038 hsmmc_command_incomplete(host, -EILSEQ, end_cmd); in omap_hsmmc_do_irq()
1042 ac12 = OMAP_HSMMC_READ(host->base, AC12); in omap_hsmmc_do_irq()
1043 if (!(ac12 & ACNE) && host->mrq->sbc) { in omap_hsmmc_do_irq()
1046 error = -ETIMEDOUT; in omap_hsmmc_do_irq()
1048 error = -EILSEQ; in omap_hsmmc_do_irq()
1049 host->mrq->sbc->error = error; in omap_hsmmc_do_irq()
1052 dev_dbg(mmc_dev(host->mmc), "AC12 err: 0x%x\n", ac12); in omap_hsmmc_do_irq()
1056 OMAP_HSMMC_WRITE(host->base, STAT, status); in omap_hsmmc_do_irq()
1057 if (end_cmd || ((status & CC_EN) && host->cmd)) in omap_hsmmc_do_irq()
1058 omap_hsmmc_cmd_done(host, host->cmd); in omap_hsmmc_do_irq()
1059 if ((end_trans || (status & TC_EN)) && host->mrq) in omap_hsmmc_do_irq()
1064 * MMC controller IRQ handler
1071 status = OMAP_HSMMC_READ(host->base, STAT); in omap_hsmmc_irq()
1073 if (host->req_in_progress) in omap_hsmmc_irq()
1077 mmc_signal_sdio_irq(host->mmc); in omap_hsmmc_irq()
1080 status = OMAP_HSMMC_READ(host->base, STAT); in omap_hsmmc_irq()
1090 OMAP_HSMMC_WRITE(host->base, HCTL, in set_sd_bus_power()
1091 OMAP_HSMMC_READ(host->base, HCTL) | SDBP); in set_sd_bus_power()
1093 if (OMAP_HSMMC_READ(host->base, HCTL) & SDBP) in set_sd_bus_power()
1100 * Switch MMC interface voltage ... only relevant for MMC1.
1112 clk_disable_unprepare(host->dbclk); in omap_hsmmc_switch_opcond()
1120 clk_prepare_enable(host->dbclk); in omap_hsmmc_switch_opcond()
1125 OMAP_HSMMC_WRITE(host->base, HCTL, in omap_hsmmc_switch_opcond()
1126 OMAP_HSMMC_READ(host->base, HCTL) & SDVSCLR); in omap_hsmmc_switch_opcond()
1127 reg_val = OMAP_HSMMC_READ(host->base, HCTL); in omap_hsmmc_switch_opcond()
1130 * If a MMC dual voltage card is detected, the set_ios fn calls in omap_hsmmc_switch_opcond()
1135 * - "1.8V" for vdds_mmc1/vdds_mmc1a can be up to 2.45V max, in omap_hsmmc_switch_opcond()
1137 * - "3.0V" for vdds_mmc1/vdds_mmc1a can be up to 3.5V max, in omap_hsmmc_switch_opcond()
1140 * Board setup code shouldn't permit anything very out-of-range. in omap_hsmmc_switch_opcond()
1141 * TWL4030-family VMMC1 and VSIM regulators are fine (avoiding the in omap_hsmmc_switch_opcond()
1149 OMAP_HSMMC_WRITE(host->base, HCTL, reg_val); in omap_hsmmc_switch_opcond()
1154 dev_err(mmc_dev(host->mmc), "Unable to switch operating voltage\n"); in omap_hsmmc_switch_opcond()
1165 spin_lock_irq(&host->irq_lock); in omap_hsmmc_dma_callback()
1166 if (host->dma_ch < 0) { in omap_hsmmc_dma_callback()
1167 spin_unlock_irq(&host->irq_lock); in omap_hsmmc_dma_callback()
1171 data = host->mrq->data; in omap_hsmmc_dma_callback()
1173 if (!data->host_cookie) in omap_hsmmc_dma_callback()
1174 dma_unmap_sg(chan->device->dev, in omap_hsmmc_dma_callback()
1175 data->sg, data->sg_len, in omap_hsmmc_dma_callback()
1178 req_in_progress = host->req_in_progress; in omap_hsmmc_dma_callback()
1179 host->dma_ch = -1; in omap_hsmmc_dma_callback()
1180 spin_unlock_irq(&host->irq_lock); in omap_hsmmc_dma_callback()
1184 struct mmc_request *mrq = host->mrq; in omap_hsmmc_dma_callback()
1186 host->mrq = NULL; in omap_hsmmc_dma_callback()
1187 mmc_request_done(host->mmc, mrq); in omap_hsmmc_dma_callback()
1198 if (!next && data->host_cookie && in omap_hsmmc_pre_dma_transfer()
1199 data->host_cookie != host->next_data.cookie) { in omap_hsmmc_pre_dma_transfer()
1200 dev_warn(host->dev, "[%s] invalid cookie: data->host_cookie %d" in omap_hsmmc_pre_dma_transfer()
1201 " host->next_data.cookie %d\n", in omap_hsmmc_pre_dma_transfer()
1202 __func__, data->host_cookie, host->next_data.cookie); in omap_hsmmc_pre_dma_transfer()
1203 data->host_cookie = 0; in omap_hsmmc_pre_dma_transfer()
1207 if (next || data->host_cookie != host->next_data.cookie) { in omap_hsmmc_pre_dma_transfer()
1208 dma_len = dma_map_sg(chan->device->dev, data->sg, data->sg_len, in omap_hsmmc_pre_dma_transfer()
1212 dma_len = host->next_data.dma_len; in omap_hsmmc_pre_dma_transfer()
1213 host->next_data.dma_len = 0; in omap_hsmmc_pre_dma_transfer()
1218 return -EINVAL; in omap_hsmmc_pre_dma_transfer()
1221 next->dma_len = dma_len; in omap_hsmmc_pre_dma_transfer()
1222 data->host_cookie = ++next->cookie < 0 ? 1 : next->cookie; in omap_hsmmc_pre_dma_transfer()
1224 host->dma_len = dma_len; in omap_hsmmc_pre_dma_transfer()
1230 * Routine to configure and start DMA for the MMC card
1237 struct mmc_data *data = req->data; in omap_hsmmc_setup_dma_transfer()
1240 .src_addr = host->mapbase + OMAP_HSMMC_DATA, in omap_hsmmc_setup_dma_transfer()
1241 .dst_addr = host->mapbase + OMAP_HSMMC_DATA, in omap_hsmmc_setup_dma_transfer()
1244 .src_maxburst = data->blksz / 4, in omap_hsmmc_setup_dma_transfer()
1245 .dst_maxburst = data->blksz / 4, in omap_hsmmc_setup_dma_transfer()
1249 for (i = 0; i < data->sg_len; i++) { in omap_hsmmc_setup_dma_transfer()
1252 sgl = data->sg + i; in omap_hsmmc_setup_dma_transfer()
1253 if (sgl->length % data->blksz) in omap_hsmmc_setup_dma_transfer()
1254 return -EINVAL; in omap_hsmmc_setup_dma_transfer()
1256 if ((data->blksz % 4) != 0) in omap_hsmmc_setup_dma_transfer()
1257 /* REVISIT: The MMC buffer increments only when MSB is written. in omap_hsmmc_setup_dma_transfer()
1260 return -EINVAL; in omap_hsmmc_setup_dma_transfer()
1262 BUG_ON(host->dma_ch != -1); in omap_hsmmc_setup_dma_transfer()
1274 tx = dmaengine_prep_slave_sg(chan, data->sg, data->sg_len, in omap_hsmmc_setup_dma_transfer()
1275 data->flags & MMC_DATA_WRITE ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM, in omap_hsmmc_setup_dma_transfer()
1278 dev_err(mmc_dev(host->mmc), "prep_slave_sg() failed\n"); in omap_hsmmc_setup_dma_transfer()
1280 return -1; in omap_hsmmc_setup_dma_transfer()
1283 tx->callback = omap_hsmmc_dma_callback; in omap_hsmmc_setup_dma_transfer()
1284 tx->callback_param = host; in omap_hsmmc_setup_dma_transfer()
1289 host->dma_ch = 1; in omap_hsmmc_setup_dma_transfer()
1302 reg = OMAP_HSMMC_READ(host->base, SYSCTL); in set_data_timeout()
1307 cycle_ns = 1000000000 / (host->clk_rate / clkd); in set_data_timeout()
1315 dto = 31 - dto; in set_data_timeout()
1320 dto -= 13; in set_data_timeout()
1329 OMAP_HSMMC_WRITE(host->base, SYSCTL, reg); in set_data_timeout()
1334 struct mmc_request *req = host->mrq; in omap_hsmmc_start_dma_transfer()
1337 if (!req->data) in omap_hsmmc_start_dma_transfer()
1339 OMAP_HSMMC_WRITE(host->base, BLK, (req->data->blksz) in omap_hsmmc_start_dma_transfer()
1340 | (req->data->blocks << 16)); in omap_hsmmc_start_dma_transfer()
1341 set_data_timeout(host, req->data->timeout_ns, in omap_hsmmc_start_dma_transfer()
1342 req->data->timeout_clks); in omap_hsmmc_start_dma_transfer()
1343 chan = omap_hsmmc_get_dma_chan(host, req->data); in omap_hsmmc_start_dma_transfer()
1348 * Configure block length for MMC/SD cards and initiate the transfer.
1356 host->data = req->data; in omap_hsmmc_prepare_data()
1358 if (req->data == NULL) { in omap_hsmmc_prepare_data()
1359 OMAP_HSMMC_WRITE(host->base, BLK, 0); in omap_hsmmc_prepare_data()
1360 if (req->cmd->flags & MMC_RSP_BUSY) { in omap_hsmmc_prepare_data()
1361 timeout = req->cmd->busy_timeout * NSEC_PER_MSEC; in omap_hsmmc_prepare_data()
1375 if (host->use_dma) { in omap_hsmmc_prepare_data()
1378 dev_err(mmc_dev(host->mmc), "MMC start dma failure\n"); in omap_hsmmc_prepare_data()
1385 static void omap_hsmmc_post_req(struct mmc_host *mmc, struct mmc_request *mrq, in omap_hsmmc_post_req() argument
1388 struct omap_hsmmc_host *host = mmc_priv(mmc); in omap_hsmmc_post_req()
1389 struct mmc_data *data = mrq->data; in omap_hsmmc_post_req()
1391 if (host->use_dma && data->host_cookie) { in omap_hsmmc_post_req()
1394 dma_unmap_sg(c->device->dev, data->sg, data->sg_len, in omap_hsmmc_post_req()
1396 data->host_cookie = 0; in omap_hsmmc_post_req()
1400 static void omap_hsmmc_pre_req(struct mmc_host *mmc, struct mmc_request *mrq) in omap_hsmmc_pre_req() argument
1402 struct omap_hsmmc_host *host = mmc_priv(mmc); in omap_hsmmc_pre_req()
1404 if (mrq->data->host_cookie) { in omap_hsmmc_pre_req()
1405 mrq->data->host_cookie = 0; in omap_hsmmc_pre_req()
1409 if (host->use_dma) { in omap_hsmmc_pre_req()
1410 struct dma_chan *c = omap_hsmmc_get_dma_chan(host, mrq->data); in omap_hsmmc_pre_req()
1412 if (omap_hsmmc_pre_dma_transfer(host, mrq->data, in omap_hsmmc_pre_req()
1413 &host->next_data, c)) in omap_hsmmc_pre_req()
1414 mrq->data->host_cookie = 0; in omap_hsmmc_pre_req()
1421 static void omap_hsmmc_request(struct mmc_host *mmc, struct mmc_request *req) in omap_hsmmc_request() argument
1423 struct omap_hsmmc_host *host = mmc_priv(mmc); in omap_hsmmc_request()
1426 BUG_ON(host->req_in_progress); in omap_hsmmc_request()
1427 BUG_ON(host->dma_ch != -1); in omap_hsmmc_request()
1428 if (host->reqs_blocked) in omap_hsmmc_request()
1429 host->reqs_blocked = 0; in omap_hsmmc_request()
1430 WARN_ON(host->mrq != NULL); in omap_hsmmc_request()
1431 host->mrq = req; in omap_hsmmc_request()
1432 host->clk_rate = clk_get_rate(host->fclk); in omap_hsmmc_request()
1435 req->cmd->error = err; in omap_hsmmc_request()
1436 if (req->data) in omap_hsmmc_request()
1437 req->data->error = err; in omap_hsmmc_request()
1438 host->mrq = NULL; in omap_hsmmc_request()
1439 mmc_request_done(mmc, req); in omap_hsmmc_request()
1442 if (req->sbc && !(host->flags & AUTO_CMD23)) { in omap_hsmmc_request()
1443 omap_hsmmc_start_command(host, req->sbc, NULL); in omap_hsmmc_request()
1448 omap_hsmmc_start_command(host, req->cmd, req->data); in omap_hsmmc_request()
1452 static void omap_hsmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in omap_hsmmc_set_ios() argument
1454 struct omap_hsmmc_host *host = mmc_priv(mmc); in omap_hsmmc_set_ios()
1457 if (ios->power_mode != host->power_mode) { in omap_hsmmc_set_ios()
1458 switch (ios->power_mode) { in omap_hsmmc_set_ios()
1469 host->power_mode = ios->power_mode; in omap_hsmmc_set_ios()
1476 if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) { in omap_hsmmc_set_ios()
1480 if ((OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET) && in omap_hsmmc_set_ios()
1481 (ios->vdd == DUAL_VOLT_OCR_BIT)) { in omap_hsmmc_set_ios()
1488 if (omap_hsmmc_switch_opcond(host, ios->vdd) != 0) in omap_hsmmc_set_ios()
1489 dev_dbg(mmc_dev(host->mmc), in omap_hsmmc_set_ios()
1502 static void omap_hsmmc_enable_sdio_irq(struct mmc_host *mmc, int enable) in omap_hsmmc_enable_sdio_irq() argument
1504 struct omap_hsmmc_host *host = mmc_priv(mmc); in omap_hsmmc_enable_sdio_irq()
1508 spin_lock_irqsave(&host->irq_lock, flags); in omap_hsmmc_enable_sdio_irq()
1510 con = OMAP_HSMMC_READ(host->base, CON); in omap_hsmmc_enable_sdio_irq()
1511 irq_mask = OMAP_HSMMC_READ(host->base, ISE); in omap_hsmmc_enable_sdio_irq()
1513 host->flags |= HSMMC_SDIO_IRQ_ENABLED; in omap_hsmmc_enable_sdio_irq()
1517 host->flags &= ~HSMMC_SDIO_IRQ_ENABLED; in omap_hsmmc_enable_sdio_irq()
1521 OMAP_HSMMC_WRITE(host->base, CON, con); in omap_hsmmc_enable_sdio_irq()
1522 OMAP_HSMMC_WRITE(host->base, IE, irq_mask); in omap_hsmmc_enable_sdio_irq()
1528 if (!host->req_in_progress || !enable) in omap_hsmmc_enable_sdio_irq()
1529 OMAP_HSMMC_WRITE(host->base, ISE, irq_mask); in omap_hsmmc_enable_sdio_irq()
1532 OMAP_HSMMC_READ(host->base, IE); in omap_hsmmc_enable_sdio_irq()
1534 spin_unlock_irqrestore(&host->irq_lock, flags); in omap_hsmmc_enable_sdio_irq()
1542 * For omaps with wake-up path, wakeirq will be irq from pinctrl and in omap_hsmmc_configure_wake_irq()
1547 if (!host->dev->of_node || !host->wake_irq) in omap_hsmmc_configure_wake_irq()
1548 return -ENODEV; in omap_hsmmc_configure_wake_irq()
1550 ret = dev_pm_set_dedicated_wake_irq(host->dev, host->wake_irq); in omap_hsmmc_configure_wake_irq()
1552 dev_err(mmc_dev(host->mmc), "Unable to request wake IRQ\n"); in omap_hsmmc_configure_wake_irq()
1557 * Some omaps don't have wake-up path from deeper idle states in omap_hsmmc_configure_wake_irq()
1558 * and need to remux SDIO DAT1 to GPIO for wake-up from idle. in omap_hsmmc_configure_wake_irq()
1560 if (host->pdata->controller_flags & OMAP_HSMMC_SWAKEUP_MISSING) { in omap_hsmmc_configure_wake_irq()
1561 struct pinctrl *p = devm_pinctrl_get(host->dev); in omap_hsmmc_configure_wake_irq()
1568 dev_info(host->dev, "missing idle pinctrl state\n"); in omap_hsmmc_configure_wake_irq()
1570 ret = -EINVAL; in omap_hsmmc_configure_wake_irq()
1576 OMAP_HSMMC_WRITE(host->base, HCTL, in omap_hsmmc_configure_wake_irq()
1577 OMAP_HSMMC_READ(host->base, HCTL) | IWE); in omap_hsmmc_configure_wake_irq()
1581 dev_pm_clear_wake_irq(host->dev); in omap_hsmmc_configure_wake_irq()
1583 dev_warn(host->dev, "no SDIO IRQ support, falling back to polling\n"); in omap_hsmmc_configure_wake_irq()
1584 host->wake_irq = 0; in omap_hsmmc_configure_wake_irq()
1593 if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) { in omap_hsmmc_conf_bus_power()
1601 value = OMAP_HSMMC_READ(host->base, HCTL) & ~SDVS_MASK; in omap_hsmmc_conf_bus_power()
1602 OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl); in omap_hsmmc_conf_bus_power()
1604 value = OMAP_HSMMC_READ(host->base, CAPA); in omap_hsmmc_conf_bus_power()
1605 OMAP_HSMMC_WRITE(host->base, CAPA, value | capa); in omap_hsmmc_conf_bus_power()
1635 struct mmc_host *mmc = s->private; in mmc_regs_show() local
1636 struct omap_hsmmc_host *host = mmc_priv(mmc); in mmc_regs_show()
1638 seq_printf(s, "mmc%d:\n", mmc->index); in mmc_regs_show()
1640 (mmc->caps & MMC_CAP_SDIO_IRQ) ? "interrupt" : "polling"); in mmc_regs_show()
1642 if (mmc->caps & MMC_CAP_SDIO_IRQ) { in mmc_regs_show()
1644 (host->flags & HSMMC_SDIO_IRQ_ENABLED) ? "enabled" in mmc_regs_show()
1647 seq_printf(s, "ctx_loss:\t%d\n", host->context_loss); in mmc_regs_show()
1649 pm_runtime_get_sync(host->dev); in mmc_regs_show()
1652 OMAP_HSMMC_READ(host->base, CON)); in mmc_regs_show()
1654 OMAP_HSMMC_READ(host->base, PSTATE)); in mmc_regs_show()
1656 OMAP_HSMMC_READ(host->base, HCTL)); in mmc_regs_show()
1658 OMAP_HSMMC_READ(host->base, SYSCTL)); in mmc_regs_show()
1660 OMAP_HSMMC_READ(host->base, IE)); in mmc_regs_show()
1662 OMAP_HSMMC_READ(host->base, ISE)); in mmc_regs_show()
1664 OMAP_HSMMC_READ(host->base, CAPA)); in mmc_regs_show()
1666 pm_runtime_mark_last_busy(host->dev); in mmc_regs_show()
1667 pm_runtime_put_autosuspend(host->dev); in mmc_regs_show()
1674 static void omap_hsmmc_debugfs(struct mmc_host *mmc) in omap_hsmmc_debugfs() argument
1676 if (mmc->debugfs_root) in omap_hsmmc_debugfs()
1677 debugfs_create_file("regs", S_IRUSR, mmc->debugfs_root, in omap_hsmmc_debugfs()
1678 mmc, &mmc_regs_fops); in omap_hsmmc_debugfs()
1683 static void omap_hsmmc_debugfs(struct mmc_host *mmc) in omap_hsmmc_debugfs() argument
1705 .compatible = "ti,omap2-hsmmc",
1708 .compatible = "ti,omap3-pre-es3-hsmmc",
1712 .compatible = "ti,omap3-hsmmc",
1715 .compatible = "ti,omap4-hsmmc",
1719 .compatible = "ti,am33xx-hsmmc",
1729 struct device_node *np = dev->of_node; in of_get_hsmmc_pdata()
1733 return ERR_PTR(-ENOMEM); /* out of memory */ in of_get_hsmmc_pdata()
1736 if (legacy && legacy->name) in of_get_hsmmc_pdata()
1737 pdata->name = legacy->name; in of_get_hsmmc_pdata()
1739 if (of_property_read_bool(np, "ti,dual-volt")) in of_get_hsmmc_pdata()
1740 pdata->controller_flags |= OMAP_HSMMC_SUPPORTS_DUAL_VOLT; in of_get_hsmmc_pdata()
1742 if (of_property_read_bool(np, "ti,non-removable")) { in of_get_hsmmc_pdata()
1743 pdata->nonremovable = true; in of_get_hsmmc_pdata()
1744 pdata->no_regulator_off_init = true; in of_get_hsmmc_pdata()
1747 if (of_property_read_bool(np, "ti,needs-special-reset")) in of_get_hsmmc_pdata()
1748 pdata->features |= HSMMC_HAS_UPDATED_RESET; in of_get_hsmmc_pdata()
1750 if (of_property_read_bool(np, "ti,needs-special-hs-handling")) in of_get_hsmmc_pdata()
1751 pdata->features |= HSMMC_HAS_HSPE_SUPPORT; in of_get_hsmmc_pdata()
1759 return ERR_PTR(-EINVAL); in of_get_hsmmc_pdata()
1765 struct omap_hsmmc_platform_data *pdata = pdev->dev.platform_data; in omap_hsmmc_probe()
1766 struct mmc_host *mmc; in omap_hsmmc_probe() local
1774 match = of_match_device(of_match_ptr(omap_mmc_of_match), &pdev->dev); in omap_hsmmc_probe()
1776 pdata = of_get_hsmmc_pdata(&pdev->dev); in omap_hsmmc_probe()
1781 if (match->data) { in omap_hsmmc_probe()
1782 data = match->data; in omap_hsmmc_probe()
1783 pdata->reg_offset = data->reg_offset; in omap_hsmmc_probe()
1784 pdata->controller_flags |= data->controller_flags; in omap_hsmmc_probe()
1789 dev_err(&pdev->dev, "Platform Data is missing\n"); in omap_hsmmc_probe()
1790 return -ENXIO; in omap_hsmmc_probe()
1801 mmc = mmc_alloc_host(sizeof(struct omap_hsmmc_host), &pdev->dev); in omap_hsmmc_probe()
1802 if (!mmc) { in omap_hsmmc_probe()
1803 ret = -ENOMEM; in omap_hsmmc_probe()
1807 ret = mmc_of_parse(mmc); in omap_hsmmc_probe()
1811 host = mmc_priv(mmc); in omap_hsmmc_probe()
1812 host->mmc = mmc; in omap_hsmmc_probe()
1813 host->pdata = pdata; in omap_hsmmc_probe()
1814 host->dev = &pdev->dev; in omap_hsmmc_probe()
1815 host->use_dma = 1; in omap_hsmmc_probe()
1816 host->dma_ch = -1; in omap_hsmmc_probe()
1817 host->irq = irq; in omap_hsmmc_probe()
1818 host->mapbase = res->start + pdata->reg_offset; in omap_hsmmc_probe()
1819 host->base = base + pdata->reg_offset; in omap_hsmmc_probe()
1820 host->power_mode = MMC_POWER_OFF; in omap_hsmmc_probe()
1821 host->next_data.cookie = 1; in omap_hsmmc_probe()
1822 host->pbias_enabled = false; in omap_hsmmc_probe()
1823 host->vqmmc_enabled = false; in omap_hsmmc_probe()
1827 if (pdev->dev.of_node) in omap_hsmmc_probe()
1828 host->wake_irq = irq_of_parse_and_map(pdev->dev.of_node, 1); in omap_hsmmc_probe()
1830 mmc->ops = &omap_hsmmc_ops; in omap_hsmmc_probe()
1832 mmc->f_min = OMAP_MMC_MIN_CLOCK; in omap_hsmmc_probe()
1834 if (pdata->max_freq > 0) in omap_hsmmc_probe()
1835 mmc->f_max = pdata->max_freq; in omap_hsmmc_probe()
1836 else if (mmc->f_max == 0) in omap_hsmmc_probe()
1837 mmc->f_max = OMAP_MMC_MAX_CLOCK; in omap_hsmmc_probe()
1839 spin_lock_init(&host->irq_lock); in omap_hsmmc_probe()
1841 host->fclk = devm_clk_get(&pdev->dev, "fck"); in omap_hsmmc_probe()
1842 if (IS_ERR(host->fclk)) { in omap_hsmmc_probe()
1843 ret = PTR_ERR(host->fclk); in omap_hsmmc_probe()
1844 host->fclk = NULL; in omap_hsmmc_probe()
1848 if (host->pdata->controller_flags & OMAP_HSMMC_BROKEN_MULTIBLOCK_READ) { in omap_hsmmc_probe()
1849 …dev_info(&pdev->dev, "multiblock reads disabled due to 35xx erratum 2.1.1.128; MMC read performanc… in omap_hsmmc_probe()
1853 device_init_wakeup(&pdev->dev, true); in omap_hsmmc_probe()
1854 pm_runtime_enable(host->dev); in omap_hsmmc_probe()
1855 pm_runtime_get_sync(host->dev); in omap_hsmmc_probe()
1856 pm_runtime_set_autosuspend_delay(host->dev, MMC_AUTOSUSPEND_DELAY); in omap_hsmmc_probe()
1857 pm_runtime_use_autosuspend(host->dev); in omap_hsmmc_probe()
1861 host->dbclk = devm_clk_get(&pdev->dev, "mmchsdb_fck"); in omap_hsmmc_probe()
1863 * MMC can still work without debounce clock. in omap_hsmmc_probe()
1865 if (IS_ERR(host->dbclk)) { in omap_hsmmc_probe()
1866 host->dbclk = NULL; in omap_hsmmc_probe()
1867 } else if (clk_prepare_enable(host->dbclk) != 0) { in omap_hsmmc_probe()
1868 dev_warn(mmc_dev(host->mmc), "Failed to enable debounce clk\n"); in omap_hsmmc_probe()
1869 host->dbclk = NULL; in omap_hsmmc_probe()
1874 mmc->max_segs = 64; in omap_hsmmc_probe()
1876 mmc->max_blk_size = 512; /* Block Length at max can be 1024 */ in omap_hsmmc_probe()
1877 mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */ in omap_hsmmc_probe()
1878 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; in omap_hsmmc_probe()
1880 mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | in omap_hsmmc_probe()
1883 mmc->caps |= mmc_pdata(host)->caps; in omap_hsmmc_probe()
1884 if (mmc->caps & MMC_CAP_8_BIT_DATA) in omap_hsmmc_probe()
1885 mmc->caps |= MMC_CAP_4_BIT_DATA; in omap_hsmmc_probe()
1887 if (mmc_pdata(host)->nonremovable) in omap_hsmmc_probe()
1888 mmc->caps |= MMC_CAP_NONREMOVABLE; in omap_hsmmc_probe()
1890 mmc->pm_caps |= mmc_pdata(host)->pm_caps; in omap_hsmmc_probe()
1894 host->rx_chan = dma_request_chan(&pdev->dev, "rx"); in omap_hsmmc_probe()
1895 if (IS_ERR(host->rx_chan)) { in omap_hsmmc_probe()
1896 dev_err(mmc_dev(host->mmc), "RX DMA channel request failed\n"); in omap_hsmmc_probe()
1897 ret = PTR_ERR(host->rx_chan); in omap_hsmmc_probe()
1901 host->tx_chan = dma_request_chan(&pdev->dev, "tx"); in omap_hsmmc_probe()
1902 if (IS_ERR(host->tx_chan)) { in omap_hsmmc_probe()
1903 dev_err(mmc_dev(host->mmc), "TX DMA channel request failed\n"); in omap_hsmmc_probe()
1904 ret = PTR_ERR(host->tx_chan); in omap_hsmmc_probe()
1911 * 32-bit transfers, the DMA engine can do longer segments than this in omap_hsmmc_probe()
1912 * but there is no way to represent that in the DMA model - if we in omap_hsmmc_probe()
1915 mmc->max_seg_size = min3(mmc->max_req_size, in omap_hsmmc_probe()
1916 dma_get_max_seg_size(host->rx_chan->device->dev), in omap_hsmmc_probe()
1917 dma_get_max_seg_size(host->tx_chan->device->dev)); in omap_hsmmc_probe()
1919 /* Request IRQ for MMC operations */ in omap_hsmmc_probe()
1920 ret = devm_request_irq(&pdev->dev, host->irq, omap_hsmmc_irq, 0, in omap_hsmmc_probe()
1921 mmc_hostname(mmc), host); in omap_hsmmc_probe()
1923 dev_err(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n"); in omap_hsmmc_probe()
1931 if (!mmc->ocr_avail) in omap_hsmmc_probe()
1932 mmc->ocr_avail = mmc_pdata(host)->ocr_mask; in omap_hsmmc_probe()
1938 * wake-up interrupt configured from device tree. This is because in omap_hsmmc_probe()
1939 * the wake-up interrupt is needed for idle state and some in omap_hsmmc_probe()
1946 mmc->caps |= MMC_CAP_SDIO_IRQ; in omap_hsmmc_probe()
1948 ret = mmc_add_host(mmc); in omap_hsmmc_probe()
1952 if (mmc_pdata(host)->name != NULL) { in omap_hsmmc_probe()
1953 ret = device_create_file(&mmc->class_dev, &dev_attr_slot_name); in omap_hsmmc_probe()
1958 omap_hsmmc_debugfs(mmc); in omap_hsmmc_probe()
1959 pm_runtime_mark_last_busy(host->dev); in omap_hsmmc_probe()
1960 pm_runtime_put_autosuspend(host->dev); in omap_hsmmc_probe()
1965 mmc_remove_host(mmc); in omap_hsmmc_probe()
1967 device_init_wakeup(&pdev->dev, false); in omap_hsmmc_probe()
1968 if (!IS_ERR_OR_NULL(host->tx_chan)) in omap_hsmmc_probe()
1969 dma_release_channel(host->tx_chan); in omap_hsmmc_probe()
1970 if (!IS_ERR_OR_NULL(host->rx_chan)) in omap_hsmmc_probe()
1971 dma_release_channel(host->rx_chan); in omap_hsmmc_probe()
1972 pm_runtime_dont_use_autosuspend(host->dev); in omap_hsmmc_probe()
1973 pm_runtime_put_sync(host->dev); in omap_hsmmc_probe()
1974 pm_runtime_disable(host->dev); in omap_hsmmc_probe()
1975 clk_disable_unprepare(host->dbclk); in omap_hsmmc_probe()
1977 mmc_free_host(mmc); in omap_hsmmc_probe()
1986 pm_runtime_get_sync(host->dev); in omap_hsmmc_remove()
1987 mmc_remove_host(host->mmc); in omap_hsmmc_remove()
1989 dma_release_channel(host->tx_chan); in omap_hsmmc_remove()
1990 dma_release_channel(host->rx_chan); in omap_hsmmc_remove()
1992 dev_pm_clear_wake_irq(host->dev); in omap_hsmmc_remove()
1993 pm_runtime_dont_use_autosuspend(host->dev); in omap_hsmmc_remove()
1994 pm_runtime_put_sync(host->dev); in omap_hsmmc_remove()
1995 pm_runtime_disable(host->dev); in omap_hsmmc_remove()
1996 device_init_wakeup(&pdev->dev, false); in omap_hsmmc_remove()
1997 clk_disable_unprepare(host->dbclk); in omap_hsmmc_remove()
1999 mmc_free_host(host->mmc); in omap_hsmmc_remove()
2010 pm_runtime_get_sync(host->dev); in omap_hsmmc_suspend()
2012 if (!(host->mmc->pm_flags & MMC_PM_KEEP_POWER)) { in omap_hsmmc_suspend()
2013 OMAP_HSMMC_WRITE(host->base, ISE, 0); in omap_hsmmc_suspend()
2014 OMAP_HSMMC_WRITE(host->base, IE, 0); in omap_hsmmc_suspend()
2015 OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); in omap_hsmmc_suspend()
2016 OMAP_HSMMC_WRITE(host->base, HCTL, in omap_hsmmc_suspend()
2017 OMAP_HSMMC_READ(host->base, HCTL) & ~SDBP); in omap_hsmmc_suspend()
2020 clk_disable_unprepare(host->dbclk); in omap_hsmmc_suspend()
2022 pm_runtime_put_sync(host->dev); in omap_hsmmc_suspend()
2026 /* Routine to resume the MMC device */
2034 pm_runtime_get_sync(host->dev); in omap_hsmmc_resume()
2036 clk_prepare_enable(host->dbclk); in omap_hsmmc_resume()
2038 if (!(host->mmc->pm_flags & MMC_PM_KEEP_POWER)) in omap_hsmmc_resume()
2041 pm_runtime_mark_last_busy(host->dev); in omap_hsmmc_resume()
2042 pm_runtime_put_autosuspend(host->dev); in omap_hsmmc_resume()
2058 spin_lock_irqsave(&host->irq_lock, flags); in omap_hsmmc_runtime_suspend()
2059 if ((host->mmc->caps & MMC_CAP_SDIO_IRQ) && in omap_hsmmc_runtime_suspend()
2060 (host->flags & HSMMC_SDIO_IRQ_ENABLED)) { in omap_hsmmc_runtime_suspend()
2062 OMAP_HSMMC_WRITE(host->base, ISE, 0); in omap_hsmmc_runtime_suspend()
2063 OMAP_HSMMC_WRITE(host->base, IE, 0); in omap_hsmmc_runtime_suspend()
2065 if (!(OMAP_HSMMC_READ(host->base, PSTATE) & DLEV_DAT(1))) { in omap_hsmmc_runtime_suspend()
2069 * multi-core, abort in omap_hsmmc_runtime_suspend()
2072 OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); in omap_hsmmc_runtime_suspend()
2073 OMAP_HSMMC_WRITE(host->base, ISE, CIRQ_EN); in omap_hsmmc_runtime_suspend()
2074 OMAP_HSMMC_WRITE(host->base, IE, CIRQ_EN); in omap_hsmmc_runtime_suspend()
2076 ret = -EBUSY; in omap_hsmmc_runtime_suspend()
2086 spin_unlock_irqrestore(&host->irq_lock, flags); in omap_hsmmc_runtime_suspend()
2099 spin_lock_irqsave(&host->irq_lock, flags); in omap_hsmmc_runtime_resume()
2100 if ((host->mmc->caps & MMC_CAP_SDIO_IRQ) && in omap_hsmmc_runtime_resume()
2101 (host->flags & HSMMC_SDIO_IRQ_ENABLED)) { in omap_hsmmc_runtime_resume()
2103 pinctrl_select_default_state(host->dev); in omap_hsmmc_runtime_resume()
2106 OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); in omap_hsmmc_runtime_resume()
2107 OMAP_HSMMC_WRITE(host->base, ISE, CIRQ_EN); in omap_hsmmc_runtime_resume()
2108 OMAP_HSMMC_WRITE(host->base, IE, CIRQ_EN); in omap_hsmmc_runtime_resume()
2110 pinctrl_select_default_state(host->dev); in omap_hsmmc_runtime_resume()
2112 spin_unlock_irqrestore(&host->irq_lock, flags); in omap_hsmmc_runtime_resume()