Lines Matching +full:mmc +full:-
1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <linux/dma-mapping.h>
18 #include <linux/mmc/host.h>
19 #include <linux/mmc/mmc.h>
20 #include <linux/mmc/sdio.h>
21 #include <linux/mmc/slot-gpio.h>
24 #include <linux/clk-provider.h>
31 #define DRIVER_NAME "meson-gx-mmc"
51 #define CLK_TX_DELAY_MASK(h) (h->data->tx_delay_mask)
52 #define CLK_RX_DELAY_MASK(h) (h->data->rx_delay_mask)
53 #define CLK_ALWAYS_ON(h) (h->data->always_on)
54 #define CLK_IRQ_SDIO_SLEEP(h) (h->data->irq_sdio_sleep)
154 struct mmc_host *mmc; member
207 unsigned int timeout = data->timeout_ns / NSEC_PER_MSEC; in meson_mmc_get_timeout_msecs()
219 if (cmd->opcode == MMC_SET_BLOCK_COUNT && !cmd->error) in meson_mmc_get_next_command()
220 return cmd->mrq->cmd; in meson_mmc_get_next_command()
221 else if (mmc_op_multi(cmd->opcode) && in meson_mmc_get_next_command()
222 (!cmd->mrq->sbc || cmd->error || cmd->data->error)) in meson_mmc_get_next_command()
223 return cmd->mrq->stop; in meson_mmc_get_next_command()
228 static void meson_mmc_get_transfer_mode(struct mmc_host *mmc, in meson_mmc_get_transfer_mode() argument
231 struct meson_host *host = mmc_priv(mmc); in meson_mmc_get_transfer_mode()
232 struct mmc_data *data = mrq->data; in meson_mmc_get_transfer_mode()
241 if (host->dram_access_quirk) in meson_mmc_get_transfer_mode()
245 if (data->blocks > 1 || mrq->cmd->opcode == SD_IO_RW_EXTENDED) { in meson_mmc_get_transfer_mode()
254 for_each_sg(data->sg, sg, data->sg_len, i) { in meson_mmc_get_transfer_mode()
255 if (sg->length % data->blksz) { in meson_mmc_get_transfer_mode()
256 dev_warn_once(mmc_dev(mmc), in meson_mmc_get_transfer_mode()
258 sg->length, data->blksz); in meson_mmc_get_transfer_mode()
264 for_each_sg(data->sg, sg, data->sg_len, i) { in meson_mmc_get_transfer_mode()
266 if (sg->offset % 8) { in meson_mmc_get_transfer_mode()
267 dev_warn_once(mmc_dev(mmc), in meson_mmc_get_transfer_mode()
269 sg->offset); in meson_mmc_get_transfer_mode()
274 data->host_cookie |= SD_EMMC_DESC_CHAIN_MODE; in meson_mmc_get_transfer_mode()
279 return data->host_cookie & SD_EMMC_DESC_CHAIN_MODE; in meson_mmc_desc_chain_mode()
284 return data && data->flags & MMC_DATA_READ && in meson_mmc_bounce_buf_read()
288 static void meson_mmc_pre_req(struct mmc_host *mmc, struct mmc_request *mrq) in meson_mmc_pre_req() argument
290 struct mmc_data *data = mrq->data; in meson_mmc_pre_req()
295 meson_mmc_get_transfer_mode(mmc, mrq); in meson_mmc_pre_req()
296 data->host_cookie |= SD_EMMC_PRE_REQ_DONE; in meson_mmc_pre_req()
301 data->sg_count = dma_map_sg(mmc_dev(mmc), data->sg, data->sg_len, in meson_mmc_pre_req()
303 if (!data->sg_count) in meson_mmc_pre_req()
304 dev_err(mmc_dev(mmc), "dma_map_sg failed"); in meson_mmc_pre_req()
307 static void meson_mmc_post_req(struct mmc_host *mmc, struct mmc_request *mrq, in meson_mmc_post_req() argument
310 struct mmc_data *data = mrq->data; in meson_mmc_post_req()
312 if (data && meson_mmc_desc_chain_mode(data) && data->sg_count) in meson_mmc_post_req()
313 dma_unmap_sg(mmc_dev(mmc), data->sg, data->sg_len, in meson_mmc_post_req()
318 * Gating the clock on this controller is tricky. It seems the mmc clock
327 if (host->pins_clk_gate) { in meson_mmc_clk_gate()
328 pinctrl_select_state(host->pinctrl, host->pins_clk_gate); in meson_mmc_clk_gate()
331 * If the pinmux is not provided - default to the classic and in meson_mmc_clk_gate()
334 cfg = readl(host->regs + SD_EMMC_CFG); in meson_mmc_clk_gate()
336 writel(cfg, host->regs + SD_EMMC_CFG); in meson_mmc_clk_gate()
344 if (host->pins_clk_gate) in meson_mmc_clk_ungate()
345 pinctrl_select_default_state(host->dev); in meson_mmc_clk_ungate()
348 cfg = readl(host->regs + SD_EMMC_CFG); in meson_mmc_clk_ungate()
350 writel(cfg, host->regs + SD_EMMC_CFG); in meson_mmc_clk_ungate()
356 struct mmc_host *mmc = host->mmc; in meson_mmc_clk_set() local
360 /* Same request - bail-out */ in meson_mmc_clk_set()
361 if (host->ddr == ddr && host->req_rate == rate) in meson_mmc_clk_set()
366 host->req_rate = 0; in meson_mmc_clk_set()
367 mmc->actual_clock = 0; in meson_mmc_clk_set()
374 cfg = readl(host->regs + SD_EMMC_CFG); in meson_mmc_clk_set()
376 writel(cfg, host->regs + SD_EMMC_CFG); in meson_mmc_clk_set()
385 writel(cfg, host->regs + SD_EMMC_CFG); in meson_mmc_clk_set()
386 host->ddr = ddr; in meson_mmc_clk_set()
388 ret = clk_set_rate(host->mmc_clk, rate); in meson_mmc_clk_set()
390 dev_err(host->dev, "Unable to set cfg_div_clk to %lu. ret=%d\n", in meson_mmc_clk_set()
395 host->req_rate = rate; in meson_mmc_clk_set()
396 mmc->actual_clock = clk_get_rate(host->mmc_clk); in meson_mmc_clk_set()
400 host->req_rate >>= 1; in meson_mmc_clk_set()
401 mmc->actual_clock >>= 1; in meson_mmc_clk_set()
404 dev_dbg(host->dev, "clk rate: %u Hz\n", mmc->actual_clock); in meson_mmc_clk_set()
405 if (rate != mmc->actual_clock) in meson_mmc_clk_set()
406 dev_dbg(host->dev, "requested rate was %lu\n", rate); in meson_mmc_clk_set()
416 * generating the MMC clock. Use the clock framework to create and
436 if (host->mmc->caps & MMC_CAP_SDIO_IRQ) in meson_mmc_clk_init()
438 writel(clk_reg, host->regs + SD_EMMC_CLOCK); in meson_mmc_clk_init()
446 clk = devm_clk_get(host->dev, name); in meson_mmc_clk_init()
448 return dev_err_probe(host->dev, PTR_ERR(clk), in meson_mmc_clk_init()
455 mux = devm_kzalloc(host->dev, sizeof(*mux), GFP_KERNEL); in meson_mmc_clk_init()
457 return -ENOMEM; in meson_mmc_clk_init()
459 snprintf(clk_name, sizeof(clk_name), "%s#mux", dev_name(host->dev)); in meson_mmc_clk_init()
466 mux->reg = host->regs + SD_EMMC_CLOCK; in meson_mmc_clk_init()
467 mux->shift = __ffs(CLK_SRC_MASK); in meson_mmc_clk_init()
468 mux->mask = CLK_SRC_MASK >> mux->shift; in meson_mmc_clk_init()
469 mux->hw.init = &init; in meson_mmc_clk_init()
471 host->mux_clk = devm_clk_register(host->dev, &mux->hw); in meson_mmc_clk_init()
472 if (WARN_ON(IS_ERR(host->mux_clk))) in meson_mmc_clk_init()
473 return PTR_ERR(host->mux_clk); in meson_mmc_clk_init()
476 div = devm_kzalloc(host->dev, sizeof(*div), GFP_KERNEL); in meson_mmc_clk_init()
478 return -ENOMEM; in meson_mmc_clk_init()
480 snprintf(clk_name, sizeof(clk_name), "%s#div", dev_name(host->dev)); in meson_mmc_clk_init()
484 clk_parent[0] = __clk_get_name(host->mux_clk); in meson_mmc_clk_init()
488 div->reg = host->regs + SD_EMMC_CLOCK; in meson_mmc_clk_init()
489 div->shift = __ffs(CLK_DIV_MASK); in meson_mmc_clk_init()
490 div->width = __builtin_popcountl(CLK_DIV_MASK); in meson_mmc_clk_init()
491 div->hw.init = &init; in meson_mmc_clk_init()
492 div->flags = CLK_DIVIDER_ONE_BASED; in meson_mmc_clk_init()
494 host->mmc_clk = devm_clk_register(host->dev, &div->hw); in meson_mmc_clk_init()
495 if (WARN_ON(IS_ERR(host->mmc_clk))) in meson_mmc_clk_init()
496 return PTR_ERR(host->mmc_clk); in meson_mmc_clk_init()
499 host->mmc->f_min = clk_round_rate(host->mmc_clk, 400000); in meson_mmc_clk_init()
500 ret = clk_set_rate(host->mmc_clk, host->mmc->f_min); in meson_mmc_clk_init()
504 return clk_prepare_enable(host->mmc_clk); in meson_mmc_clk_init()
509 unsigned int val = readl(host->regs + host->data->adjust); in meson_mmc_disable_resampling()
512 writel(val, host->regs + host->data->adjust); in meson_mmc_disable_resampling()
521 val = readl(host->regs + host->data->adjust); in meson_mmc_reset_resampling()
523 writel(val, host->regs + host->data->adjust); in meson_mmc_reset_resampling()
526 static int meson_mmc_resampling_tuning(struct mmc_host *mmc, u32 opcode) in meson_mmc_resampling_tuning() argument
528 struct meson_host *host = mmc_priv(mmc); in meson_mmc_resampling_tuning()
533 max_dly = DIV_ROUND_UP(clk_get_rate(host->mux_clk), in meson_mmc_resampling_tuning()
534 clk_get_rate(host->mmc_clk)); in meson_mmc_resampling_tuning()
536 val = readl(host->regs + host->data->adjust); in meson_mmc_resampling_tuning()
538 writel(val, host->regs + host->data->adjust); in meson_mmc_resampling_tuning()
540 if (mmc_doing_retune(mmc)) in meson_mmc_resampling_tuning()
548 writel(val, host->regs + host->data->adjust); in meson_mmc_resampling_tuning()
550 ret = mmc_send_tuning(mmc, opcode, NULL); in meson_mmc_resampling_tuning()
552 dev_dbg(mmc_dev(mmc), "resampling delay: %u\n", in meson_mmc_resampling_tuning()
559 return -EIO; in meson_mmc_resampling_tuning()
567 switch (ios->timing) { in meson_mmc_prepare_ios_clock()
578 return meson_mmc_clk_set(host, ios->clock, ddr); in meson_mmc_prepare_ios_clock()
584 switch (ios->timing) { in meson_mmc_check_resampling()
594 static void meson_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in meson_mmc_set_ios() argument
596 struct meson_host *host = mmc_priv(mmc); in meson_mmc_set_ios()
604 switch (ios->power_mode) { in meson_mmc_set_ios()
606 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); in meson_mmc_set_ios()
607 mmc_regulator_disable_vqmmc(mmc); in meson_mmc_set_ios()
612 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd); in meson_mmc_set_ios()
617 mmc_regulator_enable_vqmmc(mmc); in meson_mmc_set_ios()
623 switch (ios->bus_width) { in meson_mmc_set_ios()
634 dev_err(host->dev, "Invalid ios->bus_width: %u. Setting to 4.\n", in meson_mmc_set_ios()
635 ios->bus_width); in meson_mmc_set_ios()
639 val = readl(host->regs + SD_EMMC_CFG); in meson_mmc_set_ios()
642 writel(val, host->regs + SD_EMMC_CFG); in meson_mmc_set_ios()
647 dev_err(host->dev, "Failed to set clock: %d\n,", err); in meson_mmc_set_ios()
649 dev_dbg(host->dev, "SD_EMMC_CFG: 0x%08x\n", val); in meson_mmc_set_ios()
652 static void meson_mmc_request_done(struct mmc_host *mmc, in meson_mmc_request_done() argument
655 struct meson_host *host = mmc_priv(mmc); in meson_mmc_request_done()
657 host->cmd = NULL; in meson_mmc_request_done()
658 if (host->needs_pre_post_req) in meson_mmc_request_done()
659 meson_mmc_post_req(mmc, mrq, 0); in meson_mmc_request_done()
660 mmc_request_done(host->mmc, mrq); in meson_mmc_request_done()
663 static void meson_mmc_set_blksz(struct mmc_host *mmc, unsigned int blksz) in meson_mmc_set_blksz() argument
665 struct meson_host *host = mmc_priv(mmc); in meson_mmc_set_blksz()
668 cfg = readl(host->regs + SD_EMMC_CFG); in meson_mmc_set_blksz()
672 dev_err(host->dev, "blksz %u is not a power of 2\n", blksz); in meson_mmc_set_blksz()
676 /* check if block-size matches, if not update */ in meson_mmc_set_blksz()
680 dev_dbg(host->dev, "%s: update blk_len %d -> %d\n", __func__, in meson_mmc_set_blksz()
685 writel(cfg, host->regs + SD_EMMC_CFG); in meson_mmc_set_blksz()
690 if (cmd->flags & MMC_RSP_PRESENT) { in meson_mmc_set_response_bits()
691 if (cmd->flags & MMC_RSP_136) in meson_mmc_set_response_bits()
695 if (!(cmd->flags & MMC_RSP_CRC)) in meson_mmc_set_response_bits()
698 if (cmd->flags & MMC_RSP_BUSY) in meson_mmc_set_response_bits()
705 static void meson_mmc_desc_chain_transfer(struct mmc_host *mmc, u32 cmd_cfg) in meson_mmc_desc_chain_transfer() argument
707 struct meson_host *host = mmc_priv(mmc); in meson_mmc_desc_chain_transfer()
708 struct sd_emmc_desc *desc = host->descs; in meson_mmc_desc_chain_transfer()
709 struct mmc_data *data = host->cmd->data; in meson_mmc_desc_chain_transfer()
714 if (data->flags & MMC_DATA_WRITE) in meson_mmc_desc_chain_transfer()
717 if (data->blocks > 1) { in meson_mmc_desc_chain_transfer()
719 meson_mmc_set_blksz(mmc, data->blksz); in meson_mmc_desc_chain_transfer()
722 for_each_sg(data->sg, sg, data->sg_count, i) { in meson_mmc_desc_chain_transfer()
725 if (data->blocks > 1) in meson_mmc_desc_chain_transfer()
726 len /= data->blksz; in meson_mmc_desc_chain_transfer()
732 desc[i].cmd_arg = host->cmd->arg; in meson_mmc_desc_chain_transfer()
736 desc[data->sg_count - 1].cmd_cfg |= CMD_CFG_END_OF_CHAIN; in meson_mmc_desc_chain_transfer()
739 start = host->descs_dma_addr | START_DESC_BUSY; in meson_mmc_desc_chain_transfer()
740 writel(start, host->regs + SD_EMMC_START); in meson_mmc_desc_chain_transfer()
748 struct scatterlist *sgl = data->sg; in meson_mmc_copy_buffer()
749 unsigned int nents = data->sg_len; in meson_mmc_copy_buffer()
765 len = min(miter.length, buflen - offset); in meson_mmc_copy_buffer()
770 writel(*buf++, host->bounce_iomem_buf + offset + buf_offset); in meson_mmc_copy_buffer()
773 left -= 4; in meson_mmc_copy_buffer()
777 *buf++ = readl(host->bounce_iomem_buf + offset + buf_offset); in meson_mmc_copy_buffer()
780 left -= 4; in meson_mmc_copy_buffer()
790 static void meson_mmc_start_cmd(struct mmc_host *mmc, struct mmc_command *cmd) in meson_mmc_start_cmd() argument
792 struct meson_host *host = mmc_priv(mmc); in meson_mmc_start_cmd()
793 struct mmc_data *data = cmd->data; in meson_mmc_start_cmd()
800 host->cmd = cmd; in meson_mmc_start_cmd()
802 cmd_cfg |= FIELD_PREP(CMD_CFG_CMD_INDEX_MASK, cmd->opcode); in meson_mmc_start_cmd()
809 data->bytes_xfered = 0; in meson_mmc_start_cmd()
815 meson_mmc_desc_chain_transfer(mmc, cmd_cfg); in meson_mmc_start_cmd()
819 if (data->blocks > 1) { in meson_mmc_start_cmd()
822 data->blocks); in meson_mmc_start_cmd()
823 meson_mmc_set_blksz(mmc, data->blksz); in meson_mmc_start_cmd()
825 cmd_cfg |= FIELD_PREP(CMD_CFG_LENGTH_MASK, data->blksz); in meson_mmc_start_cmd()
828 xfer_bytes = data->blksz * data->blocks; in meson_mmc_start_cmd()
829 if (data->flags & MMC_DATA_WRITE) { in meson_mmc_start_cmd()
831 WARN_ON(xfer_bytes > host->bounce_buf_size); in meson_mmc_start_cmd()
832 if (host->dram_access_quirk) in meson_mmc_start_cmd()
835 sg_copy_to_buffer(data->sg, data->sg_len, in meson_mmc_start_cmd()
836 host->bounce_buf, xfer_bytes); in meson_mmc_start_cmd()
840 cmd_data = host->bounce_dma_addr & CMD_DATA_MASK; in meson_mmc_start_cmd()
848 writel(cmd_cfg, host->regs + SD_EMMC_CMD_CFG); in meson_mmc_start_cmd()
849 writel(cmd_data, host->regs + SD_EMMC_CMD_DAT); in meson_mmc_start_cmd()
850 writel(0, host->regs + SD_EMMC_CMD_RSP); in meson_mmc_start_cmd()
852 writel(cmd->arg, host->regs + SD_EMMC_CMD_ARG); in meson_mmc_start_cmd()
855 static int meson_mmc_validate_dram_access(struct mmc_host *mmc, struct mmc_data *data) in meson_mmc_validate_dram_access() argument
861 for_each_sg(data->sg, sg, data->sg_len, i) { in meson_mmc_validate_dram_access()
862 if (!IS_ALIGNED(sg->offset, sizeof(u32)) || in meson_mmc_validate_dram_access()
863 !IS_ALIGNED(sg->length, sizeof(u32))) { in meson_mmc_validate_dram_access()
864 dev_err(mmc_dev(mmc), "unaligned sg offset %u len %u\n", in meson_mmc_validate_dram_access()
865 data->sg->offset, data->sg->length); in meson_mmc_validate_dram_access()
866 return -EINVAL; in meson_mmc_validate_dram_access()
873 static void meson_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) in meson_mmc_request() argument
875 struct meson_host *host = mmc_priv(mmc); in meson_mmc_request()
876 host->needs_pre_post_req = mrq->data && in meson_mmc_request()
877 !(mrq->data->host_cookie & SD_EMMC_PRE_REQ_DONE); in meson_mmc_request()
884 if (host->dram_access_quirk && mrq->data) { in meson_mmc_request()
885 mrq->cmd->error = meson_mmc_validate_dram_access(mmc, mrq->data); in meson_mmc_request()
886 if (mrq->cmd->error) { in meson_mmc_request()
887 mmc_request_done(mmc, mrq); in meson_mmc_request()
892 if (host->needs_pre_post_req) { in meson_mmc_request()
893 meson_mmc_get_transfer_mode(mmc, mrq); in meson_mmc_request()
894 if (!meson_mmc_desc_chain_mode(mrq->data)) in meson_mmc_request()
895 host->needs_pre_post_req = false; in meson_mmc_request()
898 if (host->needs_pre_post_req) in meson_mmc_request()
899 meson_mmc_pre_req(mmc, mrq); in meson_mmc_request()
902 writel(0, host->regs + SD_EMMC_START); in meson_mmc_request()
904 meson_mmc_start_cmd(mmc, mrq->sbc ?: mrq->cmd); in meson_mmc_request()
907 static void meson_mmc_read_resp(struct mmc_host *mmc, struct mmc_command *cmd) in meson_mmc_read_resp() argument
909 struct meson_host *host = mmc_priv(mmc); in meson_mmc_read_resp()
911 if (cmd->flags & MMC_RSP_136) { in meson_mmc_read_resp()
912 cmd->resp[0] = readl(host->regs + SD_EMMC_CMD_RSP3); in meson_mmc_read_resp()
913 cmd->resp[1] = readl(host->regs + SD_EMMC_CMD_RSP2); in meson_mmc_read_resp()
914 cmd->resp[2] = readl(host->regs + SD_EMMC_CMD_RSP1); in meson_mmc_read_resp()
915 cmd->resp[3] = readl(host->regs + SD_EMMC_CMD_RSP); in meson_mmc_read_resp()
916 } else if (cmd->flags & MMC_RSP_PRESENT) { in meson_mmc_read_resp()
917 cmd->resp[0] = readl(host->regs + SD_EMMC_CMD_RSP); in meson_mmc_read_resp()
921 static void __meson_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable) in __meson_mmc_enable_sdio_irq() argument
923 struct meson_host *host = mmc_priv(mmc); in __meson_mmc_enable_sdio_irq()
928 writel(reg_irqen, host->regs + SD_EMMC_IRQ_EN); in __meson_mmc_enable_sdio_irq()
938 if (host->mmc->caps & MMC_CAP_SDIO_IRQ) in meson_mmc_irq()
940 raw_status = readl(host->regs + SD_EMMC_STATUS); in meson_mmc_irq()
944 dev_dbg(host->dev, in meson_mmc_irq()
945 "Unexpected IRQ! irq_en 0x%08x - status 0x%08x\n", in meson_mmc_irq()
951 writel(status, host->regs + SD_EMMC_STATUS); in meson_mmc_irq()
953 cmd = host->cmd; in meson_mmc_irq()
956 spin_lock(&host->lock); in meson_mmc_irq()
957 __meson_mmc_enable_sdio_irq(host->mmc, 0); in meson_mmc_irq()
958 sdio_signal_irq(host->mmc); in meson_mmc_irq()
959 spin_unlock(&host->lock); in meson_mmc_irq()
968 cmd->error = 0; in meson_mmc_irq()
970 dev_dbg(host->dev, "CRC Error - status 0x%08x\n", status); in meson_mmc_irq()
971 cmd->error = -EILSEQ; in meson_mmc_irq()
977 dev_dbg(host->dev, "Timeout - status 0x%08x\n", status); in meson_mmc_irq()
978 cmd->error = -ETIMEDOUT; in meson_mmc_irq()
983 meson_mmc_read_resp(host->mmc, cmd); in meson_mmc_irq()
986 struct mmc_data *data = cmd->data; in meson_mmc_irq()
988 if (data && !cmd->error) in meson_mmc_irq()
989 data->bytes_xfered = data->blksz * data->blocks; in meson_mmc_irq()
995 if (cmd->error) { in meson_mmc_irq()
997 u32 start = readl(host->regs + SD_EMMC_START); in meson_mmc_irq()
1000 writel(start, host->regs + SD_EMMC_START); in meson_mmc_irq()
1018 return readl_poll_timeout(host->regs + SD_EMMC_STATUS, status, in meson_mmc_wait_desc_stop()
1026 struct mmc_command *next_cmd, *cmd = host->cmd; in meson_mmc_irq_thread()
1033 if (cmd->error) { in meson_mmc_irq_thread()
1035 meson_mmc_request_done(host->mmc, cmd->mrq); in meson_mmc_irq_thread()
1040 data = cmd->data; in meson_mmc_irq_thread()
1042 xfer_bytes = data->blksz * data->blocks; in meson_mmc_irq_thread()
1043 WARN_ON(xfer_bytes > host->bounce_buf_size); in meson_mmc_irq_thread()
1044 if (host->dram_access_quirk) in meson_mmc_irq_thread()
1047 sg_copy_from_buffer(data->sg, data->sg_len, in meson_mmc_irq_thread()
1048 host->bounce_buf, xfer_bytes); in meson_mmc_irq_thread()
1053 meson_mmc_start_cmd(host->mmc, next_cmd); in meson_mmc_irq_thread()
1055 meson_mmc_request_done(host->mmc, cmd->mrq); in meson_mmc_irq_thread()
1072 writel(cfg, host->regs + SD_EMMC_CFG); in meson_mmc_cfg_init()
1075 static int meson_mmc_card_busy(struct mmc_host *mmc) in meson_mmc_card_busy() argument
1077 struct meson_host *host = mmc_priv(mmc); in meson_mmc_card_busy()
1080 regval = readl(host->regs + SD_EMMC_STATUS); in meson_mmc_card_busy()
1086 static int meson_mmc_voltage_switch(struct mmc_host *mmc, struct mmc_ios *ios) in meson_mmc_voltage_switch() argument
1091 if (!IS_ERR(mmc->supply.vqmmc)) { in meson_mmc_voltage_switch()
1099 ret = mmc_regulator_set_vqmmc(mmc, ios); in meson_mmc_voltage_switch()
1104 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) in meson_mmc_voltage_switch()
1107 return -EINVAL; in meson_mmc_voltage_switch()
1110 static void meson_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable) in meson_mmc_enable_sdio_irq() argument
1112 struct meson_host *host = mmc_priv(mmc); in meson_mmc_enable_sdio_irq()
1115 spin_lock_irqsave(&host->lock, flags); in meson_mmc_enable_sdio_irq()
1116 __meson_mmc_enable_sdio_irq(mmc, enable); in meson_mmc_enable_sdio_irq()
1117 spin_unlock_irqrestore(&host->lock, flags); in meson_mmc_enable_sdio_irq()
1120 static void meson_mmc_ack_sdio_irq(struct mmc_host *mmc) in meson_mmc_ack_sdio_irq() argument
1122 meson_mmc_enable_sdio_irq(mmc, 1); in meson_mmc_ack_sdio_irq()
1142 struct mmc_host *mmc; in meson_mmc_probe() local
1146 mmc = devm_mmc_alloc_host(&pdev->dev, sizeof(struct meson_host)); in meson_mmc_probe()
1147 if (!mmc) in meson_mmc_probe()
1148 return -ENOMEM; in meson_mmc_probe()
1149 host = mmc_priv(mmc); in meson_mmc_probe()
1150 host->mmc = mmc; in meson_mmc_probe()
1151 host->dev = &pdev->dev; in meson_mmc_probe()
1152 dev_set_drvdata(&pdev->dev, host); in meson_mmc_probe()
1155 host->dram_access_quirk = device_property_read_bool(&pdev->dev, in meson_mmc_probe()
1156 "amlogic,dram-access-quirk"); in meson_mmc_probe()
1159 ret = mmc_regulator_get_supply(mmc); in meson_mmc_probe()
1163 ret = mmc_of_parse(mmc); in meson_mmc_probe()
1165 return dev_err_probe(&pdev->dev, ret, "error parsing DT\n"); in meson_mmc_probe()
1167 mmc->caps |= MMC_CAP_CMD23; in meson_mmc_probe()
1169 if (mmc->caps & MMC_CAP_SDIO_IRQ) in meson_mmc_probe()
1170 mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD; in meson_mmc_probe()
1172 host->data = of_device_get_match_data(&pdev->dev); in meson_mmc_probe()
1173 if (!host->data) in meson_mmc_probe()
1174 return -EINVAL; in meson_mmc_probe()
1176 ret = device_reset_optional(&pdev->dev); in meson_mmc_probe()
1178 return dev_err_probe(&pdev->dev, ret, "device reset failed\n"); in meson_mmc_probe()
1180 host->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in meson_mmc_probe()
1181 if (IS_ERR(host->regs)) in meson_mmc_probe()
1182 return PTR_ERR(host->regs); in meson_mmc_probe()
1184 host->irq = platform_get_irq(pdev, 0); in meson_mmc_probe()
1185 if (host->irq < 0) in meson_mmc_probe()
1186 return host->irq; in meson_mmc_probe()
1189 mmc_gpio_set_cd_irq(mmc, cd_irq); in meson_mmc_probe()
1191 host->pinctrl = devm_pinctrl_get(&pdev->dev); in meson_mmc_probe()
1192 if (IS_ERR(host->pinctrl)) in meson_mmc_probe()
1193 return PTR_ERR(host->pinctrl); in meson_mmc_probe()
1195 host->pins_clk_gate = pinctrl_lookup_state(host->pinctrl, in meson_mmc_probe()
1196 "clk-gate"); in meson_mmc_probe()
1197 if (IS_ERR(host->pins_clk_gate)) { in meson_mmc_probe()
1198 dev_warn(&pdev->dev, in meson_mmc_probe()
1199 "can't get clk-gate pinctrl, using clk_stop bit\n"); in meson_mmc_probe()
1200 host->pins_clk_gate = NULL; in meson_mmc_probe()
1203 core_clk = devm_clk_get_enabled(&pdev->dev, "core"); in meson_mmc_probe()
1215 writel(0, host->regs + SD_EMMC_START); in meson_mmc_probe()
1218 writel(0, host->regs + SD_EMMC_IRQ_EN); in meson_mmc_probe()
1219 writel(IRQ_EN_MASK, host->regs + SD_EMMC_STATUS); in meson_mmc_probe()
1220 writel(IRQ_EN_MASK, host->regs + SD_EMMC_IRQ_EN); in meson_mmc_probe()
1222 ret = request_threaded_irq(host->irq, meson_mmc_irq, in meson_mmc_probe()
1224 dev_name(&pdev->dev), host); in meson_mmc_probe()
1228 spin_lock_init(&host->lock); in meson_mmc_probe()
1230 if (host->dram_access_quirk) { in meson_mmc_probe()
1232 mmc->max_segs = 1; in meson_mmc_probe()
1234 mmc->max_blk_count = SD_EMMC_SRAM_DATA_BUF_LEN / in meson_mmc_probe()
1235 mmc->max_blk_size; in meson_mmc_probe()
1237 mmc->max_blk_count = CMD_CFG_LENGTH_MASK; in meson_mmc_probe()
1238 mmc->max_segs = SD_EMMC_DESC_BUF_LEN / in meson_mmc_probe()
1241 mmc->max_req_size = mmc->max_blk_count * mmc->max_blk_size; in meson_mmc_probe()
1242 mmc->max_seg_size = mmc->max_req_size; in meson_mmc_probe()
1249 mmc->caps2 &= ~MMC_CAP2_HS400; in meson_mmc_probe()
1251 if (host->dram_access_quirk) { in meson_mmc_probe()
1253 * The MMC Controller embeds 1,5KiB of internal SRAM in meson_mmc_probe()
1258 host->bounce_buf_size = SD_EMMC_SRAM_DATA_BUF_LEN; in meson_mmc_probe()
1259 host->bounce_iomem_buf = host->regs + SD_EMMC_SRAM_DATA_BUF_OFF; in meson_mmc_probe()
1260 host->bounce_dma_addr = res->start + SD_EMMC_SRAM_DATA_BUF_OFF; in meson_mmc_probe()
1263 host->bounce_buf_size = mmc->max_req_size; in meson_mmc_probe()
1264 host->bounce_buf = in meson_mmc_probe()
1265 dmam_alloc_coherent(host->dev, host->bounce_buf_size, in meson_mmc_probe()
1266 &host->bounce_dma_addr, GFP_KERNEL); in meson_mmc_probe()
1267 if (host->bounce_buf == NULL) { in meson_mmc_probe()
1268 dev_err(host->dev, "Unable to map allocate DMA bounce buffer.\n"); in meson_mmc_probe()
1269 ret = -ENOMEM; in meson_mmc_probe()
1274 host->descs = dmam_alloc_coherent(host->dev, SD_EMMC_DESC_BUF_LEN, in meson_mmc_probe()
1275 &host->descs_dma_addr, GFP_KERNEL); in meson_mmc_probe()
1276 if (!host->descs) { in meson_mmc_probe()
1277 dev_err(host->dev, "Allocating descriptor DMA buffer failed\n"); in meson_mmc_probe()
1278 ret = -ENOMEM; in meson_mmc_probe()
1282 mmc->ops = &meson_mmc_ops; in meson_mmc_probe()
1283 ret = mmc_add_host(mmc); in meson_mmc_probe()
1290 free_irq(host->irq, host); in meson_mmc_probe()
1292 clk_disable_unprepare(host->mmc_clk); in meson_mmc_probe()
1298 struct meson_host *host = dev_get_drvdata(&pdev->dev); in meson_mmc_remove()
1300 mmc_remove_host(host->mmc); in meson_mmc_remove()
1303 writel(0, host->regs + SD_EMMC_IRQ_EN); in meson_mmc_remove()
1304 free_irq(host->irq, host); in meson_mmc_remove()
1306 clk_disable_unprepare(host->mmc_clk); in meson_mmc_remove()
1326 { .compatible = "amlogic,meson-gx-mmc", .data = &meson_gx_data },
1327 { .compatible = "amlogic,meson-gxbb-mmc", .data = &meson_gx_data },
1328 { .compatible = "amlogic,meson-gxl-mmc", .data = &meson_gx_data },
1329 { .compatible = "amlogic,meson-gxm-mmc", .data = &meson_gx_data },
1330 { .compatible = "amlogic,meson-axg-mmc", .data = &meson_axg_data },