Lines Matching full:host

18 #include <linux/mmc/host.h>
189 static void jz4740_mmc_write_irq_mask(struct jz4740_mmc_host *host, in jz4740_mmc_write_irq_mask() argument
192 if (host->version >= JZ_MMC_JZ4725B) in jz4740_mmc_write_irq_mask()
193 return writel(val, host->base + JZ_REG_MMC_IMASK); in jz4740_mmc_write_irq_mask()
195 return writew(val, host->base + JZ_REG_MMC_IMASK); in jz4740_mmc_write_irq_mask()
198 static void jz4740_mmc_write_irq_reg(struct jz4740_mmc_host *host, in jz4740_mmc_write_irq_reg() argument
201 if (host->version >= JZ_MMC_JZ4780) in jz4740_mmc_write_irq_reg()
202 writel(val, host->base + JZ_REG_MMC_IREG); in jz4740_mmc_write_irq_reg()
204 writew(val, host->base + JZ_REG_MMC_IREG); in jz4740_mmc_write_irq_reg()
207 static uint32_t jz4740_mmc_read_irq_reg(struct jz4740_mmc_host *host) in jz4740_mmc_read_irq_reg() argument
209 if (host->version >= JZ_MMC_JZ4780) in jz4740_mmc_read_irq_reg()
210 return readl(host->base + JZ_REG_MMC_IREG); in jz4740_mmc_read_irq_reg()
212 return readw(host->base + JZ_REG_MMC_IREG); in jz4740_mmc_read_irq_reg()
218 static void jz4740_mmc_release_dma_channels(struct jz4740_mmc_host *host) in jz4740_mmc_release_dma_channels() argument
220 if (!host->use_dma) in jz4740_mmc_release_dma_channels()
223 dma_release_channel(host->dma_tx); in jz4740_mmc_release_dma_channels()
224 if (host->dma_rx) in jz4740_mmc_release_dma_channels()
225 dma_release_channel(host->dma_rx); in jz4740_mmc_release_dma_channels()
228 static int jz4740_mmc_acquire_dma_channels(struct jz4740_mmc_host *host) in jz4740_mmc_acquire_dma_channels() argument
230 struct device *dev = mmc_dev(host->mmc); in jz4740_mmc_acquire_dma_channels()
232 host->dma_tx = dma_request_chan(dev, "tx-rx"); in jz4740_mmc_acquire_dma_channels()
233 if (!IS_ERR(host->dma_tx)) in jz4740_mmc_acquire_dma_channels()
236 if (PTR_ERR(host->dma_tx) != -ENODEV) { in jz4740_mmc_acquire_dma_channels()
238 return PTR_ERR(host->dma_tx); in jz4740_mmc_acquire_dma_channels()
241 host->dma_tx = dma_request_chan(mmc_dev(host->mmc), "tx"); in jz4740_mmc_acquire_dma_channels()
242 if (IS_ERR(host->dma_tx)) { in jz4740_mmc_acquire_dma_channels()
243 dev_err(mmc_dev(host->mmc), "Failed to get dma_tx channel\n"); in jz4740_mmc_acquire_dma_channels()
244 return PTR_ERR(host->dma_tx); in jz4740_mmc_acquire_dma_channels()
247 host->dma_rx = dma_request_chan(mmc_dev(host->mmc), "rx"); in jz4740_mmc_acquire_dma_channels()
248 if (IS_ERR(host->dma_rx)) { in jz4740_mmc_acquire_dma_channels()
249 dev_err(mmc_dev(host->mmc), "Failed to get dma_rx channel\n"); in jz4740_mmc_acquire_dma_channels()
250 dma_release_channel(host->dma_tx); in jz4740_mmc_acquire_dma_channels()
251 return PTR_ERR(host->dma_rx); in jz4740_mmc_acquire_dma_channels()
258 if (host->dma_tx) { in jz4740_mmc_acquire_dma_channels()
259 struct device *dev = host->dma_tx->device->dev; in jz4740_mmc_acquire_dma_channels()
262 if (max_seg_size < host->mmc->max_seg_size) in jz4740_mmc_acquire_dma_channels()
263 host->mmc->max_seg_size = max_seg_size; in jz4740_mmc_acquire_dma_channels()
266 if (host->dma_rx) { in jz4740_mmc_acquire_dma_channels()
267 struct device *dev = host->dma_rx->device->dev; in jz4740_mmc_acquire_dma_channels()
270 if (max_seg_size < host->mmc->max_seg_size) in jz4740_mmc_acquire_dma_channels()
271 host->mmc->max_seg_size = max_seg_size; in jz4740_mmc_acquire_dma_channels()
277 static inline struct dma_chan *jz4740_mmc_get_dma_chan(struct jz4740_mmc_host *host, in jz4740_mmc_get_dma_chan() argument
280 if ((data->flags & MMC_DATA_READ) && host->dma_rx) in jz4740_mmc_get_dma_chan()
281 return host->dma_rx; in jz4740_mmc_get_dma_chan()
283 return host->dma_tx; in jz4740_mmc_get_dma_chan()
286 static void jz4740_mmc_dma_unmap(struct jz4740_mmc_host *host, in jz4740_mmc_dma_unmap() argument
289 struct dma_chan *chan = jz4740_mmc_get_dma_chan(host, data); in jz4740_mmc_dma_unmap()
299 static int jz4740_mmc_prepare_dma_data(struct jz4740_mmc_host *host, in jz4740_mmc_prepare_dma_data() argument
303 struct dma_chan *chan = jz4740_mmc_get_dma_chan(host, data); in jz4740_mmc_prepare_dma_data()
316 dev_err(mmc_dev(host->mmc), in jz4740_mmc_prepare_dma_data()
327 static int jz4740_mmc_start_dma_transfer(struct jz4740_mmc_host *host, in jz4740_mmc_start_dma_transfer() argument
330 struct dma_chan *chan = jz4740_mmc_get_dma_chan(host, data); in jz4740_mmc_start_dma_transfer()
342 conf.dst_addr = host->mem_res->start + JZ_REG_MMC_TXFIFO; in jz4740_mmc_start_dma_transfer()
345 conf.src_addr = host->mem_res->start + JZ_REG_MMC_RXFIFO; in jz4740_mmc_start_dma_transfer()
348 sg_count = jz4740_mmc_prepare_dma_data(host, data, COOKIE_MAPPED); in jz4740_mmc_start_dma_transfer()
357 dev_err(mmc_dev(host->mmc), in jz4740_mmc_start_dma_transfer()
370 jz4740_mmc_dma_unmap(host, data); in jz4740_mmc_start_dma_transfer()
377 struct jz4740_mmc_host *host = mmc_priv(mmc); in jz4740_mmc_pre_request() local
380 if (!host->use_dma) in jz4740_mmc_pre_request()
384 if (jz4740_mmc_prepare_dma_data(host, data, COOKIE_PREMAPPED) < 0) in jz4740_mmc_pre_request()
392 struct jz4740_mmc_host *host = mmc_priv(mmc); in jz4740_mmc_post_request() local
396 jz4740_mmc_dma_unmap(host, data); in jz4740_mmc_post_request()
399 struct dma_chan *chan = jz4740_mmc_get_dma_chan(host, data); in jz4740_mmc_post_request()
407 static void jz4740_mmc_set_irq_enabled(struct jz4740_mmc_host *host, in jz4740_mmc_set_irq_enabled() argument
412 spin_lock_irqsave(&host->lock, flags); in jz4740_mmc_set_irq_enabled()
414 host->irq_mask &= ~irq; in jz4740_mmc_set_irq_enabled()
416 host->irq_mask |= irq; in jz4740_mmc_set_irq_enabled()
418 jz4740_mmc_write_irq_mask(host, host->irq_mask); in jz4740_mmc_set_irq_enabled()
419 spin_unlock_irqrestore(&host->lock, flags); in jz4740_mmc_set_irq_enabled()
422 static void jz4740_mmc_clock_enable(struct jz4740_mmc_host *host, in jz4740_mmc_clock_enable() argument
430 writew(val, host->base + JZ_REG_MMC_STRPCL); in jz4740_mmc_clock_enable()
433 static void jz4740_mmc_clock_disable(struct jz4740_mmc_host *host) in jz4740_mmc_clock_disable() argument
438 writew(JZ_MMC_STRPCL_CLOCK_STOP, host->base + JZ_REG_MMC_STRPCL); in jz4740_mmc_clock_disable()
440 status = readl(host->base + JZ_REG_MMC_STATUS); in jz4740_mmc_clock_disable()
444 static void jz4740_mmc_reset(struct jz4740_mmc_host *host) in jz4740_mmc_reset() argument
449 writew(JZ_MMC_STRPCL_RESET, host->base + JZ_REG_MMC_STRPCL); in jz4740_mmc_reset()
452 status = readl(host->base + JZ_REG_MMC_STATUS); in jz4740_mmc_reset()
456 static void jz4740_mmc_request_done(struct jz4740_mmc_host *host) in jz4740_mmc_request_done() argument
461 req = host->req; in jz4740_mmc_request_done()
463 host->req = NULL; in jz4740_mmc_request_done()
466 jz4740_mmc_dma_unmap(host, data); in jz4740_mmc_request_done()
467 mmc_request_done(host->mmc, req); in jz4740_mmc_request_done()
470 static unsigned int jz4740_mmc_poll_irq(struct jz4740_mmc_host *host, in jz4740_mmc_poll_irq() argument
477 status = jz4740_mmc_read_irq_reg(host); in jz4740_mmc_poll_irq()
481 set_bit(0, &host->waiting); in jz4740_mmc_poll_irq()
482 mod_timer(&host->timeout_timer, in jz4740_mmc_poll_irq()
484 jz4740_mmc_set_irq_enabled(host, irq, true); in jz4740_mmc_poll_irq()
491 static void jz4740_mmc_transfer_check_state(struct jz4740_mmc_host *host, in jz4740_mmc_transfer_check_state() argument
496 status = readl(host->base + JZ_REG_MMC_STATUS); in jz4740_mmc_transfer_check_state()
499 host->req->cmd->error = -ETIMEDOUT; in jz4740_mmc_transfer_check_state()
502 host->req->cmd->error = -EIO; in jz4740_mmc_transfer_check_state()
507 host->req->cmd->error = -ETIMEDOUT; in jz4740_mmc_transfer_check_state()
510 host->req->cmd->error = -EIO; in jz4740_mmc_transfer_check_state()
516 static bool jz4740_mmc_write_data(struct jz4740_mmc_host *host, in jz4740_mmc_write_data() argument
519 struct sg_mapping_iter *miter = &host->miter; in jz4740_mmc_write_data()
520 void __iomem *fifo_addr = host->base + JZ_REG_MMC_TXFIFO; in jz4740_mmc_write_data()
531 timeout = jz4740_mmc_poll_irq(host, JZ_MMC_IRQ_TXFIFO_WR_REQ); in jz4740_mmc_write_data()
547 timeout = jz4740_mmc_poll_irq(host, JZ_MMC_IRQ_TXFIFO_WR_REQ); in jz4740_mmc_write_data()
571 static bool jz4740_mmc_read_data(struct jz4740_mmc_host *host, in jz4740_mmc_read_data() argument
574 struct sg_mapping_iter *miter = &host->miter; in jz4740_mmc_read_data()
575 void __iomem *fifo_addr = host->base + JZ_REG_MMC_RXFIFO; in jz4740_mmc_read_data()
588 timeout = jz4740_mmc_poll_irq(host, JZ_MMC_IRQ_RXFIFO_RD_REQ); in jz4740_mmc_read_data()
606 timeout = jz4740_mmc_poll_irq(host, JZ_MMC_IRQ_RXFIFO_RD_REQ); in jz4740_mmc_read_data()
626 status = readl(host->base + JZ_REG_MMC_STATUS); in jz4740_mmc_read_data()
629 status = readl(host->base + JZ_REG_MMC_STATUS); in jz4740_mmc_read_data()
644 struct jz4740_mmc_host *host = timer_container_of(host, t, in jz4740_mmc_timeout() local
647 if (!test_and_clear_bit(0, &host->waiting)) in jz4740_mmc_timeout()
650 jz4740_mmc_set_irq_enabled(host, JZ_MMC_IRQ_END_CMD_RES, false); in jz4740_mmc_timeout()
652 host->req->cmd->error = -ETIMEDOUT; in jz4740_mmc_timeout()
653 jz4740_mmc_request_done(host); in jz4740_mmc_timeout()
656 static void jz4740_mmc_read_response(struct jz4740_mmc_host *host, in jz4740_mmc_read_response() argument
661 void __iomem *fifo_addr = host->base + JZ_REG_MMC_RESP_FIFO; in jz4740_mmc_read_response()
679 static void jz4740_mmc_send_command(struct jz4740_mmc_host *host, in jz4740_mmc_send_command() argument
682 uint32_t cmdat = host->cmdat; in jz4740_mmc_send_command()
684 host->cmdat &= ~JZ_MMC_CMDAT_INIT; in jz4740_mmc_send_command()
685 jz4740_mmc_clock_disable(host); in jz4740_mmc_send_command()
687 host->cmd = cmd; in jz4740_mmc_send_command()
711 if (host->use_dma) { in jz4740_mmc_send_command()
721 if (host->version >= JZ_MMC_JZ4780) { in jz4740_mmc_send_command()
723 host->base + JZ_REG_MMC_DMAC); in jz4740_mmc_send_command()
727 } else if (host->version >= JZ_MMC_JZ4780) { in jz4740_mmc_send_command()
728 writel(0, host->base + JZ_REG_MMC_DMAC); in jz4740_mmc_send_command()
731 writew(cmd->data->blksz, host->base + JZ_REG_MMC_BLKLEN); in jz4740_mmc_send_command()
732 writew(cmd->data->blocks, host->base + JZ_REG_MMC_NOB); in jz4740_mmc_send_command()
735 writeb(cmd->opcode, host->base + JZ_REG_MMC_CMD); in jz4740_mmc_send_command()
736 writel(cmd->arg, host->base + JZ_REG_MMC_ARG); in jz4740_mmc_send_command()
737 writel(cmdat, host->base + JZ_REG_MMC_CMDAT); in jz4740_mmc_send_command()
739 jz4740_mmc_clock_enable(host, 1); in jz4740_mmc_send_command()
742 static void jz_mmc_prepare_data_transfer(struct jz4740_mmc_host *host) in jz_mmc_prepare_data_transfer() argument
744 struct mmc_command *cmd = host->req->cmd; in jz_mmc_prepare_data_transfer()
753 sg_miter_start(&host->miter, data->sg, data->sg_len, direction); in jz_mmc_prepare_data_transfer()
759 struct jz4740_mmc_host *host = (struct jz4740_mmc_host *)devid; in jz_mmc_irq_worker() local
760 struct mmc_command *cmd = host->req->cmd; in jz_mmc_irq_worker()
761 struct mmc_request *req = host->req; in jz_mmc_irq_worker()
766 host->state = JZ4740_MMC_STATE_DONE; in jz_mmc_irq_worker()
768 switch (host->state) { in jz_mmc_irq_worker()
771 jz4740_mmc_read_response(host, cmd); in jz_mmc_irq_worker()
776 jz_mmc_prepare_data_transfer(host); in jz_mmc_irq_worker()
780 if (host->use_dma) { in jz_mmc_irq_worker()
787 timeout = jz4740_mmc_start_dma_transfer(host, data); in jz_mmc_irq_worker()
795 timeout = jz4740_mmc_read_data(host, data); in jz_mmc_irq_worker()
797 timeout = jz4740_mmc_write_data(host, data); in jz_mmc_irq_worker()
800 host->state = JZ4740_MMC_STATE_TRANSFER_DATA; in jz_mmc_irq_worker()
804 jz4740_mmc_transfer_check_state(host, data); in jz_mmc_irq_worker()
806 timeout = jz4740_mmc_poll_irq(host, JZ_MMC_IRQ_DATA_TRAN_DONE); in jz_mmc_irq_worker()
808 host->state = JZ4740_MMC_STATE_SEND_STOP; in jz_mmc_irq_worker()
811 jz4740_mmc_write_irq_reg(host, JZ_MMC_IRQ_DATA_TRAN_DONE); in jz_mmc_irq_worker()
818 jz4740_mmc_send_command(host, req->stop); in jz_mmc_irq_worker()
821 timeout = jz4740_mmc_poll_irq(host, in jz_mmc_irq_worker()
824 host->state = JZ4740_MMC_STATE_DONE; in jz_mmc_irq_worker()
835 jz4740_mmc_request_done(host); in jz_mmc_irq_worker()
842 struct jz4740_mmc_host *host = devid; in jz_mmc_irq() local
843 struct mmc_command *cmd = host->cmd; in jz_mmc_irq()
846 status = readl(host->base + JZ_REG_MMC_STATUS); in jz_mmc_irq()
847 irq_reg = jz4740_mmc_read_irq_reg(host); in jz_mmc_irq()
850 irq_reg &= ~host->irq_mask; in jz_mmc_irq()
856 jz4740_mmc_write_irq_reg(host, tmp & ~irq_reg); in jz_mmc_irq()
859 jz4740_mmc_write_irq_reg(host, JZ_MMC_IRQ_SDIO); in jz_mmc_irq()
860 mmc_signal_sdio_irq(host->mmc); in jz_mmc_irq()
864 if (host->req && cmd && irq_reg) { in jz_mmc_irq()
865 if (test_and_clear_bit(0, &host->waiting)) { in jz_mmc_irq()
866 timer_delete(&host->timeout_timer); in jz_mmc_irq()
879 jz4740_mmc_set_irq_enabled(host, irq_reg, false); in jz_mmc_irq()
880 jz4740_mmc_write_irq_reg(host, irq_reg); in jz_mmc_irq()
889 static int jz4740_mmc_set_clock_rate(struct jz4740_mmc_host *host, int rate) in jz4740_mmc_set_clock_rate() argument
894 jz4740_mmc_clock_disable(host); in jz4740_mmc_set_clock_rate()
895 clk_set_rate(host->clk, host->mmc->f_max); in jz4740_mmc_set_clock_rate()
897 real_rate = clk_get_rate(host->clk); in jz4740_mmc_set_clock_rate()
904 writew(div, host->base + JZ_REG_MMC_CLKRT); in jz4740_mmc_set_clock_rate()
907 if (host->version >= JZ_MMC_JZ4780) { in jz4740_mmc_set_clock_rate()
911 host->base + JZ_REG_MMC_LPM); in jz4740_mmc_set_clock_rate()
912 } else if (host->version >= JZ_MMC_JZ4760) { in jz4740_mmc_set_clock_rate()
915 host->base + JZ_REG_MMC_LPM); in jz4740_mmc_set_clock_rate()
916 } else if (host->version >= JZ_MMC_JZ4725B) in jz4740_mmc_set_clock_rate()
918 host->base + JZ_REG_MMC_LPM); in jz4740_mmc_set_clock_rate()
926 struct jz4740_mmc_host *host = mmc_priv(mmc); in jz4740_mmc_request() local
928 host->req = req; in jz4740_mmc_request()
930 jz4740_mmc_write_irq_reg(host, ~0); in jz4740_mmc_request()
931 jz4740_mmc_set_irq_enabled(host, JZ_MMC_IRQ_END_CMD_RES, true); in jz4740_mmc_request()
933 host->state = JZ4740_MMC_STATE_READ_RESPONSE; in jz4740_mmc_request()
934 set_bit(0, &host->waiting); in jz4740_mmc_request()
935 mod_timer(&host->timeout_timer, in jz4740_mmc_request()
937 jz4740_mmc_send_command(host, req->cmd); in jz4740_mmc_request()
942 struct jz4740_mmc_host *host = mmc_priv(mmc); in jz4740_mmc_set_ios() local
946 jz4740_mmc_set_clock_rate(host, ios->clock); in jz4740_mmc_set_ios()
950 jz4740_mmc_reset(host); in jz4740_mmc_set_ios()
953 host->cmdat |= JZ_MMC_CMDAT_INIT; in jz4740_mmc_set_ios()
954 clk_prepare_enable(host->clk); in jz4740_mmc_set_ios()
957 if (!IS_ERR(mmc->supply.vqmmc) && !host->vqmmc_enabled) { in jz4740_mmc_set_ios()
960 dev_err(&host->pdev->dev, "Failed to set vqmmc power!\n"); in jz4740_mmc_set_ios()
962 host->vqmmc_enabled = true; in jz4740_mmc_set_ios()
968 if (!IS_ERR(mmc->supply.vqmmc) && host->vqmmc_enabled) { in jz4740_mmc_set_ios()
970 host->vqmmc_enabled = false; in jz4740_mmc_set_ios()
972 clk_disable_unprepare(host->clk); in jz4740_mmc_set_ios()
980 host->cmdat &= ~JZ_MMC_CMDAT_BUS_WIDTH_MASK; in jz4740_mmc_set_ios()
983 host->cmdat &= ~JZ_MMC_CMDAT_BUS_WIDTH_MASK; in jz4740_mmc_set_ios()
984 host->cmdat |= JZ_MMC_CMDAT_BUS_WIDTH_4BIT; in jz4740_mmc_set_ios()
987 host->cmdat &= ~JZ_MMC_CMDAT_BUS_WIDTH_MASK; in jz4740_mmc_set_ios()
988 host->cmdat |= JZ_MMC_CMDAT_BUS_WIDTH_8BIT; in jz4740_mmc_set_ios()
997 struct jz4740_mmc_host *host = mmc_priv(mmc); in jz4740_mmc_enable_sdio_irq() local
998 jz4740_mmc_set_irq_enabled(host, JZ_MMC_IRQ_SDIO, enable); in jz4740_mmc_enable_sdio_irq()
1044 struct jz4740_mmc_host *host; in jz4740_mmc_probe() local
1046 mmc = devm_mmc_alloc_host(&pdev->dev, sizeof(*host)); in jz4740_mmc_probe()
1048 dev_err(&pdev->dev, "Failed to alloc mmc host structure\n"); in jz4740_mmc_probe()
1052 host = mmc_priv(mmc); in jz4740_mmc_probe()
1055 host->version = (enum jz4740_mmc_version)device_get_match_data(&pdev->dev); in jz4740_mmc_probe()
1064 host->irq = platform_get_irq(pdev, 0); in jz4740_mmc_probe()
1065 if (host->irq < 0) in jz4740_mmc_probe()
1066 return host->irq; in jz4740_mmc_probe()
1068 host->clk = devm_clk_get(&pdev->dev, "mmc"); in jz4740_mmc_probe()
1069 if (IS_ERR(host->clk)) in jz4740_mmc_probe()
1070 return dev_err_probe(&pdev->dev, PTR_ERR(host->clk), in jz4740_mmc_probe()
1073 host->base = devm_platform_get_and_ioremap_resource(pdev, 0, &host->mem_res); in jz4740_mmc_probe()
1074 if (IS_ERR(host->base)) in jz4740_mmc_probe()
1075 return PTR_ERR(host->base); in jz4740_mmc_probe()
1087 if (host->version == JZ_MMC_JZ4760 && mmc->f_max > JZ_MMC_CLK_RATE) in jz4740_mmc_probe()
1106 host->mmc = mmc; in jz4740_mmc_probe()
1107 host->pdev = pdev; in jz4740_mmc_probe()
1108 spin_lock_init(&host->lock); in jz4740_mmc_probe()
1109 host->irq_mask = ~0; in jz4740_mmc_probe()
1111 jz4740_mmc_reset(host); in jz4740_mmc_probe()
1113 ret = request_threaded_irq(host->irq, jz_mmc_irq, jz_mmc_irq_worker, 0, in jz4740_mmc_probe()
1114 dev_name(&pdev->dev), host); in jz4740_mmc_probe()
1118 jz4740_mmc_clock_disable(host); in jz4740_mmc_probe()
1119 timer_setup(&host->timeout_timer, jz4740_mmc_timeout, 0); in jz4740_mmc_probe()
1121 ret = jz4740_mmc_acquire_dma_channels(host); in jz4740_mmc_probe()
1124 host->use_dma = !ret; in jz4740_mmc_probe()
1126 platform_set_drvdata(pdev, host); in jz4740_mmc_probe()
1130 dev_err(&pdev->dev, "Failed to add mmc host: %d\n", ret); in jz4740_mmc_probe()
1136 host->use_dma ? "DMA" : "PIO", in jz4740_mmc_probe()
1143 if (host->use_dma) in jz4740_mmc_probe()
1144 jz4740_mmc_release_dma_channels(host); in jz4740_mmc_probe()
1146 free_irq(host->irq, host); in jz4740_mmc_probe()
1152 struct jz4740_mmc_host *host = platform_get_drvdata(pdev); in jz4740_mmc_remove() local
1154 timer_delete_sync(&host->timeout_timer); in jz4740_mmc_remove()
1155 jz4740_mmc_set_irq_enabled(host, 0xff, false); in jz4740_mmc_remove()
1156 jz4740_mmc_reset(host); in jz4740_mmc_remove()
1158 mmc_remove_host(host->mmc); in jz4740_mmc_remove()
1160 free_irq(host->irq, host); in jz4740_mmc_remove()
1162 if (host->use_dma) in jz4740_mmc_remove()
1163 jz4740_mmc_release_dma_channels(host); in jz4740_mmc_remove()