Lines Matching +full:mmc +full:-
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * davinci_mmc.c - TI DaVinci MMC/SD/SDIO driver
16 #include <linux/mmc/host.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/mmc/mmc.h>
24 #include <linux/mmc/slot-gpio.h>
27 #include <linux/platform_data/mmc-davinci.h>
37 #define DAVINCI_MMCTOR 0x14 /* Response Time-Out Register */
38 #define DAVINCI_MMCTOD 0x18 /* Data Read Time-Out Register */
144 #define MAX_CCNT ((1 << 16) - 1)
170 struct mmc_host *mmc; member
196 /* Version of the MMC/SD controller */
213 struct sg_mapping_iter *sgm = &host->sg_miter; in davinci_fifo_data_trans()
218 * By adjusting sgm->consumed this will give a pointer to the in davinci_fifo_data_trans()
222 dev_err(mmc_dev(host->mmc), "ran out of sglist prematurely\n"); in davinci_fifo_data_trans()
225 p = sgm->addr; in davinci_fifo_data_trans()
227 if (n > sgm->length) in davinci_fifo_data_trans()
228 n = sgm->length; in davinci_fifo_data_trans()
234 if (host->data_dir == DAVINCI_MMC_DATADIR_WRITE) { in davinci_fifo_data_trans()
236 writel(*((u32 *)p), host->base + DAVINCI_MMCDXR); in davinci_fifo_data_trans()
240 iowrite8_rep(host->base + DAVINCI_MMCDXR, p, (n & 3)); in davinci_fifo_data_trans()
245 *((u32 *)p) = readl(host->base + DAVINCI_MMCDRR); in davinci_fifo_data_trans()
249 ioread8_rep(host->base + DAVINCI_MMCDRR, p, (n & 3)); in davinci_fifo_data_trans()
254 sgm->consumed = n; in davinci_fifo_data_trans()
255 host->bytes_left -= n; in davinci_fifo_data_trans()
264 dev_dbg(mmc_dev(host->mmc), "CMD%d, arg 0x%08x%s\n", in mmc_davinci_start_command()
265 cmd->opcode, cmd->arg, in mmc_davinci_start_command()
284 host->cmd = cmd; in mmc_davinci_start_command()
305 dev_dbg(mmc_dev(host->mmc), "unknown resp_type %04x\n", in mmc_davinci_start_command()
311 cmd_reg |= cmd->opcode; in mmc_davinci_start_command()
314 if (host->do_dma) in mmc_davinci_start_command()
317 if (host->version == MMC_CTLR_VERSION_2 && host->data != NULL && in mmc_davinci_start_command()
318 host->data_dir == DAVINCI_MMC_DATADIR_READ) in mmc_davinci_start_command()
322 if (cmd->data) in mmc_davinci_start_command()
326 if (host->data_dir == DAVINCI_MMC_DATADIR_WRITE) in mmc_davinci_start_command()
329 if (host->bus_mode == MMC_BUSMODE_PUSHPULL) in mmc_davinci_start_command()
333 writel(0x1FFF, host->base + DAVINCI_MMCTOR); in mmc_davinci_start_command()
337 if (host->data_dir == DAVINCI_MMC_DATADIR_WRITE) { in mmc_davinci_start_command()
340 if (!host->do_dma) in mmc_davinci_start_command()
342 } else if (host->data_dir == DAVINCI_MMC_DATADIR_READ) { in mmc_davinci_start_command()
345 if (!host->do_dma) in mmc_davinci_start_command()
350 * Before non-DMA WRITE commands the controller needs priming: in mmc_davinci_start_command()
353 if (!host->do_dma && (host->data_dir == DAVINCI_MMC_DATADIR_WRITE)) in mmc_davinci_start_command()
356 writel(cmd->arg, host->base + DAVINCI_MMCARGHL); in mmc_davinci_start_command()
357 writel(cmd_reg, host->base + DAVINCI_MMCCMD); in mmc_davinci_start_command()
359 host->active_request = true; in mmc_davinci_start_command()
361 if (!host->do_dma && host->bytes_left <= poll_threshold) { in mmc_davinci_start_command()
364 while (host->active_request && count--) { in mmc_davinci_start_command()
370 if (host->active_request) in mmc_davinci_start_command()
371 writel(im_val, host->base + DAVINCI_MMCIM); in mmc_davinci_start_command()
374 /*----------------------------------------------------------------------*/
382 if (host->data_dir == DAVINCI_MMC_DATADIR_READ) in davinci_abort_dma()
383 sync_dev = host->dma_rx; in davinci_abort_dma()
385 sync_dev = host->dma_tx; in davinci_abort_dma()
397 if (host->data_dir == DAVINCI_MMC_DATADIR_WRITE) { in mmc_davinci_send_dma_request()
400 .dst_addr = host->mem_res->start + DAVINCI_MMCDXR, in mmc_davinci_send_dma_request()
405 chan = host->dma_tx; in mmc_davinci_send_dma_request()
406 dmaengine_slave_config(host->dma_tx, &dma_tx_conf); in mmc_davinci_send_dma_request()
408 desc = dmaengine_prep_slave_sg(host->dma_tx, in mmc_davinci_send_dma_request()
409 data->sg, in mmc_davinci_send_dma_request()
410 host->sg_len, in mmc_davinci_send_dma_request()
414 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_send_dma_request()
416 ret = -1; in mmc_davinci_send_dma_request()
422 .src_addr = host->mem_res->start + DAVINCI_MMCDRR, in mmc_davinci_send_dma_request()
427 chan = host->dma_rx; in mmc_davinci_send_dma_request()
428 dmaengine_slave_config(host->dma_rx, &dma_rx_conf); in mmc_davinci_send_dma_request()
430 desc = dmaengine_prep_slave_sg(host->dma_rx, in mmc_davinci_send_dma_request()
431 data->sg, in mmc_davinci_send_dma_request()
432 host->sg_len, in mmc_davinci_send_dma_request()
436 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_send_dma_request()
438 ret = -1; in mmc_davinci_send_dma_request()
454 int mask = rw_threshold - 1; in mmc_davinci_start_dma_transfer()
457 host->sg_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len, in mmc_davinci_start_dma_transfer()
461 for (i = 0; i < host->sg_len; i++) { in mmc_davinci_start_dma_transfer()
462 if (sg_dma_len(data->sg + i) & mask) { in mmc_davinci_start_dma_transfer()
463 dma_unmap_sg(mmc_dev(host->mmc), in mmc_davinci_start_dma_transfer()
464 data->sg, data->sg_len, in mmc_davinci_start_dma_transfer()
466 return -1; in mmc_davinci_start_dma_transfer()
470 host->do_dma = 1; in mmc_davinci_start_dma_transfer()
478 if (!host->use_dma) in davinci_release_dma_channels()
481 dma_release_channel(host->dma_tx); in davinci_release_dma_channels()
482 dma_release_channel(host->dma_rx); in davinci_release_dma_channels()
487 host->dma_tx = dma_request_chan(mmc_dev(host->mmc), "tx"); in davinci_acquire_dma_channels()
488 if (IS_ERR(host->dma_tx)) { in davinci_acquire_dma_channels()
489 dev_err(mmc_dev(host->mmc), "Can't get dma_tx channel\n"); in davinci_acquire_dma_channels()
490 return PTR_ERR(host->dma_tx); in davinci_acquire_dma_channels()
493 host->dma_rx = dma_request_chan(mmc_dev(host->mmc), "rx"); in davinci_acquire_dma_channels()
494 if (IS_ERR(host->dma_rx)) { in davinci_acquire_dma_channels()
495 dev_err(mmc_dev(host->mmc), "Can't get dma_rx channel\n"); in davinci_acquire_dma_channels()
496 dma_release_channel(host->dma_tx); in davinci_acquire_dma_channels()
497 return PTR_ERR(host->dma_rx); in davinci_acquire_dma_channels()
503 /*----------------------------------------------------------------------*/
510 struct mmc_data *data = req->data; in mmc_davinci_prepare_data()
513 if (host->version == MMC_CTLR_VERSION_2) in mmc_davinci_prepare_data()
516 host->data = data; in mmc_davinci_prepare_data()
518 host->data_dir = DAVINCI_MMC_DATADIR_NONE; in mmc_davinci_prepare_data()
519 writel(0, host->base + DAVINCI_MMCBLEN); in mmc_davinci_prepare_data()
520 writel(0, host->base + DAVINCI_MMCNBLK); in mmc_davinci_prepare_data()
524 dev_dbg(mmc_dev(host->mmc), "%s, %d blocks of %d bytes\n", in mmc_davinci_prepare_data()
525 (data->flags & MMC_DATA_WRITE) ? "write" : "read", in mmc_davinci_prepare_data()
526 data->blocks, data->blksz); in mmc_davinci_prepare_data()
527 dev_dbg(mmc_dev(host->mmc), " DTO %d cycles + %d ns\n", in mmc_davinci_prepare_data()
528 data->timeout_clks, data->timeout_ns); in mmc_davinci_prepare_data()
529 timeout = data->timeout_clks + in mmc_davinci_prepare_data()
530 (data->timeout_ns / host->ns_in_one_cycle); in mmc_davinci_prepare_data()
534 writel(timeout, host->base + DAVINCI_MMCTOD); in mmc_davinci_prepare_data()
535 writel(data->blocks, host->base + DAVINCI_MMCNBLK); in mmc_davinci_prepare_data()
536 writel(data->blksz, host->base + DAVINCI_MMCBLEN); in mmc_davinci_prepare_data()
539 if (data->flags & MMC_DATA_WRITE) { in mmc_davinci_prepare_data()
541 host->data_dir = DAVINCI_MMC_DATADIR_WRITE; in mmc_davinci_prepare_data()
543 host->base + DAVINCI_MMCFIFOCTL); in mmc_davinci_prepare_data()
545 host->base + DAVINCI_MMCFIFOCTL); in mmc_davinci_prepare_data()
548 host->data_dir = DAVINCI_MMC_DATADIR_READ; in mmc_davinci_prepare_data()
550 host->base + DAVINCI_MMCFIFOCTL); in mmc_davinci_prepare_data()
552 host->base + DAVINCI_MMCFIFOCTL); in mmc_davinci_prepare_data()
555 host->bytes_left = data->blocks * data->blksz; in mmc_davinci_prepare_data()
565 if (host->use_dma && (host->bytes_left & (rw_threshold - 1)) == 0 in mmc_davinci_prepare_data()
568 host->bytes_left = 0; in mmc_davinci_prepare_data()
571 host->sg_len = data->sg_len; in mmc_davinci_prepare_data()
572 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); in mmc_davinci_prepare_data()
576 static void mmc_davinci_request(struct mmc_host *mmc, struct mmc_request *req) in mmc_davinci_request() argument
578 struct mmc_davinci_host *host = mmc_priv(mmc); in mmc_davinci_request()
586 mmcst1 = readl(host->base + DAVINCI_MMCST1); in mmc_davinci_request()
592 dev_err(mmc_dev(host->mmc), "still BUSY? bad ... \n"); in mmc_davinci_request()
593 req->cmd->error = -ETIMEDOUT; in mmc_davinci_request()
594 mmc_request_done(mmc, req); in mmc_davinci_request()
598 host->do_dma = 0; in mmc_davinci_request()
600 mmc_davinci_start_command(host, req->cmd); in mmc_davinci_request()
608 mmc_pclk = host->mmc_input_clk; in calculate_freq_for_card()
611 / (2 * mmc_req_freq)) - 1; in calculate_freq_for_card()
622 host->ns_in_one_cycle = (1000000) / (((mmc_pclk in calculate_freq_for_card()
625 host->ns_in_one_cycle = (1000000) / (((mmc_pclk in calculate_freq_for_card()
631 static void calculate_clk_divider(struct mmc_host *mmc, struct mmc_ios *ios) in calculate_clk_divider() argument
635 struct mmc_davinci_host *host = mmc_priv(mmc); in calculate_clk_divider()
637 if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) { in calculate_clk_divider()
644 / (2 * MMCSD_INIT_CLOCK)) - 1; in calculate_clk_divider()
649 temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKRT_MASK; in calculate_clk_divider()
651 writel(temp, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()
654 host->ns_in_one_cycle = (1000000) / (MMCSD_INIT_CLOCK/1000); in calculate_clk_divider()
657 mmc_push_pull_freq = calculate_freq_for_card(host, ios->clock); in calculate_clk_divider()
662 temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKEN; in calculate_clk_divider()
663 writel(temp, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()
667 temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKRT_MASK; in calculate_clk_divider()
669 writel(temp, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()
671 writel(temp | MMCCLK_CLKEN, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()
677 static void mmc_davinci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in mmc_davinci_set_ios() argument
679 struct mmc_davinci_host *host = mmc_priv(mmc); in mmc_davinci_set_ios()
680 struct platform_device *pdev = to_platform_device(mmc->parent); in mmc_davinci_set_ios()
681 struct davinci_mmc_config *config = pdev->dev.platform_data; in mmc_davinci_set_ios()
683 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_set_ios()
685 ios->clock, ios->bus_mode, ios->power_mode, in mmc_davinci_set_ios()
686 ios->vdd); in mmc_davinci_set_ios()
688 switch (ios->power_mode) { in mmc_davinci_set_ios()
690 if (config && config->set_power) in mmc_davinci_set_ios()
691 config->set_power(pdev->id, false); in mmc_davinci_set_ios()
694 if (config && config->set_power) in mmc_davinci_set_ios()
695 config->set_power(pdev->id, true); in mmc_davinci_set_ios()
699 switch (ios->bus_width) { in mmc_davinci_set_ios()
701 dev_dbg(mmc_dev(host->mmc), "Enabling 8 bit mode\n"); in mmc_davinci_set_ios()
702 writel((readl(host->base + DAVINCI_MMCCTL) & in mmc_davinci_set_ios()
704 host->base + DAVINCI_MMCCTL); in mmc_davinci_set_ios()
707 dev_dbg(mmc_dev(host->mmc), "Enabling 4 bit mode\n"); in mmc_davinci_set_ios()
708 if (host->version == MMC_CTLR_VERSION_2) in mmc_davinci_set_ios()
709 writel((readl(host->base + DAVINCI_MMCCTL) & in mmc_davinci_set_ios()
711 host->base + DAVINCI_MMCCTL); in mmc_davinci_set_ios()
713 writel(readl(host->base + DAVINCI_MMCCTL) | in mmc_davinci_set_ios()
715 host->base + DAVINCI_MMCCTL); in mmc_davinci_set_ios()
718 dev_dbg(mmc_dev(host->mmc), "Enabling 1 bit mode\n"); in mmc_davinci_set_ios()
719 if (host->version == MMC_CTLR_VERSION_2) in mmc_davinci_set_ios()
720 writel(readl(host->base + DAVINCI_MMCCTL) & in mmc_davinci_set_ios()
722 host->base + DAVINCI_MMCCTL); in mmc_davinci_set_ios()
724 writel(readl(host->base + DAVINCI_MMCCTL) & in mmc_davinci_set_ios()
726 host->base + DAVINCI_MMCCTL); in mmc_davinci_set_ios()
730 calculate_clk_divider(mmc, ios); in mmc_davinci_set_ios()
732 host->bus_mode = ios->bus_mode; in mmc_davinci_set_ios()
733 if (ios->power_mode == MMC_POWER_UP) { in mmc_davinci_set_ios()
738 writel(0, host->base + DAVINCI_MMCARGHL); in mmc_davinci_set_ios()
739 writel(MMCCMD_INITCK, host->base + DAVINCI_MMCCMD); in mmc_davinci_set_ios()
741 u32 tmp = readl(host->base + DAVINCI_MMCST0); in mmc_davinci_set_ios()
750 dev_warn(mmc_dev(host->mmc), "powerup timeout\n"); in mmc_davinci_set_ios()
759 host->data = NULL; in mmc_davinci_xfer_done()
761 if (host->mmc->caps & MMC_CAP_SDIO_IRQ) { in mmc_davinci_xfer_done()
763 * SDIO Interrupt Detection work-around as suggested by in mmc_davinci_xfer_done()
767 if (host->sdio_int && !(readl(host->base + DAVINCI_SDIOST0) & in mmc_davinci_xfer_done()
769 writel(SDIOIST_IOINT, host->base + DAVINCI_SDIOIST); in mmc_davinci_xfer_done()
770 mmc_signal_sdio_irq(host->mmc); in mmc_davinci_xfer_done()
774 if (host->do_dma) { in mmc_davinci_xfer_done()
777 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, in mmc_davinci_xfer_done()
779 host->do_dma = false; in mmc_davinci_xfer_done()
781 host->data_dir = DAVINCI_MMC_DATADIR_NONE; in mmc_davinci_xfer_done()
783 if (!data->stop || (host->cmd && host->cmd->error)) { in mmc_davinci_xfer_done()
784 mmc_request_done(host->mmc, data->mrq); in mmc_davinci_xfer_done()
785 writel(0, host->base + DAVINCI_MMCIM); in mmc_davinci_xfer_done()
786 host->active_request = false; in mmc_davinci_xfer_done()
788 mmc_davinci_start_command(host, data->stop); in mmc_davinci_xfer_done()
794 host->cmd = NULL; in mmc_davinci_cmd_done()
796 if (cmd->flags & MMC_RSP_PRESENT) { in mmc_davinci_cmd_done()
797 if (cmd->flags & MMC_RSP_136) { in mmc_davinci_cmd_done()
799 cmd->resp[3] = readl(host->base + DAVINCI_MMCRSP01); in mmc_davinci_cmd_done()
800 cmd->resp[2] = readl(host->base + DAVINCI_MMCRSP23); in mmc_davinci_cmd_done()
801 cmd->resp[1] = readl(host->base + DAVINCI_MMCRSP45); in mmc_davinci_cmd_done()
802 cmd->resp[0] = readl(host->base + DAVINCI_MMCRSP67); in mmc_davinci_cmd_done()
805 cmd->resp[0] = readl(host->base + DAVINCI_MMCRSP67); in mmc_davinci_cmd_done()
809 if (host->data == NULL || cmd->error) { in mmc_davinci_cmd_done()
810 if (cmd->error == -ETIMEDOUT) in mmc_davinci_cmd_done()
811 cmd->mrq->cmd->retries = 0; in mmc_davinci_cmd_done()
812 mmc_request_done(host->mmc, cmd->mrq); in mmc_davinci_cmd_done()
813 writel(0, host->base + DAVINCI_MMCIM); in mmc_davinci_cmd_done()
814 host->active_request = false; in mmc_davinci_cmd_done()
823 temp = readl(host->base + DAVINCI_MMCCTL); in mmc_davinci_reset_ctrl()
829 writel(temp, host->base + DAVINCI_MMCCTL); in mmc_davinci_reset_ctrl()
838 if (!host->do_dma) in davinci_abort_data()
839 sg_miter_stop(&host->sg_miter); in davinci_abort_data()
847 status = readl(host->base + DAVINCI_SDIOIST); in mmc_davinci_sdio_irq()
849 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_sdio_irq()
851 writel(status | SDIOIST_IOINT, host->base + DAVINCI_SDIOIST); in mmc_davinci_sdio_irq()
852 mmc_signal_sdio_irq(host->mmc); in mmc_davinci_sdio_irq()
863 struct mmc_data *data = host->data; in mmc_davinci_irq()
865 if (host->cmd == NULL && host->data == NULL) { in mmc_davinci_irq()
866 status = readl(host->base + DAVINCI_MMCST0); in mmc_davinci_irq()
867 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_irq()
870 writel(0, host->base + DAVINCI_MMCIM); in mmc_davinci_irq()
874 status = readl(host->base + DAVINCI_MMCST0); in mmc_davinci_irq()
882 * non-dma. in mmc_davinci_irq()
884 if (host->bytes_left && (status & (MMCST0_DXRDY | MMCST0_DRRDY))) { in mmc_davinci_irq()
894 im_val = readl(host->base + DAVINCI_MMCIM); in mmc_davinci_irq()
895 writel(0, host->base + DAVINCI_MMCIM); in mmc_davinci_irq()
899 status = readl(host->base + DAVINCI_MMCST0); in mmc_davinci_irq()
901 } while (host->bytes_left && in mmc_davinci_irq()
908 * status is race-prone. in mmc_davinci_irq()
910 writel(im_val, host->base + DAVINCI_MMCIM); in mmc_davinci_irq()
916 if (!host->do_dma) { in mmc_davinci_irq()
917 if (host->bytes_left > 0) in mmc_davinci_irq()
921 davinci_fifo_data_trans(host, host->bytes_left); in mmc_davinci_irq()
922 sg_miter_stop(&host->sg_miter); in mmc_davinci_irq()
925 data->bytes_xfered = data->blocks * data->blksz; in mmc_davinci_irq()
927 dev_err(mmc_dev(host->mmc), in mmc_davinci_irq()
928 "DATDNE with no host->data\n"); in mmc_davinci_irq()
934 data->error = -ETIMEDOUT; in mmc_davinci_irq()
937 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_irq()
946 data->error = -EILSEQ; in mmc_davinci_irq()
952 * case and the two three-bit patterns in various SD specs in mmc_davinci_irq()
956 u32 temp = readb(host->base + DAVINCI_MMCDRSP); in mmc_davinci_irq()
959 data->error = -ETIMEDOUT; in mmc_davinci_irq()
961 dev_dbg(mmc_dev(host->mmc), "data %s %s error\n", in mmc_davinci_irq()
963 (data->error == -ETIMEDOUT) ? "timeout" : "CRC"); in mmc_davinci_irq()
970 if (host->cmd) { in mmc_davinci_irq()
971 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_irq()
973 host->cmd->opcode, qstatus); in mmc_davinci_irq()
974 host->cmd->error = -ETIMEDOUT; in mmc_davinci_irq()
985 dev_dbg(mmc_dev(host->mmc), "Command CRC error\n"); in mmc_davinci_irq()
986 if (host->cmd) { in mmc_davinci_irq()
987 host->cmd->error = -EILSEQ; in mmc_davinci_irq()
994 end_command = host->cmd ? 1 : 0; in mmc_davinci_irq()
998 mmc_davinci_cmd_done(host, host->cmd); in mmc_davinci_irq()
1004 static int mmc_davinci_get_cd(struct mmc_host *mmc) in mmc_davinci_get_cd() argument
1006 struct platform_device *pdev = to_platform_device(mmc->parent); in mmc_davinci_get_cd()
1007 struct davinci_mmc_config *config = pdev->dev.platform_data; in mmc_davinci_get_cd()
1009 if (config && config->get_cd) in mmc_davinci_get_cd()
1010 return config->get_cd(pdev->id); in mmc_davinci_get_cd()
1012 return mmc_gpio_get_cd(mmc); in mmc_davinci_get_cd()
1015 static int mmc_davinci_get_ro(struct mmc_host *mmc) in mmc_davinci_get_ro() argument
1017 struct platform_device *pdev = to_platform_device(mmc->parent); in mmc_davinci_get_ro()
1018 struct davinci_mmc_config *config = pdev->dev.platform_data; in mmc_davinci_get_ro()
1020 if (config && config->get_ro) in mmc_davinci_get_ro()
1021 return config->get_ro(pdev->id); in mmc_davinci_get_ro()
1023 return mmc_gpio_get_ro(mmc); in mmc_davinci_get_ro()
1026 static void mmc_davinci_enable_sdio_irq(struct mmc_host *mmc, int enable) in mmc_davinci_enable_sdio_irq() argument
1028 struct mmc_davinci_host *host = mmc_priv(mmc); in mmc_davinci_enable_sdio_irq()
1031 if (!(readl(host->base + DAVINCI_SDIOST0) & SDIOST0_DAT1_HI)) { in mmc_davinci_enable_sdio_irq()
1032 writel(SDIOIST_IOINT, host->base + DAVINCI_SDIOIST); in mmc_davinci_enable_sdio_irq()
1033 mmc_signal_sdio_irq(host->mmc); in mmc_davinci_enable_sdio_irq()
1035 host->sdio_int = true; in mmc_davinci_enable_sdio_irq()
1036 writel(readl(host->base + DAVINCI_SDIOIEN) | in mmc_davinci_enable_sdio_irq()
1037 SDIOIEN_IOINTEN, host->base + DAVINCI_SDIOIEN); in mmc_davinci_enable_sdio_irq()
1040 host->sdio_int = false; in mmc_davinci_enable_sdio_irq()
1041 writel(readl(host->base + DAVINCI_SDIOIEN) & ~SDIOIEN_IOINTEN, in mmc_davinci_enable_sdio_irq()
1042 host->base + DAVINCI_SDIOIEN); in mmc_davinci_enable_sdio_irq()
1054 /*----------------------------------------------------------------------*/
1062 struct mmc_host *mmc; in mmc_davinci_cpufreq_transition() local
1066 mmc = host->mmc; in mmc_davinci_cpufreq_transition()
1067 mmc_pclk = clk_get_rate(host->clk); in mmc_davinci_cpufreq_transition()
1070 spin_lock_irqsave(&mmc->lock, flags); in mmc_davinci_cpufreq_transition()
1071 host->mmc_input_clk = mmc_pclk; in mmc_davinci_cpufreq_transition()
1072 calculate_clk_divider(mmc, &mmc->ios); in mmc_davinci_cpufreq_transition()
1073 spin_unlock_irqrestore(&mmc->lock, flags); in mmc_davinci_cpufreq_transition()
1081 host->freq_transition.notifier_call = mmc_davinci_cpufreq_transition; in mmc_davinci_cpufreq_register()
1083 return cpufreq_register_notifier(&host->freq_transition, in mmc_davinci_cpufreq_register()
1089 cpufreq_unregister_notifier(&host->freq_transition, in mmc_davinci_cpufreq_deregister()
1107 writel(0, host->base + DAVINCI_MMCCLK); in init_mmcsd_host()
1108 writel(MMCCLK_CLKEN, host->base + DAVINCI_MMCCLK); in init_mmcsd_host()
1110 writel(0x1FFF, host->base + DAVINCI_MMCTOR); in init_mmcsd_host()
1111 writel(0xFFFF, host->base + DAVINCI_MMCTOD); in init_mmcsd_host()
1118 .name = "dm6441-mmc",
1121 .name = "da830-mmc",
1130 .compatible = "ti,dm6441-mmc",
1134 .compatible = "ti,da830-mmc",
1141 static int mmc_davinci_parse_pdata(struct mmc_host *mmc) in mmc_davinci_parse_pdata() argument
1143 struct platform_device *pdev = to_platform_device(mmc->parent); in mmc_davinci_parse_pdata()
1144 struct davinci_mmc_config *pdata = pdev->dev.platform_data; in mmc_davinci_parse_pdata()
1149 return -EINVAL; in mmc_davinci_parse_pdata()
1151 host = mmc_priv(mmc); in mmc_davinci_parse_pdata()
1153 return -EINVAL; in mmc_davinci_parse_pdata()
1155 if (pdata && pdata->nr_sg) in mmc_davinci_parse_pdata()
1156 host->nr_sg = pdata->nr_sg - 1; in mmc_davinci_parse_pdata()
1158 if (pdata && (pdata->wires == 4 || pdata->wires == 0)) in mmc_davinci_parse_pdata()
1159 mmc->caps |= MMC_CAP_4_BIT_DATA; in mmc_davinci_parse_pdata()
1161 if (pdata && (pdata->wires == 8)) in mmc_davinci_parse_pdata()
1162 mmc->caps |= (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA); in mmc_davinci_parse_pdata()
1164 mmc->f_min = 312500; in mmc_davinci_parse_pdata()
1165 mmc->f_max = 25000000; in mmc_davinci_parse_pdata()
1166 if (pdata && pdata->max_freq) in mmc_davinci_parse_pdata()
1167 mmc->f_max = pdata->max_freq; in mmc_davinci_parse_pdata()
1168 if (pdata && pdata->caps) in mmc_davinci_parse_pdata()
1169 mmc->caps |= pdata->caps; in mmc_davinci_parse_pdata()
1172 ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0); in mmc_davinci_parse_pdata()
1173 if (ret == -EPROBE_DEFER) in mmc_davinci_parse_pdata()
1176 mmc->caps |= MMC_CAP_NEEDS_POLL; in mmc_davinci_parse_pdata()
1178 ret = mmc_gpiod_request_ro(mmc, "wp", 0, 0); in mmc_davinci_parse_pdata()
1179 if (ret == -EPROBE_DEFER) in mmc_davinci_parse_pdata()
1188 struct mmc_host *mmc = NULL; in davinci_mmcsd_probe() local
1196 return -ENODEV; in davinci_mmcsd_probe()
1202 mem = devm_request_mem_region(&pdev->dev, r->start, mem_size, in davinci_mmcsd_probe()
1203 pdev->name); in davinci_mmcsd_probe()
1205 return -EBUSY; in davinci_mmcsd_probe()
1207 mmc = mmc_alloc_host(sizeof(struct mmc_davinci_host), &pdev->dev); in davinci_mmcsd_probe()
1208 if (!mmc) in davinci_mmcsd_probe()
1209 return -ENOMEM; in davinci_mmcsd_probe()
1211 host = mmc_priv(mmc); in davinci_mmcsd_probe()
1212 host->mmc = mmc; /* Important */ in davinci_mmcsd_probe()
1214 host->mem_res = mem; in davinci_mmcsd_probe()
1215 host->base = devm_ioremap(&pdev->dev, mem->start, mem_size); in davinci_mmcsd_probe()
1216 if (!host->base) { in davinci_mmcsd_probe()
1217 ret = -ENOMEM; in davinci_mmcsd_probe()
1221 host->clk = devm_clk_get(&pdev->dev, NULL); in davinci_mmcsd_probe()
1222 if (IS_ERR(host->clk)) { in davinci_mmcsd_probe()
1223 ret = PTR_ERR(host->clk); in davinci_mmcsd_probe()
1226 ret = clk_prepare_enable(host->clk); in davinci_mmcsd_probe()
1230 host->mmc_input_clk = clk_get_rate(host->clk); in davinci_mmcsd_probe()
1232 pdev->id_entry = of_device_get_match_data(&pdev->dev); in davinci_mmcsd_probe()
1233 if (pdev->id_entry) { in davinci_mmcsd_probe()
1234 ret = mmc_of_parse(mmc); in davinci_mmcsd_probe()
1236 dev_err_probe(&pdev->dev, ret, in davinci_mmcsd_probe()
1241 ret = mmc_davinci_parse_pdata(mmc); in davinci_mmcsd_probe()
1243 dev_err(&pdev->dev, in davinci_mmcsd_probe()
1248 if (host->nr_sg > MAX_NR_SG || !host->nr_sg) in davinci_mmcsd_probe()
1249 host->nr_sg = MAX_NR_SG; in davinci_mmcsd_probe()
1253 host->use_dma = use_dma; in davinci_mmcsd_probe()
1254 host->mmc_irq = irq; in davinci_mmcsd_probe()
1255 host->sdio_irq = platform_get_irq_optional(pdev, 1); in davinci_mmcsd_probe()
1257 if (host->use_dma) { in davinci_mmcsd_probe()
1259 if (ret == -EPROBE_DEFER) in davinci_mmcsd_probe()
1262 host->use_dma = 0; in davinci_mmcsd_probe()
1265 mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY; in davinci_mmcsd_probe()
1269 host->version = id_entry->driver_data; in davinci_mmcsd_probe()
1271 mmc->ops = &mmc_davinci_ops; in davinci_mmcsd_probe()
1272 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; in davinci_mmcsd_probe()
1278 mmc->max_segs = MAX_NR_SG; in davinci_mmcsd_probe()
1281 mmc->max_seg_size = MAX_CCNT * rw_threshold; in davinci_mmcsd_probe()
1283 /* MMC/SD controller limits for multiblock requests */ in davinci_mmcsd_probe()
1284 mmc->max_blk_size = 4095; /* BLEN is 12 bits */ in davinci_mmcsd_probe()
1285 mmc->max_blk_count = 65535; /* NBLK is 16 bits */ in davinci_mmcsd_probe()
1286 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; in davinci_mmcsd_probe()
1288 dev_dbg(mmc_dev(host->mmc), "max_segs=%d\n", mmc->max_segs); in davinci_mmcsd_probe()
1289 dev_dbg(mmc_dev(host->mmc), "max_blk_size=%d\n", mmc->max_blk_size); in davinci_mmcsd_probe()
1290 dev_dbg(mmc_dev(host->mmc), "max_req_size=%d\n", mmc->max_req_size); in davinci_mmcsd_probe()
1291 dev_dbg(mmc_dev(host->mmc), "max_seg_size=%d\n", mmc->max_seg_size); in davinci_mmcsd_probe()
1297 dev_err(&pdev->dev, "failed to register cpufreq\n"); in davinci_mmcsd_probe()
1301 ret = mmc_add_host(mmc); in davinci_mmcsd_probe()
1305 ret = devm_request_irq(&pdev->dev, irq, mmc_davinci_irq, 0, in davinci_mmcsd_probe()
1306 mmc_hostname(mmc), host); in davinci_mmcsd_probe()
1310 if (host->sdio_irq >= 0) { in davinci_mmcsd_probe()
1311 ret = devm_request_irq(&pdev->dev, host->sdio_irq, in davinci_mmcsd_probe()
1313 mmc_hostname(mmc), host); in davinci_mmcsd_probe()
1315 mmc->caps |= MMC_CAP_SDIO_IRQ; in davinci_mmcsd_probe()
1318 rename_region(mem, mmc_hostname(mmc)); in davinci_mmcsd_probe()
1320 if (mmc->caps & MMC_CAP_8_BIT_DATA) in davinci_mmcsd_probe()
1322 else if (mmc->caps & MMC_CAP_4_BIT_DATA) in davinci_mmcsd_probe()
1326 dev_info(mmc_dev(host->mmc), "Using %s, %d-bit mode\n", in davinci_mmcsd_probe()
1327 host->use_dma ? "DMA" : "PIO", bus_width); in davinci_mmcsd_probe()
1332 mmc_remove_host(mmc); in davinci_mmcsd_probe()
1339 clk_disable_unprepare(host->clk); in davinci_mmcsd_probe()
1343 mmc_free_host(mmc); in davinci_mmcsd_probe()
1352 mmc_remove_host(host->mmc); in davinci_mmcsd_remove()
1355 clk_disable_unprepare(host->clk); in davinci_mmcsd_remove()
1356 mmc_free_host(host->mmc); in davinci_mmcsd_remove()
1364 writel(0, host->base + DAVINCI_MMCIM); in davinci_mmcsd_suspend()
1366 clk_disable(host->clk); in davinci_mmcsd_suspend()
1376 ret = clk_enable(host->clk); in davinci_mmcsd_resume()
1411 MODULE_DESCRIPTION("MMC/SD driver for Davinci MMC controller");