Lines Matching full:phase
221 struct mmc_clk_phase *phase)
227 phase->valid = !rc;
228 if (phase->valid) {
229 phase->in_deg = degrees[0];
230 phase->out_deg = degrees[1];
237 mmc_of_parse_timing_phase(dev, "clk-phase-legacy",
238 &map->phase[MMC_TIMING_LEGACY]);
239 mmc_of_parse_timing_phase(dev, "clk-phase-mmc-hs",
240 &map->phase[MMC_TIMING_MMC_HS]);
241 mmc_of_parse_timing_phase(dev, "clk-phase-sd-hs",
242 &map->phase[MMC_TIMING_SD_HS]);
243 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-sdr12",
244 &map->phase[MMC_TIMING_UHS_SDR12]);
245 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-sdr25",
246 &map->phase[MMC_TIMING_UHS_SDR25]);
247 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-sdr50",
248 &map->phase[MMC_TIMING_UHS_SDR50]);
249 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-sdr104",
250 &map->phase[MMC_TIMING_UHS_SDR104]);
251 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-ddr50",
252 &map->phase[MMC_TIMING_UHS_DDR50]);
253 mmc_of_parse_timing_phase(dev, "clk-phase-mmc-ddr52",
254 &map->phase[MMC_TIMING_MMC_DDR52]);
255 mmc_of_parse_timing_phase(dev, "clk-phase-mmc-hs200",
256 &map->phase[MMC_TIMING_MMC_HS200]);
257 mmc_of_parse_timing_phase(dev, "clk-phase-mmc-hs400",
258 &map->phase[MMC_TIMING_MMC_HS400]);