341 			irq_handler_t irq_handler, int cpu, int blade)  in gru_chiplet_setup_tlb_irq()  argument
351 	irq = uv_setup_irq(irq_name, cpu, blade, mmr, UV_AFFINITY_CPU);  in gru_chiplet_setup_tlb_irq()
365 	gru_base[blade]->bs_grus[chiplet].gs_irq[core] = irq;  in gru_chiplet_setup_tlb_irq()
369 static void gru_chiplet_teardown_tlb_irq(int chiplet, int cpu, int blade)  in gru_chiplet_teardown_tlb_irq()  argument
376 		irq = gru_base[blade]->bs_grus[chiplet].gs_irq[core];  in gru_chiplet_teardown_tlb_irq()
386 	int blade;  in gru_teardown_tlb_irqs()  local
390 		blade = uv_cpu_to_blade_id(cpu);  in gru_teardown_tlb_irqs()
391 		gru_chiplet_teardown_tlb_irq(0, cpu, blade);  in gru_teardown_tlb_irqs()
392 		gru_chiplet_teardown_tlb_irq(1, cpu, blade);  in gru_teardown_tlb_irqs()
394 	for_each_possible_blade(blade) {  in gru_teardown_tlb_irqs()
395 		if (uv_blade_nr_possible_cpus(blade))  in gru_teardown_tlb_irqs()
397 		gru_chiplet_teardown_tlb_irq(0, 0, blade);  in gru_teardown_tlb_irqs()
398 		gru_chiplet_teardown_tlb_irq(1, 0, blade);  in gru_teardown_tlb_irqs()
404 	int blade;  in gru_setup_tlb_irqs()  local
409 		blade = uv_cpu_to_blade_id(cpu);  in gru_setup_tlb_irqs()
410 		ret = gru_chiplet_setup_tlb_irq(0, "GRU0_TLB", gru0_intr, cpu, blade);  in gru_setup_tlb_irqs()
414 		ret = gru_chiplet_setup_tlb_irq(1, "GRU1_TLB", gru1_intr, cpu, blade);  in gru_setup_tlb_irqs()
418 	for_each_possible_blade(blade) {  in gru_setup_tlb_irqs()
419 		if (uv_blade_nr_possible_cpus(blade))  in gru_setup_tlb_irqs()
421 		ret = gru_chiplet_setup_tlb_irq(0, "GRU0_TLB", gru_intr_mblade, 0, blade);  in gru_setup_tlb_irqs()
425 		ret = gru_chiplet_setup_tlb_irq(1, "GRU1_TLB", gru_intr_mblade, 0, blade);  in gru_setup_tlb_irqs()