16  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
45  * Control block status and exception codes
65  * Structure used to fetch exception detail for CBs that terminate with
88     /* DW 0  - low */
98     /* DW 0  - high */
107     /* DW 2-6 */
180 /* GAMIR - AMOs with implicit operands */
181 #define EOP_IR_FETCH	0x01 /* Plain fetch of memory */
182 #define EOP_IR_CLR	0x02 /* Fetch and clear */
183 #define EOP_IR_INC	0x05 /* Fetch and increment */
184 #define EOP_IR_DEC	0x07 /* Fetch and decrement */
188 /* GAMIRR - Registered AMOs with implicit operands */
189 #define EOP_IRR_FETCH	0x01 /* Registered fetch of memory */
190 #define EOP_IRR_CLR	0x02 /* Registered fetch and clear */
191 #define EOP_IRR_INC	0x05 /* Registered fetch and increment */
192 #define EOP_IRR_DEC	0x07 /* Registered fetch and decrement */
193 #define EOP_IRR_DECZ	0x0f /* Registered fetch and decrement, update on zero*/
195 /* GAMER - AMOs with explicit operands */
204 /* GAMERR - Registered AMOs with explicit operands */
214 /* GAMXR - SGI Arithmetic unit */
220 #define XTYPE_S		0x1	/* short (2-byte) */
221 #define XTYPE_W		0x2	/* word (4-byte) */
222 #define XTYPE_DW	0x3	/* doubleword (8-byte) */
223 #define XTYPE_CL	0x6	/* cacheline (64-byte) */
229 #define IAA_MMIO	0x1	/* noncoherent memory-mapped I/O space */
230 #define IAA_REGISTER	0x3	/* memory-mapped registers, etc. */
346  *     	- nelem and stride are in elements
347  *     	- tri0/tri1 is in bytes for the beginning of the data segment.
354 	ins->baddr0 = (long)gpa | ((unsigned long)iaa << 62);  in gru_vload_phys()
355 	ins->nelem = 1;  in gru_vload_phys()
356 	ins->op1_stride = 1;  in gru_vload_phys()
366 	ins->baddr0 = (long)gpa | ((unsigned long)iaa << 62);  in gru_vstore_phys()
367 	ins->nelem = 1;  in gru_vstore_phys()
368 	ins->op1_stride = 1;  in gru_vstore_phys()
379 	ins->baddr0 = (long)mem_addr;  in gru_vload()
380 	ins->nelem = nelem;  in gru_vload()
381 	ins->op1_stride = stride;  in gru_vload()
392 	ins->baddr0 = (long)mem_addr;  in gru_vstore()
393 	ins->nelem = nelem;  in gru_vstore()
394 	ins->op1_stride = stride;  in gru_vstore()
405 	ins->baddr0 = (long)mem_addr;  in gru_ivload()
406 	ins->nelem = nelem;  in gru_ivload()
407 	ins->tri1_bufsize = tri1;  in gru_ivload()
418 	ins->baddr0 = (long)mem_addr;  in gru_ivstore()
419 	ins->nelem = nelem;  in gru_ivstore()
420 	ins->tri1_bufsize = tri1;  in gru_ivstore()
431 	ins->baddr0 = (long)mem_addr;  in gru_vset()
432 	ins->op2_value_baddr1 = value;  in gru_vset()
433 	ins->nelem = nelem;  in gru_vset()
434 	ins->op1_stride = stride;  in gru_vset()
445 	ins->baddr0 = (long)mem_addr;  in gru_ivset()
446 	ins->op2_value_baddr1 = value;  in gru_ivset()
447 	ins->nelem = nelem;  in gru_ivset()
448 	ins->tri1_bufsize = tri1;  in gru_ivset()
459 	ins->baddr0 = (long)mem_addr;  in gru_vflush()
460 	ins->op1_stride = stride;  in gru_vflush()
461 	ins->nelem = nelem;  in gru_vflush()
481 	ins->baddr0 = (long)src;  in gru_bcopy()
482 	ins->op2_value_baddr1 = (long)dest;  in gru_bcopy()
483 	ins->nelem = nelem;  in gru_bcopy()
484 	ins->tri1_bufsize = bufsize;  in gru_bcopy()
495 	ins->baddr0 = (long)src;  in gru_bstore()
496 	ins->op2_value_baddr1 = (long)dest;  in gru_bstore()
497 	ins->nelem = nelem;  in gru_bstore()
507 	ins->baddr0 = (long)src;  in gru_gamir()
517 	ins->baddr0 = (long)src;  in gru_gamirr()
529 	ins->baddr0 = (long)src;  in gru_gamer()
530 	ins->op1_stride = operand1;  in gru_gamer()
531 	ins->op2_value_baddr1 = operand2;  in gru_gamer()
542 	ins->baddr0 = (long)src;  in gru_gamerr()
543 	ins->op1_stride = operand1;  in gru_gamerr()
544 	ins->op2_value_baddr1 = operand2;  in gru_gamerr()
554 	ins->baddr0 = (long)src;  in gru_gamxr()
555 	ins->nelem = 4;  in gru_gamxr()
566 	ins->baddr0 = (long)queue;  in gru_mesq()
567 	ins->nelem = nelem;  in gru_mesq()
576 	return ins->avalue;  in gru_get_amo_value()
583 	return ins->avalue & 0xffffffff;  in gru_get_amo_value_head()
590 	return ins->avalue >> 32;  in gru_get_amo_value_limit()
612  * Control block definition for checking status
630 	return cbs->istatus;  in gru_get_cb_status()
638 	return cbs->isubstatus & CBSS_MSG_QUEUE_MASK;  in gru_get_cb_message_queue_substatus()
646 	return cbs->isubstatus;  in gru_get_cb_substatus()
660 	ret = cbs->istatus;  in gru_check_status()
680  * mean TLB mis - only fatal errors such as memory parity error or user
690  * 	p	- Any valid pointer within the gseg
694 	return (void *)((unsigned long)p & ~(GRU_GSEG_PAGESIZE - 1));  in gru_get_gseg_pointer()
698  * Get a pointer to a control block
699  * 	gseg	- GSeg address returned from gru_get_thread_gru_segment()
700  * 	index	- index of desired CB
710  * 	gseg	- GSeg address returned from gru_get_thread_gru_segment()
711  * 	index	- index of desired cache line
720  * 	vaddr		- virtual address of within gseg
724 	return ((unsigned long)vaddr & (GRU_GSEG_PAGESIZE - 1)) - GRU_DS_BASE;  in gru_get_tri()