453  * only Aliveness, Readiness, Input ready, and Output doorbell are relevant
468 			"Pending Interrupts InReady=%01d Readiness=%01d, Aliveness=%01d, OutDoor=%01d\n",  in mei_txe_pending_interrupts()
512 /* Readiness */
515  * mei_txe_readiness_set_host_rdy - set host readiness bit
529  * mei_txe_readiness_clear - clear host readiness bit
557  * mei_txe_readiness_is_sec_rdy - check readiness
560  * @readiness: cached readiness state
562  * Return: true if readiness bit is set
564 static inline bool mei_txe_readiness_is_sec_rdy(u32 readiness)  in mei_txe_readiness_is_sec_rdy()  argument
566 	return !!(readiness & HICR_SEC_IPC_READINESS_SEC_RDY);  in mei_txe_readiness_is_sec_rdy()
578 	u32 readiness =  mei_txe_readiness_get(dev);  in mei_txe_hw_is_ready()  local
580 	return mei_txe_readiness_is_sec_rdy(readiness);  in mei_txe_hw_is_ready()
599  * mei_txe_readiness_wait - wait till readiness settles
615 		dev_err(dev->dev, "wait for readiness failed\n");  in mei_txe_readiness_wait()
678 	hw->readiness = mei_txe_readiness_get(dev);  in mei_txe_hw_config()
680 	dev_dbg(dev->dev, "aliveness_resp = 0x%08x, readiness = 0x%08x.\n",  in mei_txe_hw_config()
681 		hw->aliveness, hw->readiness);  in mei_txe_hw_config()
898 	 * Set readiness RDY_CLR bit  in mei_txe_hw_reset()
924 		dev_err(dev->dev, "waiting for readiness failed\n");  in mei_txe_hw_start()
1069 	hw->readiness = mei_txe_readiness_get(dev);  in mei_txe_irq_thread_handler()
1071 	/* Readiness:  in mei_txe_irq_thread_handler()
1076 		dev_dbg(dev->dev, "Readiness Interrupt was received...\n");  in mei_txe_irq_thread_handler()
1079 		if (mei_txe_readiness_is_sec_rdy(hw->readiness)) {  in mei_txe_irq_thread_handler()