Lines Matching full:fpga
19 * The JTAG ID's of the supported FPGA's. The ID is 32bit wide
25 /* FPGA commands */
41 #define FPGA_CLEAR_TIMEOUT 5000 /* max. 5000ms for FPGA clear */
92 /* Trying to speak with the FPGA via SPI... */ in firmware_load()
96 dev_dbg(&spi->dev, "FPGA JTAG ID=%08x\n", jedec_id); in firmware_load()
104 "Error: No supported FPGA detected (JEDEC_ID=%08x)!\n", in firmware_load()
109 dev_info(&spi->dev, "FPGA %s detected\n", ecp3_dev[i].name); in firmware_load()
114 dev_dbg(&spi->dev, "FPGA Status=%08x\n", status); in firmware_load()
141 * Wait for FPGA memory to become cleared in firmware_load()
155 "Error: Timeout waiting for FPGA to clear (status=%08x)!\n", in firmware_load()
161 dev_info(&spi->dev, "Configuring the FPGA...\n"); in firmware_load()
170 dev_dbg(&spi->dev, "FPGA Status=%08x\n", status); in firmware_load()
174 dev_info(&spi->dev, "FPGA successfully configured!\n"); in firmware_load()
176 dev_info(&spi->dev, "FPGA not configured (DONE not set)\n"); in firmware_load()
209 dev_info(&spi->dev, "FPGA bitstream configuration driver registered\n"); in lattice_ecp3_probe()
240 MODULE_DESCRIPTION("Lattice ECP3 FPGA configuration via SPI");