Lines Matching +full:wait +full:- +full:queue
1 /* SPDX-License-Identifier: GPL-2.0-only */
11 * Author: Joerg-Stephan Vogt <jsvogt@de.ibm.com>
42 #define GENWQE_DDCB_MAX 32 /* DDCBs on the work-queue */
62 #define PCI_SUBSYSTEM_ID_GENWQE5 0x035f /* Genwqe A5 Subsystem-ID */
63 #define PCI_SUBSYSTEM_ID_GENWQE5_NEW 0x044b /* Genwqe A5 Subsystem-ID */
67 #define PCI_SUBSYSTEM_ID_GENWQE5_SRIOV 0x0000 /* Genwqe A5 Subsystem-ID */
73 * struct genwqe_reg - Genwqe data dump functionality
82 * enum genwqe_dbg_type - Specify chip unit to dump/debug
99 #define GENWQE_INJECT_HARDWARE_FAILURE 0x00000001 /* injects -1 reg reads */
107 * Error-handling in case of card malfunction
108 * ------------------------------------------
118 * the card and queue.
120 * All functions accessing the card device return either -EIO or -ENODEV
140 * -------------
143 * sudo sh -c 'echo 0xfffff > /sys/class/genwqe/genwqe0_card/err_inject'
148 * struct dma_mapping_type - Mapping type definition
151 * this we need to pin/swap-in the memory and request a DMA address
161 * struct dma_mapping - Information about memory mappings done by the driver
166 void *u_vaddr; /* user-space vaddr/non-aligned */
167 void *k_vaddr; /* kernel-space vaddr/non-aligned */
184 m->type = type; in genwqe_mapping_init()
185 m->write = 1; /* Assume the maps we create are R/W */ in genwqe_mapping_init()
189 * struct ddcb_queue - DDCB queue data
190 * @ddcb_max: Number of DDCBs on the queue
196 * @return_on_busy: Number of -EBUSY returns on full queue
197 * @wait_on_busy: Number of waits on full queue
198 * @ddcb_daddr: DMA address of first DDCB in the queue
199 * @ddcb_vaddr: Kernel virtual address of first DDCB in the queue
201 * @ddcb_waitqs: Associated wait queues (one per DDCB)
203 * @ddcb_waitq: Wait on next DDCB finishing
214 unsigned int return_on_busy; /* how many times -EBUSY? */
222 spinlock_t ddcb_lock; /* exclusive access to queue */
223 wait_queue_head_t busy_waitq; /* wait for ddcb processing */
225 /* registers or the respective queue to be used */
249 * struct genwqe_dev - GenWQE device information
252 * @card_thread: Working thread to operate the DDCB queue
253 * @card_waitq: Wait queue used in card_thread
254 * @queue: DDCB queue
256 * @health_waitq: Wait queue used in health_thread
258 * @mmio: Base address of 64-bit register space
265 * destroyed when it goes away. It holds data to maintain the queue as
272 int card_idx; /* card index 0..CARD_NO_MAX-1 */
281 struct ddcb_queue queue; /* genwqe DDCB queue */ member
301 void __iomem *mmio; /* BAR-0 MMIO start */
319 int ddcb_software_timeout; /* wait until DDCB times out */
321 int kill_timeout; /* wait after sending SIGKILL */
325 * enum genwqe_requ_state - State of a DDCB execution request
336 * struct genwqe_sgl - Scatter gather list describing user-space memory
340 * @user_addr: user-space address of memory area
341 * @user_size: size of user-space memory area
351 void __user *user_addr; /* user-space base-address */
377 * struct ddcb_requ - Kernel internal representation of the DDCB request
384 struct ddcb_queue *queue; /* associated queue */ member
395 * struct genwqe_file - Information for open GenWQE devices
418 * genwqe_get_slu_id() - Read Service Layer Unit Id
426 return (int)((cd->slu_unitcfg >> 32) & 0xff); in genwqe_get_slu_id()
450 * genwqe_write_vreg() - Write register in VF window
459 * genwqe_read_vreg() - Read register in VF window
493 return m->size != 0; in dma_mapping_used()
497 * __genwqe_execute_ddcb() - Execute DDCB request with addr translation
502 * user-space buffers, inclusive page pinning and scatter gather list
509 * __genwqe_execute_raw_ddcb() - Execute DDCB request without addr translation
549 * genwqe_is_privileged() - Determine operation mode for PCI function
566 * if (pci_dev->is_virtfn)
567 * cd->is_privileged = 0;
569 * cd->is_privileged = (__genwqe_readq(cd, IO_SLU_BITSTREAM)
574 return cd->is_privileged; in genwqe_is_privileged()