Lines Matching +full:native +full:- +full:mode
1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include <misc/cxl-base.h>
29 spin_lock(&afu->afu_cntl_lock); in afu_control()
40 dev_warn(&afu->dev, "WARNING: AFU control timed out!\n"); in afu_control()
41 rc = -EBUSY; in afu_control()
45 if (!cxl_ops->link_ok(afu->adapter, afu)) { in afu_control()
46 afu->enabled = enabled; in afu_control()
47 rc = -EIO; in afu_control()
67 afu->enabled = enabled; in afu_control()
70 spin_unlock(&afu->afu_cntl_lock); in afu_control()
107 * Re-enable any masked interrupts when the AFU is not in native_afu_reset()
109 * in dedicated mode. in native_afu_reset()
111 if (afu->current_mode == 0) { in native_afu_reset()
122 if (!cxl_ops->link_ok(afu->adapter, afu)) { in native_afu_check_and_enable()
124 return -EIO; in native_afu_check_and_enable()
126 if (afu->enabled) in native_afu_check_and_enable()
150 if (!cxl_ops->link_ok(afu->adapter, afu)) { in cxl_psl_purge()
151 dev_warn(&afu->dev, "PSL Purge called with link down, ignoring\n"); in cxl_psl_purge()
152 rc = -EIO; in cxl_psl_purge()
168 dev_warn(&afu->dev, "WARNING: PSL Purge timed out!\n"); in cxl_psl_purge()
169 rc = -EBUSY; in cxl_psl_purge()
172 if (!cxl_ops->link_ok(afu->adapter, afu)) { in cxl_psl_purge()
173 rc = -EIO; in cxl_psl_purge()
183 …dev_notice(&afu->dev, "PSL purge terminating pending translation, DSISR: 0x%016llx, DAR: 0x%016llx… in cxl_psl_purge()
187 … dev_notice(&afu->dev, "PSL purge acknowledging pending non-translation fault, DSISR: 0x%016llx\n", in cxl_psl_purge()
196 pr_devel("PSL purged in %lld ns\n", end - start); in cxl_psl_purge()
210 * Most of that junk is really just an overly-complicated way of saying in spa_max_procs()
214 * end_of_PSL_queue_area = SPA_Base + ((n+4) * 128) + (n*8) - 1 in spa_max_procs()
220 return ((spa_size / 8) - 96) / 17; in spa_max_procs()
223 static int cxl_alloc_spa(struct cxl_afu *afu, int mode) in cxl_alloc_spa() argument
228 afu->native->spa_order = -1; in cxl_alloc_spa()
230 afu->native->spa_order++; in cxl_alloc_spa()
231 spa_size = (1 << afu->native->spa_order) * PAGE_SIZE; in cxl_alloc_spa()
234 dev_warn(&afu->dev, "num_of_processes too large for the SPA, limiting to %i (0x%x)\n", in cxl_alloc_spa()
235 afu->native->spa_max_procs, afu->native->spa_size); in cxl_alloc_spa()
236 if (mode != CXL_MODE_DEDICATED) in cxl_alloc_spa()
237 afu->num_procs = afu->native->spa_max_procs; in cxl_alloc_spa()
241 afu->native->spa_size = spa_size; in cxl_alloc_spa()
242 afu->native->spa_max_procs = spa_max_procs(afu->native->spa_size); in cxl_alloc_spa()
243 } while (afu->native->spa_max_procs < afu->num_procs); in cxl_alloc_spa()
245 if (!(afu->native->spa = (struct cxl_process_element *) in cxl_alloc_spa()
246 __get_free_pages(GFP_KERNEL | __GFP_ZERO, afu->native->spa_order))) { in cxl_alloc_spa()
248 return -ENOMEM; in cxl_alloc_spa()
250 pr_devel("spa pages: %i afu->spa_max_procs: %i afu->num_procs: %i\n", in cxl_alloc_spa()
251 1<<afu->native->spa_order, afu->native->spa_max_procs, afu->num_procs); in cxl_alloc_spa()
260 afu->native->sw_command_status = (__be64 *)((char *)afu->native->spa + in attach_spa()
261 ((afu->native->spa_max_procs + 3) * 128)); in attach_spa()
263 spap = virt_to_phys(afu->native->spa) & CXL_PSL_SPAP_Addr; in attach_spa()
264 spap |= ((afu->native->spa_size >> (12 - CXL_PSL_SPAP_Size_Shift)) - 1) & CXL_PSL_SPAP_Size; in attach_spa()
267 afu->native->spa, afu->native->spa_max_procs, in attach_spa()
268 afu->native->sw_command_status, spap); in attach_spa()
274 if (afu->native->spa) { in cxl_release_spa()
275 free_pages((unsigned long) afu->native->spa, in cxl_release_spa()
276 afu->native->spa_order); in cxl_release_spa()
277 afu->native->spa = NULL; in cxl_release_spa()
290 pr_devel("CXL adapter - invalidation of all ERAT entries\n"); in cxl_invalidate_all_psl9()
300 dev_warn(&adapter->dev, in cxl_invalidate_all_psl9()
302 return -EBUSY; in cxl_invalidate_all_psl9()
304 if (!cxl_ops->link_ok(adapter, NULL)) in cxl_invalidate_all_psl9()
305 return -EIO; in cxl_invalidate_all_psl9()
322 dev_warn(&adapter->dev, "WARNING: CXL adapter wide TLBIA timed out!\n"); in cxl_invalidate_all_psl8()
323 return -EBUSY; in cxl_invalidate_all_psl8()
325 if (!cxl_ops->link_ok(adapter, NULL)) in cxl_invalidate_all_psl8()
326 return -EIO; in cxl_invalidate_all_psl8()
333 dev_warn(&adapter->dev, "WARNING: CXL adapter wide SLBIA timed out!\n"); in cxl_invalidate_all_psl8()
334 return -EBUSY; in cxl_invalidate_all_psl8()
336 if (!cxl_ops->link_ok(adapter, NULL)) in cxl_invalidate_all_psl8()
337 return -EIO; in cxl_invalidate_all_psl8()
353 if (adapter->native->no_data_cache) { in cxl_data_cache_flush()
366 dev_warn(&adapter->dev, "WARNING: cache flush timed out!\n"); in cxl_data_cache_flush()
367 return -EBUSY; in cxl_data_cache_flush()
370 if (!cxl_ops->link_ok(adapter, NULL)) { in cxl_data_cache_flush()
371 dev_warn(&adapter->dev, "WARNING: link down when flushing cache\n"); in cxl_data_cache_flush()
372 return -EIO; in cxl_data_cache_flush()
406 struct cxl *adapter = ctx->afu->adapter; in slb_invalid()
409 WARN_ON(!mutex_is_locked(&ctx->afu->native->spa_mutex)); in slb_invalid()
412 ((u64)be32_to_cpu(ctx->elem->common.pid) << 32) | in slb_invalid()
413 be32_to_cpu(ctx->elem->lpid)); in slb_invalid()
417 if (!cxl_ops->link_ok(adapter, NULL)) in slb_invalid()
435 WARN_ON(!ctx->afu->enabled); in do_process_element_cmd()
437 ctx->elem->software_state = cpu_to_be32(pe_state); in do_process_element_cmd()
439 *(ctx->afu->native->sw_command_status) = cpu_to_be64(cmd | 0 | ctx->pe); in do_process_element_cmd()
441 cxl_p1n_write(ctx->afu, CXL_PSL_LLCMD_An, cmd | ctx->pe); in do_process_element_cmd()
444 dev_warn(&ctx->afu->dev, "WARNING: Process Element Command timed out!\n"); in do_process_element_cmd()
445 rc = -EBUSY; in do_process_element_cmd()
448 if (!cxl_ops->link_ok(ctx->afu->adapter, ctx->afu)) { in do_process_element_cmd()
449 dev_warn(&ctx->afu->dev, "WARNING: Device link down, aborting Process Element Command!\n"); in do_process_element_cmd()
450 rc = -EIO; in do_process_element_cmd()
453 state = be64_to_cpup(ctx->afu->native->sw_command_status); in do_process_element_cmd()
456 rc = -1; in do_process_element_cmd()
460 (cmd | (cmd >> 16) | ctx->pe)) in do_process_element_cmd()
481 mutex_lock(&ctx->afu->native->spa_mutex); in add_process_element()
482 pr_devel("%s Adding pe: %i started\n", __func__, ctx->pe); in add_process_element()
484 ctx->pe_inserted = true; in add_process_element()
485 pr_devel("%s Adding pe: %i finished\n", __func__, ctx->pe); in add_process_element()
486 mutex_unlock(&ctx->afu->native->spa_mutex); in add_process_element()
495 if (!(ctx->elem->software_state & cpu_to_be32(CXL_PE_SOFTWARE_STATE_V))) in terminate_process_element()
498 mutex_lock(&ctx->afu->native->spa_mutex); in terminate_process_element()
499 pr_devel("%s Terminate pe: %i started\n", __func__, ctx->pe); in terminate_process_element()
504 if (cxl_ops->link_ok(ctx->afu->adapter, ctx->afu)) in terminate_process_element()
507 ctx->elem->software_state = 0; /* Remove Valid bit */ in terminate_process_element()
508 pr_devel("%s Terminate pe: %i finished\n", __func__, ctx->pe); in terminate_process_element()
509 mutex_unlock(&ctx->afu->native->spa_mutex); in terminate_process_element()
517 mutex_lock(&ctx->afu->native->spa_mutex); in remove_process_element()
518 pr_devel("%s Remove pe: %i started\n", __func__, ctx->pe); in remove_process_element()
523 if (cxl_ops->link_ok(ctx->afu->adapter, ctx->afu)) in remove_process_element()
527 ctx->pe_inserted = false; in remove_process_element()
530 pr_devel("%s Remove pe: %i finished\n", __func__, ctx->pe); in remove_process_element()
531 mutex_unlock(&ctx->afu->native->spa_mutex); in remove_process_element()
538 if (!ctx->afu->pp_size || ctx->master) { in cxl_assign_psn_space()
539 ctx->psn_phys = ctx->afu->psn_phys; in cxl_assign_psn_space()
540 ctx->psn_size = ctx->afu->adapter->ps_size; in cxl_assign_psn_space()
542 ctx->psn_phys = ctx->afu->psn_phys + in cxl_assign_psn_space()
543 (ctx->afu->native->pp_offset + ctx->afu->pp_size * ctx->pe); in cxl_assign_psn_space()
544 ctx->psn_size = ctx->afu->pp_size; in cxl_assign_psn_space()
552 dev_info(&afu->dev, "Activating AFU directed mode\n"); in activate_afu_directed()
554 afu->num_procs = afu->max_procs_virtualised; in activate_afu_directed()
555 if (afu->native->spa == NULL) { in activate_afu_directed()
557 return -ENOMEM; in activate_afu_directed()
566 afu->current_mode = CXL_MODE_DIRECTED; in activate_afu_directed()
625 return cxl_calculate_sr(ctx->master, ctx->kernel, false, in calculate_sr()
631 bool need_update = (ctx->status == STARTED); in update_ivtes_directed()
640 ctx->elem->ivte_offsets[r] = cpu_to_be16(ctx->irqs.offset[r]); in update_ivtes_directed()
641 ctx->elem->ivte_ranges[r] = cpu_to_be16(ctx->irqs.range[r]); in update_ivtes_directed()
665 ctx->elem->ctxtime = 0; /* disable */ in process_element_entry_psl9()
666 ctx->elem->lpid = cpu_to_be32(mfspr(SPRN_LPID)); in process_element_entry_psl9()
667 ctx->elem->haurp = 0; /* disable */ in process_element_entry_psl9()
669 if (ctx->kernel) in process_element_entry_psl9()
672 if (ctx->mm == NULL) { in process_element_entry_psl9()
674 __func__, ctx->pe, pid_nr(ctx->pid)); in process_element_entry_psl9()
675 return -EINVAL; in process_element_entry_psl9()
677 pid = ctx->mm->context.id; in process_element_entry_psl9()
681 if (!(ctx->tidr) && (ctx->assign_tidr)) { in process_element_entry_psl9()
684 return -ENODEV; in process_element_entry_psl9()
685 ctx->tidr = current->thread.tidr; in process_element_entry_psl9()
686 pr_devel("%s: current tidr: %d\n", __func__, ctx->tidr); in process_element_entry_psl9()
689 ctx->elem->common.tid = cpu_to_be32(ctx->tidr); in process_element_entry_psl9()
690 ctx->elem->common.pid = cpu_to_be32(pid); in process_element_entry_psl9()
692 ctx->elem->sr = cpu_to_be64(calculate_sr(ctx)); in process_element_entry_psl9()
694 ctx->elem->common.csrp = 0; /* disable */ in process_element_entry_psl9()
702 if (ctx->irqs.range[0] == 0) { in process_element_entry_psl9()
703 ctx->irqs.offset[0] = ctx->afu->native->psl_hwirq; in process_element_entry_psl9()
704 ctx->irqs.range[0] = 1; in process_element_entry_psl9()
707 ctx->elem->common.amr = cpu_to_be64(amr); in process_element_entry_psl9()
708 ctx->elem->common.wed = cpu_to_be64(wed); in process_element_entry_psl9()
725 result = cxl_ops->afu_check_and_enable(ctx->afu); in cxl_attach_afu_directed_psl9()
739 ctx->elem->ctxtime = 0; /* disable */ in cxl_attach_afu_directed_psl8()
740 ctx->elem->lpid = cpu_to_be32(mfspr(SPRN_LPID)); in cxl_attach_afu_directed_psl8()
741 ctx->elem->haurp = 0; /* disable */ in cxl_attach_afu_directed_psl8()
742 ctx->elem->u.sdr = cpu_to_be64(mfspr(SPRN_SDR1)); in cxl_attach_afu_directed_psl8()
744 pid = current->pid; in cxl_attach_afu_directed_psl8()
745 if (ctx->kernel) in cxl_attach_afu_directed_psl8()
747 ctx->elem->common.tid = 0; in cxl_attach_afu_directed_psl8()
748 ctx->elem->common.pid = cpu_to_be32(pid); in cxl_attach_afu_directed_psl8()
750 ctx->elem->sr = cpu_to_be64(calculate_sr(ctx)); in cxl_attach_afu_directed_psl8()
752 ctx->elem->common.csrp = 0; /* disable */ in cxl_attach_afu_directed_psl8()
753 ctx->elem->common.u.psl8.aurp0 = 0; /* disable */ in cxl_attach_afu_directed_psl8()
754 ctx->elem->common.u.psl8.aurp1 = 0; /* disable */ in cxl_attach_afu_directed_psl8()
758 ctx->elem->common.u.psl8.sstp0 = cpu_to_be64(ctx->sstp0); in cxl_attach_afu_directed_psl8()
759 ctx->elem->common.u.psl8.sstp1 = cpu_to_be64(ctx->sstp1); in cxl_attach_afu_directed_psl8()
765 if (ctx->irqs.range[0] == 0) { in cxl_attach_afu_directed_psl8()
766 ctx->irqs.offset[0] = ctx->afu->native->psl_hwirq; in cxl_attach_afu_directed_psl8()
767 ctx->irqs.range[0] = 1; in cxl_attach_afu_directed_psl8()
772 ctx->elem->common.amr = cpu_to_be64(amr); in cxl_attach_afu_directed_psl8()
773 ctx->elem->common.wed = cpu_to_be64(wed); in cxl_attach_afu_directed_psl8()
776 if ((result = cxl_ops->afu_check_and_enable(ctx->afu))) in cxl_attach_afu_directed_psl8()
784 dev_info(&afu->dev, "Deactivating AFU directed mode\n"); in deactivate_afu_directed()
786 afu->current_mode = 0; in deactivate_afu_directed()
787 afu->num_procs = 0; in deactivate_afu_directed()
794 * stopping an AFU in AFU directed mode is AFU specific, which is not in deactivate_afu_directed()
817 if (afu->adapter->native->sl_ops->needs_reset_before_disable) in deactivate_afu_directed()
818 cxl_ops->afu_reset(afu); in deactivate_afu_directed()
827 dev_info(&afu->dev, "Activating dedicated process mode\n"); in cxl_activate_dedicated_process_psl9()
830 * If XSL is set to dedicated mode (Set in PSL_SCNTL reg), the in cxl_activate_dedicated_process_psl9()
836 afu->num_procs = 1; in cxl_activate_dedicated_process_psl9()
837 if (afu->native->spa == NULL) { in cxl_activate_dedicated_process_psl9()
839 return -ENOMEM; in cxl_activate_dedicated_process_psl9()
846 afu->current_mode = CXL_MODE_DEDICATED; in cxl_activate_dedicated_process_psl9()
853 dev_info(&afu->dev, "Activating dedicated process mode\n"); in cxl_activate_dedicated_process_psl8()
868 afu->current_mode = CXL_MODE_DEDICATED; in cxl_activate_dedicated_process_psl8()
869 afu->num_procs = 1; in cxl_activate_dedicated_process_psl8()
879 ctx->elem->ivte_offsets[r] = cpu_to_be16(ctx->irqs.offset[r]); in cxl_update_dedicated_ivtes_psl9()
880 ctx->elem->ivte_ranges[r] = cpu_to_be16(ctx->irqs.range[r]); in cxl_update_dedicated_ivtes_psl9()
886 struct cxl_afu *afu = ctx->afu; in cxl_update_dedicated_ivtes_psl8()
889 (((u64)ctx->irqs.offset[0] & 0xffff) << 48) | in cxl_update_dedicated_ivtes_psl8()
890 (((u64)ctx->irqs.offset[1] & 0xffff) << 32) | in cxl_update_dedicated_ivtes_psl8()
891 (((u64)ctx->irqs.offset[2] & 0xffff) << 16) | in cxl_update_dedicated_ivtes_psl8()
892 ((u64)ctx->irqs.offset[3] & 0xffff)); in cxl_update_dedicated_ivtes_psl8()
894 (((u64)ctx->irqs.range[0] & 0xffff) << 48) | in cxl_update_dedicated_ivtes_psl8()
895 (((u64)ctx->irqs.range[1] & 0xffff) << 32) | in cxl_update_dedicated_ivtes_psl8()
896 (((u64)ctx->irqs.range[2] & 0xffff) << 16) | in cxl_update_dedicated_ivtes_psl8()
897 ((u64)ctx->irqs.range[3] & 0xffff)); in cxl_update_dedicated_ivtes_psl8()
902 struct cxl_afu *afu = ctx->afu; in cxl_attach_dedicated_process_psl9()
910 if (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes) in cxl_attach_dedicated_process_psl9()
911 afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx); in cxl_attach_dedicated_process_psl9()
913 ctx->elem->software_state = cpu_to_be32(CXL_PE_SOFTWARE_STATE_V); in cxl_attach_dedicated_process_psl9()
921 result = cxl_ops->afu_reset(afu); in cxl_attach_dedicated_process_psl9()
930 struct cxl_afu *afu = ctx->afu; in cxl_attach_dedicated_process_psl8()
934 pid = (u64)current->pid << 32; in cxl_attach_dedicated_process_psl8()
935 if (ctx->kernel) in cxl_attach_dedicated_process_psl8()
941 if ((rc = cxl_write_sstp(afu, ctx->sstp0, ctx->sstp1))) in cxl_attach_dedicated_process_psl8()
946 if (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes) in cxl_attach_dedicated_process_psl8()
947 afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx); in cxl_attach_dedicated_process_psl8()
954 if ((rc = cxl_ops->afu_reset(afu))) in cxl_attach_dedicated_process_psl8()
964 dev_info(&afu->dev, "Deactivating dedicated process mode\n"); in deactivate_dedicated_process()
966 afu->current_mode = 0; in deactivate_dedicated_process()
967 afu->num_procs = 0; in deactivate_dedicated_process()
974 static int native_afu_deactivate_mode(struct cxl_afu *afu, int mode) in native_afu_deactivate_mode() argument
976 if (mode == CXL_MODE_DIRECTED) in native_afu_deactivate_mode()
978 if (mode == CXL_MODE_DEDICATED) in native_afu_deactivate_mode()
983 static int native_afu_activate_mode(struct cxl_afu *afu, int mode) in native_afu_activate_mode() argument
985 if (!mode) in native_afu_activate_mode()
987 if (!(mode & afu->modes_supported)) in native_afu_activate_mode()
988 return -EINVAL; in native_afu_activate_mode()
990 if (!cxl_ops->link_ok(afu->adapter, afu)) { in native_afu_activate_mode()
992 return -EIO; in native_afu_activate_mode()
995 if (mode == CXL_MODE_DIRECTED) in native_afu_activate_mode()
997 if ((mode == CXL_MODE_DEDICATED) && in native_afu_activate_mode()
998 (afu->adapter->native->sl_ops->activate_dedicated_process)) in native_afu_activate_mode()
999 return afu->adapter->native->sl_ops->activate_dedicated_process(afu); in native_afu_activate_mode()
1001 return -EINVAL; in native_afu_activate_mode()
1007 if (!cxl_ops->link_ok(ctx->afu->adapter, ctx->afu)) { in native_attach_process()
1009 return -EIO; in native_attach_process()
1012 ctx->kernel = kernel; in native_attach_process()
1013 if ((ctx->afu->current_mode == CXL_MODE_DIRECTED) && in native_attach_process()
1014 (ctx->afu->adapter->native->sl_ops->attach_afu_directed)) in native_attach_process()
1015 return ctx->afu->adapter->native->sl_ops->attach_afu_directed(ctx, wed, amr); in native_attach_process()
1017 if ((ctx->afu->current_mode == CXL_MODE_DEDICATED) && in native_attach_process()
1018 (ctx->afu->adapter->native->sl_ops->attach_dedicated_process)) in native_attach_process()
1019 return ctx->afu->adapter->native->sl_ops->attach_dedicated_process(ctx, wed, amr); in native_attach_process()
1021 return -EINVAL; in native_attach_process()
1028 * stop the AFU in dedicated mode (we therefore do not make that in detach_process_native_dedicated()
1042 cxl_ops->afu_reset(ctx->afu); in detach_process_native_dedicated()
1043 cxl_afu_disable(ctx->afu); in detach_process_native_dedicated()
1044 cxl_psl_purge(ctx->afu); in detach_process_native_dedicated()
1050 if (ctx->afu->current_mode == CXL_MODE_DIRECTED) in native_update_ivtes()
1052 if ((ctx->afu->current_mode == CXL_MODE_DEDICATED) && in native_update_ivtes()
1053 (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes)) in native_update_ivtes()
1054 return ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx); in native_update_ivtes()
1055 WARN(1, "native_update_ivtes: Bad mode\n"); in native_update_ivtes()
1060 if (!ctx->pe_inserted) in detach_process_native_afu_directed()
1063 return -1; in detach_process_native_afu_directed()
1065 return -1; in detach_process_native_afu_directed()
1074 if (ctx->afu->current_mode == CXL_MODE_DEDICATED) in native_detach_process()
1085 if (!cxl_ops->link_ok(afu->adapter, afu)) in native_get_irq_info()
1086 return -EIO; in native_get_irq_info()
1088 info->dsisr = cxl_p2n_read(afu, CXL_PSL_DSISR_An); in native_get_irq_info()
1089 info->dar = cxl_p2n_read(afu, CXL_PSL_DAR_An); in native_get_irq_info()
1091 info->dsr = cxl_p2n_read(afu, CXL_PSL_DSR_An); in native_get_irq_info()
1092 info->afu_err = cxl_p2n_read(afu, CXL_AFU_ERR_An); in native_get_irq_info()
1093 info->errstat = cxl_p2n_read(afu, CXL_PSL_ErrStat_An); in native_get_irq_info()
1094 info->proc_handle = 0; in native_get_irq_info()
1103 fir1 = cxl_p1_read(ctx->afu->adapter, CXL_PSL9_FIR1); in cxl_native_irq_dump_regs_psl9()
1105 dev_crit(&ctx->afu->dev, "PSL_FIR1: 0x%016llx\n", fir1); in cxl_native_irq_dump_regs_psl9()
1106 if (ctx->afu->adapter->native->sl_ops->register_serr_irq) { in cxl_native_irq_dump_regs_psl9()
1107 serr = cxl_p1n_read(ctx->afu, CXL_PSL_SERR_An); in cxl_native_irq_dump_regs_psl9()
1108 cxl_afu_decode_psl_serr(ctx->afu, serr); in cxl_native_irq_dump_regs_psl9()
1116 fir1 = cxl_p1_read(ctx->afu->adapter, CXL_PSL_FIR1); in cxl_native_irq_dump_regs_psl8()
1117 fir2 = cxl_p1_read(ctx->afu->adapter, CXL_PSL_FIR2); in cxl_native_irq_dump_regs_psl8()
1118 fir_slice = cxl_p1n_read(ctx->afu, CXL_PSL_FIR_SLICE_An); in cxl_native_irq_dump_regs_psl8()
1119 afu_debug = cxl_p1n_read(ctx->afu, CXL_AFU_DEBUG_An); in cxl_native_irq_dump_regs_psl8()
1121 dev_crit(&ctx->afu->dev, "PSL_FIR1: 0x%016llx\n", fir1); in cxl_native_irq_dump_regs_psl8()
1122 dev_crit(&ctx->afu->dev, "PSL_FIR2: 0x%016llx\n", fir2); in cxl_native_irq_dump_regs_psl8()
1123 if (ctx->afu->adapter->native->sl_ops->register_serr_irq) { in cxl_native_irq_dump_regs_psl8()
1124 serr = cxl_p1n_read(ctx->afu, CXL_PSL_SERR_An); in cxl_native_irq_dump_regs_psl8()
1125 cxl_afu_decode_psl_serr(ctx->afu, serr); in cxl_native_irq_dump_regs_psl8()
1127 dev_crit(&ctx->afu->dev, "PSL_FIR_SLICE_An: 0x%016llx\n", fir_slice); in cxl_native_irq_dump_regs_psl8()
1128 dev_crit(&ctx->afu->dev, "CXL_PSL_AFU_DEBUG_An: 0x%016llx\n", afu_debug); in cxl_native_irq_dump_regs_psl8()
1135 dev_crit(&ctx->afu->dev, "PSL ERROR STATUS: 0x%016llx\n", errstat); in native_handle_psl_slice_error()
1137 if (ctx->afu->adapter->native->sl_ops->psl_irq_dump_registers) in native_handle_psl_slice_error()
1138 ctx->afu->adapter->native->sl_ops->psl_irq_dump_registers(ctx); in native_handle_psl_slice_error()
1140 if (ctx->afu->adapter->native->sl_ops->debugfs_stop_trace) { in native_handle_psl_slice_error()
1141 dev_crit(&ctx->afu->dev, "STOPPING CXL TRACE\n"); in native_handle_psl_slice_error()
1142 ctx->afu->adapter->native->sl_ops->debugfs_stop_trace(ctx->afu->adapter); in native_handle_psl_slice_error()
1145 return cxl_ops->ack_irq(ctx, 0, errstat); in native_handle_psl_slice_error()
1161 if (cxl_is_translation_fault(afu, irq_info->dsisr)) in cxl_fail_irq_psl()
1179 dev_warn(&afu->dev, in native_irq_multiplexed()
1184 /* Mask the pe-handle from register value */ in native_irq_multiplexed()
1188 if (afu->adapter->native->sl_ops->fail_irq) in native_irq_multiplexed()
1189 return afu->adapter->native->sl_ops->fail_irq(afu, &irq_info); in native_irq_multiplexed()
1194 ctx = idr_find(&afu->contexts_idr, ph); in native_irq_multiplexed()
1196 if (afu->adapter->native->sl_ops->handle_interrupt) in native_irq_multiplexed()
1197 ret = afu->adapter->native->sl_ops->handle_interrupt(irq, ctx, &irq_info); in native_irq_multiplexed()
1204 " %016llx\n(Possible AFU HW issue - was a term/remove acked" in native_irq_multiplexed()
1207 if (afu->adapter->native->sl_ops->fail_irq) in native_irq_multiplexed()
1208 ret = afu->adapter->native->sl_ops->fail_irq(afu, &irq_info); in native_irq_multiplexed()
1222 while (timeout--) { in native_irq_wait()
1223 ph = cxl_p2n_read(ctx->afu, CXL_PSL_PEHandle_An) & 0xffff; in native_irq_wait()
1224 if (ph != ctx->pe) in native_irq_wait()
1226 dsisr = cxl_p2n_read(ctx->afu, CXL_PSL_DSISR_An); in native_irq_wait()
1240 dev_warn(&ctx->afu->dev, "WARNING: waiting on DSI for PE %i" in native_irq_wait()
1263 dev_crit(&afu->dev, "PSL_FIR_SLICE_An: 0x%016llx\n", fir_slice); in native_slice_irq_err()
1264 dev_crit(&afu->dev, "CXL_PSL_AFU_DEBUG_An: 0x%016llx\n", afu_debug); in native_slice_irq_err()
1266 dev_crit(&afu->dev, "CXL_PSL_ErrStat_An: 0x%016llx\n", errstat); in native_slice_irq_err()
1267 dev_crit(&afu->dev, "AFU_ERR_An: 0x%.16llx\n", afu_error); in native_slice_irq_err()
1268 dev_crit(&afu->dev, "PSL_DSISR_An: 0x%.16llx\n", dsisr); in native_slice_irq_err()
1274 dev_info(&afu->dev, "Further such interrupts will be masked until the AFU is reset\n"); in native_slice_irq_err()
1284 dev_crit(&adapter->dev, "PSL_FIR: 0x%016llx\n", fir1); in cxl_native_err_irq_dump_regs_psl9()
1293 dev_crit(&adapter->dev, in cxl_native_err_irq_dump_regs_psl8()
1306 dev_crit(&adapter->dev, "PSL_ErrIVTE: 0x%016llx\n", err_ivte); in native_irq_err()
1308 if (adapter->native->sl_ops->debugfs_stop_trace) { in native_irq_err()
1309 dev_crit(&adapter->dev, "STOPPING CXL TRACE\n"); in native_irq_err()
1310 adapter->native->sl_ops->debugfs_stop_trace(adapter); in native_irq_err()
1313 if (adapter->native->sl_ops->err_irq_dump_registers) in native_irq_err()
1314 adapter->native->sl_ops->err_irq_dump_registers(adapter); in native_irq_err()
1323 adapter->irq_name = kasprintf(GFP_KERNEL, "cxl-%s-err", in cxl_native_register_psl_err_irq()
1324 dev_name(&adapter->dev)); in cxl_native_register_psl_err_irq()
1325 if (!adapter->irq_name) in cxl_native_register_psl_err_irq()
1326 return -ENOMEM; in cxl_native_register_psl_err_irq()
1329 &adapter->native->err_hwirq, in cxl_native_register_psl_err_irq()
1330 &adapter->native->err_virq, in cxl_native_register_psl_err_irq()
1331 adapter->irq_name))) { in cxl_native_register_psl_err_irq()
1332 kfree(adapter->irq_name); in cxl_native_register_psl_err_irq()
1333 adapter->irq_name = NULL; in cxl_native_register_psl_err_irq()
1337 cxl_p1_write(adapter, CXL_PSL_ErrIVTE, adapter->native->err_hwirq & 0xffff); in cxl_native_register_psl_err_irq()
1344 if (adapter->native->err_virq == 0 || in cxl_native_release_psl_err_irq()
1345 adapter->native->err_virq != in cxl_native_release_psl_err_irq()
1346 irq_find_mapping(NULL, adapter->native->err_hwirq)) in cxl_native_release_psl_err_irq()
1350 cxl_unmap_irq(adapter->native->err_virq, adapter); in cxl_native_release_psl_err_irq()
1351 cxl_ops->release_one_irq(adapter, adapter->native->err_hwirq); in cxl_native_release_psl_err_irq()
1352 kfree(adapter->irq_name); in cxl_native_release_psl_err_irq()
1353 adapter->native->err_virq = 0; in cxl_native_release_psl_err_irq()
1361 afu->err_irq_name = kasprintf(GFP_KERNEL, "cxl-%s-err", in cxl_native_register_serr_irq()
1362 dev_name(&afu->dev)); in cxl_native_register_serr_irq()
1363 if (!afu->err_irq_name) in cxl_native_register_serr_irq()
1364 return -ENOMEM; in cxl_native_register_serr_irq()
1366 if ((rc = cxl_register_one_irq(afu->adapter, native_slice_irq_err, afu, in cxl_native_register_serr_irq()
1367 &afu->serr_hwirq, in cxl_native_register_serr_irq()
1368 &afu->serr_virq, afu->err_irq_name))) { in cxl_native_register_serr_irq()
1369 kfree(afu->err_irq_name); in cxl_native_register_serr_irq()
1370 afu->err_irq_name = NULL; in cxl_native_register_serr_irq()
1376 serr = (serr & 0x00ffffffffff0000ULL) | (afu->serr_hwirq & 0xffff); in cxl_native_register_serr_irq()
1382 serr = (serr & ~0xff0000007fffffffULL) | (afu->serr_hwirq & 0xffff); in cxl_native_register_serr_irq()
1391 if (afu->serr_virq == 0 || in cxl_native_release_serr_irq()
1392 afu->serr_virq != irq_find_mapping(NULL, afu->serr_hwirq)) in cxl_native_release_serr_irq()
1396 cxl_unmap_irq(afu->serr_virq, afu); in cxl_native_release_serr_irq()
1397 cxl_ops->release_one_irq(afu->adapter, afu->serr_hwirq); in cxl_native_release_serr_irq()
1398 kfree(afu->err_irq_name); in cxl_native_release_serr_irq()
1399 afu->serr_virq = 0; in cxl_native_release_serr_irq()
1406 afu->psl_irq_name = kasprintf(GFP_KERNEL, "cxl-%s", in cxl_native_register_psl_irq()
1407 dev_name(&afu->dev)); in cxl_native_register_psl_irq()
1408 if (!afu->psl_irq_name) in cxl_native_register_psl_irq()
1409 return -ENOMEM; in cxl_native_register_psl_irq()
1411 if ((rc = cxl_register_one_irq(afu->adapter, native_irq_multiplexed, in cxl_native_register_psl_irq()
1412 afu, &afu->native->psl_hwirq, &afu->native->psl_virq, in cxl_native_register_psl_irq()
1413 afu->psl_irq_name))) { in cxl_native_register_psl_irq()
1414 kfree(afu->psl_irq_name); in cxl_native_register_psl_irq()
1415 afu->psl_irq_name = NULL; in cxl_native_register_psl_irq()
1422 if (afu->native->psl_virq == 0 || in cxl_native_release_psl_irq()
1423 afu->native->psl_virq != in cxl_native_release_psl_irq()
1424 irq_find_mapping(NULL, afu->native->psl_hwirq)) in cxl_native_release_psl_irq()
1427 cxl_unmap_irq(afu->native->psl_virq, afu); in cxl_native_release_psl_irq()
1428 cxl_ops->release_one_irq(afu->adapter, afu->native->psl_hwirq); in cxl_native_release_psl_irq()
1429 kfree(afu->psl_irq_name); in cxl_native_release_psl_irq()
1430 afu->native->psl_virq = 0; in cxl_native_release_psl_irq()
1451 cxl_p2n_write(ctx->afu, CXL_PSL_TFC_An, tfc); in native_ack_irq()
1453 recover_psl_err(ctx->afu, psl_reset_mask); in native_ack_irq()
1471 if (unlikely(!cxl_ops->link_ok(afu->adapter, afu))) in native_afu_cr_read64()
1472 return -EIO; in native_afu_cr_read64()
1473 if (unlikely(off >= afu->crs_len)) in native_afu_cr_read64()
1474 return -ERANGE; in native_afu_cr_read64()
1475 *out = in_le64(afu->native->afu_desc_mmio + afu->crs_offset + in native_afu_cr_read64()
1476 (cr * afu->crs_len) + off); in native_afu_cr_read64()
1482 if (unlikely(!cxl_ops->link_ok(afu->adapter, afu))) in native_afu_cr_read32()
1483 return -EIO; in native_afu_cr_read32()
1484 if (unlikely(off >= afu->crs_len)) in native_afu_cr_read32()
1485 return -ERANGE; in native_afu_cr_read32()
1486 *out = in_le32(afu->native->afu_desc_mmio + afu->crs_offset + in native_afu_cr_read32()
1487 (cr * afu->crs_len) + off); in native_afu_cr_read32()
1517 if (unlikely(!cxl_ops->link_ok(afu->adapter, afu))) in native_afu_cr_write32()
1518 return -EIO; in native_afu_cr_write32()
1519 if (unlikely(off >= afu->crs_len)) in native_afu_cr_write32()
1520 return -ERANGE; in native_afu_cr_write32()
1521 out_le32(afu->native->afu_desc_mmio + afu->crs_offset + in native_afu_cr_write32()
1522 (cr * afu->crs_len) + off, in); in native_afu_cr_write32()