Lines Matching refs:lval2
363 u32 lval1, lval2, i; in rts5261_init_from_hw() local
387 pci_read_config_dword(pdev, PCR_SETTING_REG2, &lval2); in rts5261_init_from_hw()
388 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, lval2); in rts5261_init_from_hw()
390 valid = (u8)((lval2 >> 16) & 0x03); in rts5261_init_from_hw()
414 pci_read_config_dword(pdev, setting_reg2, &lval2); in rts5261_init_from_hw()
415 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", setting_reg2, lval2); in rts5261_init_from_hw()
417 if (!rts5261_vendor_setting_valid(lval2)) { in rts5261_init_from_hw()
424 if (!rts5261_reg_check_mmc_support(lval2)) in rts5261_init_from_hw()
427 pcr->rtd3_en = rts5261_reg_to_rtd3(lval2); in rts5261_init_from_hw()
429 if (rts5261_reg_check_reverse_socket(lval2)) in rts5261_init_from_hw()
445 rtsx_pci_write_register(pcr, 0xFF10, 0xFF, (u8)(lval2 & 0xFF)); in rts5261_init_from_hw()
446 rtsx_pci_write_register(pcr, 0xFF11, 0xFF, (u8)((lval2 >> 8) & 0xFF)); in rts5261_init_from_hw()
447 rtsx_pci_write_register(pcr, 0xFF12, 0xFF, (u8)((lval2 >> 16) & 0xFF)); in rts5261_init_from_hw()
450 lval2 = lval2 & 0x00FFFFFF; in rts5261_init_from_hw()
451 pci_write_config_dword(pdev, PCR_SETTING_REG5, lval2); in rts5261_init_from_hw()