Lines Matching +full:can +full:- +full:primary
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm831x-irq.c -- Interrupt controller support for Wolfson WM831x PMICs
26 int primary;
33 .primary = WM831X_TEMP_INT,
38 .primary = WM831X_GP_INT,
43 .primary = WM831X_GP_INT,
48 .primary = WM831X_GP_INT,
53 .primary = WM831X_GP_INT,
58 .primary = WM831X_GP_INT,
63 .primary = WM831X_GP_INT,
68 .primary = WM831X_GP_INT,
73 .primary = WM831X_GP_INT,
78 .primary = WM831X_GP_INT,
83 .primary = WM831X_GP_INT,
88 .primary = WM831X_GP_INT,
93 .primary = WM831X_GP_INT,
98 .primary = WM831X_GP_INT,
103 .primary = WM831X_GP_INT,
108 .primary = WM831X_GP_INT,
113 .primary = WM831X_GP_INT,
118 .primary = WM831X_ON_PIN_INT,
123 .primary = WM831X_PPM_INT,
128 .primary = WM831X_PPM_INT,
133 .primary = WM831X_PPM_INT,
138 .primary = WM831X_WDOG_INT,
143 .primary = WM831X_RTC_INT,
148 .primary = WM831X_RTC_INT,
153 .primary = WM831X_CHG_INT,
158 .primary = WM831X_CHG_INT,
163 .primary = WM831X_CHG_INT,
168 .primary = WM831X_CHG_INT,
173 .primary = WM831X_CHG_INT,
178 .primary = WM831X_CHG_INT,
183 .primary = WM831X_CHG_INT,
188 .primary = WM831X_CHG_INT,
193 .primary = WM831X_TCHDATA_INT,
198 .primary = WM831X_TCHPD_INT,
203 .primary = WM831X_AUXADC_INT,
208 .primary = WM831X_AUXADC_INT,
213 .primary = WM831X_AUXADC_INT,
218 .primary = WM831X_AUXADC_INT,
223 .primary = WM831X_AUXADC_INT,
228 .primary = WM831X_CS_INT,
233 .primary = WM831X_CS_INT,
238 .primary = WM831X_HC_INT,
243 .primary = WM831X_HC_INT,
248 .primary = WM831X_UV_INT,
253 .primary = WM831X_UV_INT,
258 .primary = WM831X_UV_INT,
263 .primary = WM831X_UV_INT,
268 .primary = WM831X_UV_INT,
273 .primary = WM831X_UV_INT,
278 .primary = WM831X_UV_INT,
283 .primary = WM831X_UV_INT,
288 .primary = WM831X_UV_INT,
293 .primary = WM831X_UV_INT,
298 .primary = WM831X_UV_INT,
303 .primary = WM831X_UV_INT,
308 .primary = WM831X_UV_INT,
313 .primary = WM831X_UV_INT,
321 return WM831X_INTERRUPT_STATUS_1 - 1 + irq_data->reg;
334 mutex_lock(&wm831x->irq_lock);
342 for (i = 0; i < ARRAY_SIZE(wm831x->gpio_update); i++) {
343 if (wm831x->gpio_update[i]) {
346 wm831x->gpio_update[i]);
347 wm831x->gpio_update[i] = 0;
351 for (i = 0; i < ARRAY_SIZE(wm831x->irq_masks_cur); i++) {
354 if (wm831x->irq_masks_cur[i] != wm831x->irq_masks_cache[i]) {
355 dev_dbg(wm831x->dev, "IRQ mask sync: %x = %x\n",
357 wm831x->irq_masks_cur[i]);
359 wm831x->irq_masks_cache[i] = wm831x->irq_masks_cur[i];
362 wm831x->irq_masks_cur[i]);
366 mutex_unlock(&wm831x->irq_lock);
373 data->hwirq);
375 wm831x->irq_masks_cur[irq_data->reg - 1] &= ~irq_data->mask;
382 data->hwirq);
384 wm831x->irq_masks_cur[irq_data->reg - 1] |= irq_data->mask;
392 irq = data->hwirq;
395 /* Ignore internal-only IRQs */
399 return -EINVAL;
405 irq -= WM831X_IRQ_GPIO_1;
408 * do the update here as we can be called with the bus lock
411 wm831x->gpio_level_low[irq] = false;
412 wm831x->gpio_level_high[irq] = false;
415 wm831x->gpio_update[irq] = 0x10000 | WM831X_GPN_INT_MODE;
418 wm831x->gpio_update[irq] = 0x10000 | WM831X_GPN_POL;
421 wm831x->gpio_update[irq] = 0x10000;
424 wm831x->gpio_update[irq] = 0x10000 | WM831X_GPN_POL;
425 wm831x->gpio_level_high[irq] = true;
428 wm831x->gpio_update[irq] = 0x10000;
429 wm831x->gpio_level_low[irq] = true;
432 return -EINVAL;
447 /* The processing of the primary interrupt occurs in a thread so that
448 * we can interact with the device over I2C or SPI. */
453 int primary, status_addr, ret;
458 primary = wm831x_reg_read(wm831x, WM831X_SYSTEM_INTERRUPTS);
459 if (primary < 0) {
460 dev_err(wm831x->dev, "Failed to read system interrupt: %d\n",
461 primary);
465 /* The touch interrupts are visible in the primary register as
467 * main handling loop and so we can also skip iterating the
470 if (primary & WM831X_TCHPD_INT)
471 handle_nested_irq(irq_find_mapping(wm831x->irq_domain,
473 if (primary & WM831X_TCHDATA_INT)
474 handle_nested_irq(irq_find_mapping(wm831x->irq_domain,
476 primary &= ~(WM831X_TCHDATA_EINT | WM831X_TCHPD_EINT);
479 int offset = wm831x_irqs[i].reg - 1;
481 if (!(primary & wm831x_irqs[i].primary))
493 dev_err(wm831x->dev,
502 *status &= ~wm831x->irq_masks_cur[offset];
511 handle_nested_irq(irq_find_mapping(wm831x->irq_domain,
517 if (primary == WM831X_GP_INT &&
518 wm831x->gpio_level_high[i - WM831X_IRQ_GPIO_1]) {
520 while (ret & 1 << (i - WM831X_IRQ_GPIO_1)) {
521 handle_nested_irq(irq_find_mapping(wm831x->irq_domain,
528 if (primary == WM831X_GP_INT &&
529 wm831x->gpio_level_low[i - WM831X_IRQ_GPIO_1]) {
531 while (!(ret & 1 << (i - WM831X_IRQ_GPIO_1))) {
532 handle_nested_irq(irq_find_mapping(wm831x->irq_domain,
547 irq_set_chip_data(virq, h->host_data);
562 struct wm831x_pdata *pdata = &wm831x->pdata;
566 mutex_init(&wm831x->irq_lock);
569 for (i = 0; i < ARRAY_SIZE(wm831x->irq_masks_cur); i++) {
570 wm831x->irq_masks_cur[i] = 0xffff;
571 wm831x->irq_masks_cache[i] = 0xffff;
577 if (pdata->irq_base) {
578 irq_base = irq_alloc_descs(pdata->irq_base, 0,
581 dev_warn(wm831x->dev, "Failed to allocate IRQs: %d\n",
590 domain = irq_domain_create_legacy(dev_fwnode(wm831x->dev), ARRAY_SIZE(wm831x_irqs),
593 domain = irq_domain_create_linear(dev_fwnode(wm831x->dev), ARRAY_SIZE(wm831x_irqs),
597 dev_warn(wm831x->dev, "Failed to allocate IRQ domain\n");
598 return -EINVAL;
601 if (pdata->irq_cmos)
609 wm831x->irq = irq;
610 wm831x->irq_domain = domain;
620 dev_warn(wm831x->dev,
621 "Can't enable IRQ as wake source: %d\n",
629 dev_err(wm831x->dev, "Failed to request IRQ %d: %d\n",
634 dev_warn(wm831x->dev,
635 "No interrupt specified - functionality limited\n");
646 if (wm831x->irq)
647 free_irq(wm831x->irq, wm831x);