Lines Matching +full:stm32 +full:- +full:dma
1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/mfd/stm32-timers.h>
16 /* DIER register DMA enable bits */
29 struct stm32_timers_dma *dma = p; in stm32_timers_dma_done() local
33 status = dmaengine_tx_status(dma->chan, dma->chan->cookie, &state); in stm32_timers_dma_done()
35 complete(&dma->completion); in stm32_timers_dma_done()
39 * stm32_timers_dma_burst_read - Read from timers registers using DMA.
41 * Read from STM32 timers registers using DMA on a single event.
43 * @buf: DMA'able destination buffer
45 * @reg: registers start offset for DMA to read from (like CCRx for capture)
46 * @num_reg: number of registers to read upon each DMA request, starting @reg.
57 struct regmap *regmap = ddata->regmap; in stm32_timers_dma_burst_read()
58 struct stm32_timers_dma *dma = &ddata->dma; in stm32_timers_dma_burst_read() local
70 return -EINVAL; in stm32_timers_dma_burst_read()
74 return -EINVAL; in stm32_timers_dma_burst_read()
76 if (!dma->chans[id]) in stm32_timers_dma_burst_read()
77 return -ENODEV; in stm32_timers_dma_burst_read()
78 mutex_lock(&dma->lock); in stm32_timers_dma_burst_read()
80 /* Select DMA channel in use */ in stm32_timers_dma_burst_read()
81 dma->chan = dma->chans[id]; in stm32_timers_dma_burst_read()
84 ret = -ENOMEM; in stm32_timers_dma_burst_read()
88 /* Prepare DMA read from timer registers, using DMA burst mode */ in stm32_timers_dma_burst_read()
90 config.src_addr = (dma_addr_t)dma->phys_base + TIM_DMAR; in stm32_timers_dma_burst_read()
92 ret = dmaengine_slave_config(dma->chan, &config); in stm32_timers_dma_burst_read()
96 desc = dmaengine_prep_slave_single(dma->chan, dma_buf, len, in stm32_timers_dma_burst_read()
99 ret = -EBUSY; in stm32_timers_dma_burst_read()
103 desc->callback = stm32_timers_dma_done; in stm32_timers_dma_burst_read()
104 desc->callback_param = dma; in stm32_timers_dma_burst_read()
110 reinit_completion(&dma->completion); in stm32_timers_dma_burst_read()
111 dma_async_issue_pending(dma->chan); in stm32_timers_dma_burst_read()
113 /* Setup and enable timer DMA burst mode */ in stm32_timers_dma_burst_read()
114 dbl = FIELD_PREP(TIM_DCR_DBL, bursts - 1); in stm32_timers_dma_burst_read()
120 /* Clear pending flags before enabling DMA request */ in stm32_timers_dma_burst_read()
130 err = wait_for_completion_interruptible_timeout(&dma->completion, in stm32_timers_dma_burst_read()
133 ret = -ETIMEDOUT; in stm32_timers_dma_burst_read()
142 dmaengine_terminate_all(dma->chan); in stm32_timers_dma_burst_read()
146 dma->chan = NULL; in stm32_timers_dma_burst_read()
147 mutex_unlock(&dma->lock); in stm32_timers_dma_burst_read()
165 regmap_read(ddata->regmap, TIM_ARR, &arr); in stm32_timers_get_arr_size()
171 regmap_write(ddata->regmap, TIM_ARR, ~0L); in stm32_timers_get_arr_size()
172 regmap_read(ddata->regmap, TIM_ARR, &ddata->max_arr); in stm32_timers_get_arr_size()
173 regmap_write(ddata->regmap, TIM_ARR, arr); in stm32_timers_get_arr_size()
183 init_completion(&ddata->dma.completion); in stm32_timers_dma_probe()
184 mutex_init(&ddata->dma.lock); in stm32_timers_dma_probe()
186 /* Optional DMA support: get valid DMA channel(s) or NULL */ in stm32_timers_dma_probe()
189 ddata->dma.chans[i] = dma_request_chan(dev, name); in stm32_timers_dma_probe()
191 ddata->dma.chans[STM32_TIMERS_DMA_UP] = dma_request_chan(dev, "up"); in stm32_timers_dma_probe()
192 ddata->dma.chans[STM32_TIMERS_DMA_TRIG] = dma_request_chan(dev, "trig"); in stm32_timers_dma_probe()
193 ddata->dma.chans[STM32_TIMERS_DMA_COM] = dma_request_chan(dev, "com"); in stm32_timers_dma_probe()
196 if (IS_ERR(ddata->dma.chans[i])) { in stm32_timers_dma_probe()
198 if (PTR_ERR(ddata->dma.chans[i]) != -ENODEV && !ret) in stm32_timers_dma_probe()
199 ret = PTR_ERR(ddata->dma.chans[i]); in stm32_timers_dma_probe()
201 ddata->dma.chans[i] = NULL; in stm32_timers_dma_probe()
214 if (ddata->dma.chans[i]) in stm32_timers_dma_remove()
215 dma_release_channel(ddata->dma.chans[i]); in stm32_timers_dma_remove()
219 "brk", "up", "trg-com", "cc"
228 * STM32 Timer may have either: in stm32_timers_irq_probe()
229 * - a unique global interrupt line in stm32_timers_irq_probe()
230 * - four dedicated interrupt lines that may be handled separately. in stm32_timers_irq_probe()
234 if (ret < 0 && ret != -ENXIO) { in stm32_timers_irq_probe()
236 } else if (ret != -ENXIO) { in stm32_timers_irq_probe()
237 ddata->irq[STM32_TIMERS_IRQ_GLOBAL_BRK] = ret; in stm32_timers_irq_probe()
238 ddata->nr_irqs = 1; in stm32_timers_irq_probe()
244 if (ret < 0 && ret != -ENXIO) { in stm32_timers_irq_probe()
246 } else if (ret != -ENXIO) { in stm32_timers_irq_probe()
247 ddata->irq[i] = ret; in stm32_timers_irq_probe()
248 ddata->nr_irqs++; in stm32_timers_irq_probe()
252 if (ddata->nr_irqs && ddata->nr_irqs != STM32_TIMERS_MAX_IRQS) { in stm32_timers_irq_probe()
253 dev_err(&pdev->dev, "Invalid number of IRQs %d\n", ddata->nr_irqs); in stm32_timers_irq_probe()
254 return -EINVAL; in stm32_timers_irq_probe()
262 struct device *dev = &pdev->dev; in stm32_timers_probe()
270 return -ENOMEM; in stm32_timers_probe()
276 /* Timer physical addr for DMA */ in stm32_timers_probe()
277 ddata->dma.phys_base = res->start; in stm32_timers_probe()
279 ddata->regmap = devm_regmap_init_mmio_clk(dev, "int", mmio, in stm32_timers_probe()
281 if (IS_ERR(ddata->regmap)) in stm32_timers_probe()
282 return PTR_ERR(ddata->regmap); in stm32_timers_probe()
284 ddata->clk = devm_clk_get(dev, NULL); in stm32_timers_probe()
285 if (IS_ERR(ddata->clk)) in stm32_timers_probe()
286 return PTR_ERR(ddata->clk); in stm32_timers_probe()
302 ret = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev); in stm32_timers_probe()
315 * DMA are released, to avoid race on DMA. in stm32_timers_remove()
317 of_platform_depopulate(&pdev->dev); in stm32_timers_remove()
318 stm32_timers_dma_remove(&pdev->dev, ddata); in stm32_timers_remove()
322 { .compatible = "st,stm32-timers", },
331 .name = "stm32-timers",
337 MODULE_DESCRIPTION("STMicroelectronics STM32 Timers");