Lines Matching +full:0 +full:x71210000
31 #define REG_GCB_SOFT_RST 0x0008
33 #define BIT_SOFT_CHIP_RST BIT(0)
35 #define VSC7512_MIIM0_RES_START 0x7107009c
36 #define VSC7512_MIIM1_RES_START 0x710700c0
37 #define VSC7512_MIIM_RES_SIZE 0x00000024
39 #define VSC7512_PHY_RES_START 0x710700f0
40 #define VSC7512_PHY_RES_SIZE 0x00000004
42 #define VSC7512_GPIO_RES_START 0x71070034
43 #define VSC7512_GPIO_RES_SIZE 0x0000006c
45 #define VSC7512_SIO_CTRL_RES_START 0x710700f8
46 #define VSC7512_SIO_CTRL_RES_SIZE 0x00000100
48 #define VSC7512_HSIO_RES_START 0x710d0000
49 #define VSC7512_HSIO_RES_SIZE 0x00000128
51 #define VSC7512_ANA_RES_START 0x71880000
52 #define VSC7512_ANA_RES_SIZE 0x00010000
54 #define VSC7512_QS_RES_START 0x71080000
55 #define VSC7512_QS_RES_SIZE 0x00000100
57 #define VSC7512_QSYS_RES_START 0x71800000
58 #define VSC7512_QSYS_RES_SIZE 0x00200000
60 #define VSC7512_REW_RES_START 0x71030000
61 #define VSC7512_REW_RES_SIZE 0x00010000
63 #define VSC7512_SYS_RES_START 0x71010000
64 #define VSC7512_SYS_RES_SIZE 0x00010000
66 #define VSC7512_S0_RES_START 0x71040000
67 #define VSC7512_S1_RES_START 0x71050000
68 #define VSC7512_S2_RES_START 0x71060000
69 #define VCAP_RES_SIZE 0x00000400
71 #define VSC7512_PORT_0_RES_START 0x711e0000
72 #define VSC7512_PORT_1_RES_START 0x711f0000
73 #define VSC7512_PORT_2_RES_START 0x71200000
74 #define VSC7512_PORT_3_RES_START 0x71210000
75 #define VSC7512_PORT_4_RES_START 0x71220000
76 #define VSC7512_PORT_5_RES_START 0x71230000
77 #define VSC7512_PORT_6_RES_START 0x71240000
78 #define VSC7512_PORT_7_RES_START 0x71250000
79 #define VSC7512_PORT_8_RES_START 0x71260000
80 #define VSC7512_PORT_9_RES_START 0x71270000
81 #define VSC7512_PORT_10_RES_START 0x71280000
82 #define VSC7512_PORT_RES_SIZE 0x00010000
214 for (i = 0; i < cell->num_resources; i++) in ocelot_core_try_add_regmaps()
224 for (i = 0; i < ndevs; i++) in ocelot_core_init()
227 return devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, vsc7512_devs, ndevs, NULL, 0, NULL); in ocelot_core_init()