Lines Matching full:lpass

26 /* LPASS Top register definitions */
52 	/* pointer to the LPASS TOP regmap */
57 static void exynos_lpass_core_sw_reset(struct exynos_lpass *lpass, int mask)
61 	regmap_read(lpass->top, SFR_LPASS_CORE_SW_RESET, &val);
64 	regmap_write(lpass->top, SFR_LPASS_CORE_SW_RESET, val);
69 	regmap_write(lpass->top, SFR_LPASS_CORE_SW_RESET, val);
72 static void exynos_lpass_enable(struct exynos_lpass *lpass)
74 	clk_prepare_enable(lpass->sfr0_clk);
77 	regmap_write(lpass->top, SFR_LPASS_INTR_CA5_MASK,
80 	regmap_write(lpass->top, SFR_LPASS_INTR_CPU_MASK,
84 	exynos_lpass_core_sw_reset(lpass, LPASS_I2S_SW_RESET);
85 	exynos_lpass_core_sw_reset(lpass, LPASS_DMA_SW_RESET);
86 	exynos_lpass_core_sw_reset(lpass, LPASS_MEM_SW_RESET);
87 	exynos_lpass_core_sw_reset(lpass, LPASS_UART_SW_RESET);
90 static void exynos_lpass_disable(struct exynos_lpass *lpass)
93 	regmap_write(lpass->top, SFR_LPASS_INTR_CPU_MASK, 0);
94 	regmap_write(lpass->top, SFR_LPASS_INTR_CA5_MASK, 0);
96 	clk_disable_unprepare(lpass->sfr0_clk);
110 	struct exynos_lpass *lpass = platform_get_drvdata(pdev);
114 		exynos_lpass_disable(lpass);
120 	struct exynos_lpass *lpass;
124 	lpass = devm_kzalloc(dev, sizeof(*lpass), GFP_KERNEL);
125 	if (!lpass)
132 	lpass->sfr0_clk = devm_clk_get(dev, "sfr0_ctrl");
133 	if (IS_ERR(lpass->sfr0_clk))
134 		return PTR_ERR(lpass->sfr0_clk);
136 	lpass->top = devm_regmap_init_mmio(dev, base_top,
138 	if (IS_ERR(lpass->top)) {
139 		dev_err(dev, "LPASS top regmap initialization failed\n");
140 		return PTR_ERR(lpass->top);
143 	platform_set_drvdata(pdev, lpass);
146 	exynos_lpass_enable(lpass);
157 	struct exynos_lpass *lpass = dev_get_drvdata(dev);
159 	exynos_lpass_disable(lpass);
166 	struct exynos_lpass *lpass = dev_get_drvdata(dev);
168 	exynos_lpass_enable(lpass);
180 	{ .compatible = "samsung,exynos5433-lpass" },
187 		.name		= "exynos-lpass",