Lines Matching refs:burst_regs
385 if (last->burst_regs[EMC_ZCAL_WAIT_CNT_INDEX] & BIT(31)) in tegra210_emc_r21021_set_clock()
388 if ((next->burst_regs[EMC_ZCAL_INTERVAL_INDEX] != 0 && in tegra210_emc_r21021_set_clock()
389 last->burst_regs[EMC_ZCAL_INTERVAL_INDEX] == 0) || in tegra210_emc_r21021_set_clock()
396 if ((next->burst_regs[EMC_FBIO_CFG5_INDEX] & BIT(25)) && in tegra210_emc_r21021_set_clock()
417 emc_cfg = next->burst_regs[EMC_CFG_INDEX]; in tegra210_emc_r21021_set_clock()
504 ((next->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] & in tegra210_emc_r21021_set_clock()
506 (last->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] & in tegra210_emc_r21021_set_clock()
508 ((next->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] & in tegra210_emc_r21021_set_clock()
510 (last->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] & in tegra210_emc_r21021_set_clock()
513 (next->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] & in tegra210_emc_r21021_set_clock()
516 (next->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] & in tegra210_emc_r21021_set_clock()
521 emc_writel(emc, last->burst_regs in tegra210_emc_r21021_set_clock()
527 emc_writel(emc, last->burst_regs in tegra210_emc_r21021_set_clock()
534 if ((((last->burst_regs[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX] & in tegra210_emc_r21021_set_clock()
536 ((next->burst_regs[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX] & in tegra210_emc_r21021_set_clock()
538 (((last->burst_regs[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX] & in tegra210_emc_r21021_set_clock()
540 ((next->burst_regs[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX] & in tegra210_emc_r21021_set_clock()
543 next->burst_regs[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX]; in tegra210_emc_r21021_set_clock()
545 last->burst_regs[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX]; in tegra210_emc_r21021_set_clock()
570 if (next->burst_regs[EMC_CFG_DIG_DLL_INDEX] & in tegra210_emc_r21021_set_clock()
673 next->burst_regs[EMC_RP_INDEX]); in tegra210_emc_r21021_set_clock()
675 if (last->burst_regs[EMC_RP_INDEX] < tRTM) { in tegra210_emc_r21021_set_clock()
676 if (tRTM > (last->burst_regs[EMC_R2P_INDEX] + in tegra210_emc_r21021_set_clock()
677 last->burst_regs[EMC_RP_INDEX])) { in tegra210_emc_r21021_set_clock()
678 R2P_war = tRTM - last->burst_regs[EMC_RP_INDEX]; in tegra210_emc_r21021_set_clock()
679 RP_war = last->burst_regs[EMC_RP_INDEX]; in tegra210_emc_r21021_set_clock()
680 TRPab_war = last->burst_regs[EMC_TRPAB_INDEX]; in tegra210_emc_r21021_set_clock()
684 last->burst_regs[EMC_RP_INDEX] - 63; in tegra210_emc_r21021_set_clock()
692 R2P_war = last->burst_regs[EMC_R2P_INDEX]; in tegra210_emc_r21021_set_clock()
693 RP_war = last->burst_regs[EMC_RP_INDEX]; in tegra210_emc_r21021_set_clock()
694 TRPab_war = last->burst_regs[EMC_TRPAB_INDEX]; in tegra210_emc_r21021_set_clock()
698 W2P_war = last->burst_regs[EMC_W2P_INDEX] in tegra210_emc_r21021_set_clock()
707 W2P_war = last->burst_regs[ in tegra210_emc_r21021_set_clock()
711 if ((last->burst_regs[EMC_W2P_INDEX] ^ W2P_war) || in tegra210_emc_r21021_set_clock()
712 (last->burst_regs[EMC_R2P_INDEX] ^ R2P_war) || in tegra210_emc_r21021_set_clock()
713 (last->burst_regs[EMC_RP_INDEX] ^ RP_war) || in tegra210_emc_r21021_set_clock()
714 (last->burst_regs[EMC_TRPAB_INDEX] ^ TRPab_war)) { in tegra210_emc_r21021_set_clock()
755 value = next->burst_regs[i]; in tegra210_emc_r21021_set_clock()
984 value = next->burst_regs[EMC_ZCAL_WAIT_CNT_INDEX]; in tegra210_emc_r21021_set_clock()
1014 ccfifo_writel(emc, (next->burst_regs[EMC_MRW6_INDEX] & in tegra210_emc_r21021_set_clock()
1016 (last->burst_regs[EMC_MRW6_INDEX] & in tegra210_emc_r21021_set_clock()
1018 ccfifo_writel(emc, (next->burst_regs[EMC_MRW14_INDEX] & in tegra210_emc_r21021_set_clock()
1020 (last->burst_regs[EMC_MRW14_INDEX] & in tegra210_emc_r21021_set_clock()
1025 (next->burst_regs[EMC_MRW7_INDEX] & in tegra210_emc_r21021_set_clock()
1027 (last->burst_regs[EMC_MRW7_INDEX] & in tegra210_emc_r21021_set_clock()
1030 (next->burst_regs[EMC_MRW15_INDEX] & in tegra210_emc_r21021_set_clock()
1032 (last->burst_regs[EMC_MRW15_INDEX] & in tegra210_emc_r21021_set_clock()
1320 next->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX], in tegra210_emc_r21021_set_clock()
1349 ccfifo_writel(emc, next->burst_regs[EMC_ZCAL_INTERVAL_INDEX], in tegra210_emc_r21021_set_clock()
1353 ccfifo_writel(emc, next->burst_regs[EMC_CFG_INDEX] & in tegra210_emc_r21021_set_clock()
1370 next->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] & in tegra210_emc_r21021_set_clock()
1375 next->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] & in tegra210_emc_r21021_set_clock()
1423 emc_writel(emc, next->burst_regs[EMC_ZCAL_WAIT_CNT_INDEX], in tegra210_emc_r21021_set_clock()
1425 emc_writel(emc, next->burst_regs[EMC_ZCAL_INTERVAL_INDEX], in tegra210_emc_r21021_set_clock()
1436 emc_writel(emc, next->burst_regs[EMC_MRS_WAIT_CNT_INDEX], in tegra210_emc_r21021_set_clock()
1439 emc_writel(emc, next->burst_regs[EMC_ZCAL_WAIT_CNT_INDEX], in tegra210_emc_r21021_set_clock()
1451 emc_writel(emc, next->burst_regs[EMC_CFG_INDEX], EMC_CFG); in tegra210_emc_r21021_set_clock()
1465 next->burst_regs[EMC_PMACRO_AUTOCAL_CFG_COMMON_INDEX], in tegra210_emc_r21021_set_clock()
1496 if (next->burst_regs[EMC_CFG_DIG_DLL_INDEX] & EMC_CFG_DIG_DLL_CFG_DLL_EN) { in tegra210_emc_r21021_set_clock()