87 					    unsigned int sid)  in tegra186_mc_client_sid_override()  argument
91 	if (client->regs.sid.security == 0 && client->regs.sid.override == 0)  in tegra186_mc_client_sid_override()
94 	value = readl(mc->regs + client->regs.sid.security);  in tegra186_mc_client_sid_override()
113 		writel(value, mc->regs + client->regs.sid.security);  in tegra186_mc_client_sid_override()
116 	value = readl(mc->regs + client->regs.sid.override);  in tegra186_mc_client_sid_override()
119 	if (old != sid) {  in tegra186_mc_client_sid_override()
121 			client->name, sid);  in tegra186_mc_client_sid_override()
122 		writel(sid, mc->regs + client->regs.sid.override);  in tegra186_mc_client_sid_override()
132 	u32 sid;  in tegra186_mc_probe_device()  local
134 	if (!tegra_dev_iommu_get_stream_id(dev, &sid))  in tegra186_mc_probe_device()
146 						sid & MC_SID_STREAMID_OVERRIDE_MASK);  in tegra186_mc_probe_device()
165 		tegra186_mc_client_sid_override(mc, client, client->sid);  in tegra186_mc_resume()
185 		.sid = TEGRA186_SID_PASSTHROUGH,
187 			.sid = {
195 		.sid = TEGRA186_SID_AFI,
197 			.sid = {
205 		.sid = TEGRA186_SID_HDA,
207 			.sid = {
215 		.sid = TEGRA186_SID_HOST1X,
217 			.sid = {
225 		.sid = TEGRA186_SID_NVENC,
227 			.sid = {
235 		.sid = TEGRA186_SID_SATA,
237 			.sid = {
245 		.sid = TEGRA186_SID_PASSTHROUGH,
247 			.sid = {
255 		.sid = TEGRA186_SID_NVENC,
257 			.sid = {
265 		.sid = TEGRA186_SID_AFI,
267 			.sid = {
275 		.sid = TEGRA186_SID_HDA,
277 			.sid = {
285 		.sid = TEGRA186_SID_PASSTHROUGH,
287 			.sid = {
295 		.sid = TEGRA186_SID_SATA,
297 			.sid = {
305 		.sid = TEGRA186_SID_ISP,
307 			.sid = {
315 		.sid = TEGRA186_SID_ISP,
317 			.sid = {
325 		.sid = TEGRA186_SID_ISP,
327 			.sid = {
335 		.sid = TEGRA186_SID_XUSB_HOST,
337 			.sid = {
345 		.sid = TEGRA186_SID_XUSB_HOST,
347 			.sid = {
355 		.sid = TEGRA186_SID_XUSB_DEV,
357 			.sid = {
365 		.sid = TEGRA186_SID_XUSB_DEV,
367 			.sid = {
375 		.sid = TEGRA186_SID_TSEC,
377 			.sid = {
385 		.sid = TEGRA186_SID_TSEC,
387 			.sid = {
395 		.sid = TEGRA186_SID_GPU,
397 			.sid = {
405 		.sid = TEGRA186_SID_GPU,
407 			.sid = {
415 		.sid = TEGRA186_SID_SDMMC1,
417 			.sid = {
425 		.sid = TEGRA186_SID_SDMMC2,
427 			.sid = {
435 		.sid = TEGRA186_SID_SDMMC3,
437 			.sid = {
445 		.sid = TEGRA186_SID_SDMMC4,
447 			.sid = {
455 		.sid = TEGRA186_SID_SDMMC1,
457 			.sid = {
465 		.sid = TEGRA186_SID_SDMMC2,
467 			.sid = {
475 		.sid = TEGRA186_SID_SDMMC3,
477 			.sid = {
485 		.sid = TEGRA186_SID_SDMMC4,
487 			.sid = {
495 		.sid = TEGRA186_SID_VIC,
497 			.sid = {
505 		.sid = TEGRA186_SID_VIC,
507 			.sid = {
515 		.sid = TEGRA186_SID_VI,
517 			.sid = {
525 		.sid = TEGRA186_SID_NVDEC,
527 			.sid = {
535 		.sid = TEGRA186_SID_NVDEC,
537 			.sid = {
545 		.sid = TEGRA186_SID_APE,
547 			.sid = {
555 		.sid = TEGRA186_SID_APE,
557 			.sid = {
565 		.sid = TEGRA186_SID_NVJPG,
567 			.sid = {
575 		.sid = TEGRA186_SID_NVJPG,
577 			.sid = {
585 		.sid = TEGRA186_SID_SE,
587 			.sid = {
595 		.sid = TEGRA186_SID_SE,
597 			.sid = {
605 		.sid = TEGRA186_SID_ETR,
607 			.sid = {
615 		.sid = TEGRA186_SID_ETR,
617 			.sid = {
625 		.sid = TEGRA186_SID_TSECB,
627 			.sid = {
635 		.sid = TEGRA186_SID_TSECB,
637 			.sid = {
645 		.sid = TEGRA186_SID_GPU,
647 			.sid = {
655 		.sid = TEGRA186_SID_GPU,
657 			.sid = {
665 		.sid = TEGRA186_SID_GPCDMA_0,
667 			.sid = {
675 		.sid = TEGRA186_SID_GPCDMA_0,
677 			.sid = {
685 		.sid = TEGRA186_SID_EQOS,
687 			.sid = {
695 		.sid = TEGRA186_SID_EQOS,
697 			.sid = {
705 		.sid = TEGRA186_SID_UFSHC,
707 			.sid = {
715 		.sid = TEGRA186_SID_UFSHC,
717 			.sid = {
725 		.sid = TEGRA186_SID_NVDISPLAY,
727 			.sid = {
735 		.sid = TEGRA186_SID_BPMP,
737 			.sid = {
745 		.sid = TEGRA186_SID_BPMP,
747 			.sid = {
755 		.sid = TEGRA186_SID_BPMP,
757 			.sid = {
765 		.sid = TEGRA186_SID_BPMP,
767 			.sid = {
775 		.sid = TEGRA186_SID_AON,
777 			.sid = {
785 		.sid = TEGRA186_SID_AON,
787 			.sid = {
795 		.sid = TEGRA186_SID_AON,
797 			.sid = {
805 		.sid = TEGRA186_SID_AON,
807 			.sid = {
815 		.sid = TEGRA186_SID_SCE,
817 			.sid = {
825 		.sid = TEGRA186_SID_SCE,
827 			.sid = {
835 		.sid = TEGRA186_SID_SCE,
837 			.sid = {
845 		.sid = TEGRA186_SID_SCE,
847 			.sid = {
855 		.sid = TEGRA186_SID_APE,
857 			.sid = {
865 		.sid = TEGRA186_SID_APE,
867 			.sid = {
875 		.sid = TEGRA186_SID_NVDISPLAY,
877 			.sid = {
885 		.sid = TEGRA186_SID_VIC,
887 			.sid = {
895 		.sid = TEGRA186_SID_NVDEC,
897 			.sid = {