74 					    unsigned int sid)  in tegra186_mc_client_sid_override()  argument
78 	if (client->regs.sid.security == 0 && client->regs.sid.override == 0)  in tegra186_mc_client_sid_override()
81 	value = readl(mc->regs + client->regs.sid.security);  in tegra186_mc_client_sid_override()
100 		writel(value, mc->regs + client->regs.sid.security);  in tegra186_mc_client_sid_override()
103 	value = readl(mc->regs + client->regs.sid.override);  in tegra186_mc_client_sid_override()
106 	if (old != sid) {  in tegra186_mc_client_sid_override()
107 		dev_dbg(mc->dev, "overriding SID %x for %s with %x\n", old,  in tegra186_mc_client_sid_override()
108 			client->name, sid);  in tegra186_mc_client_sid_override()
109 		writel(sid, mc->regs + client->regs.sid.override);  in tegra186_mc_client_sid_override()
119 	u32 sid;  in tegra186_mc_probe_device()  local
121 	if (!tegra_dev_iommu_get_stream_id(dev, &sid))  in tegra186_mc_probe_device()
133 						sid & MC_SID_STREAMID_OVERRIDE_MASK);  in tegra186_mc_probe_device()
152 		tegra186_mc_client_sid_override(mc, client, client->sid);  in tegra186_mc_resume()
172 		.sid = TEGRA186_SID_PASSTHROUGH,
174 			.sid = {
182 		.sid = TEGRA186_SID_AFI,
184 			.sid = {
192 		.sid = TEGRA186_SID_HDA,
194 			.sid = {
202 		.sid = TEGRA186_SID_HOST1X,
204 			.sid = {
212 		.sid = TEGRA186_SID_NVENC,
214 			.sid = {
222 		.sid = TEGRA186_SID_SATA,
224 			.sid = {
232 		.sid = TEGRA186_SID_PASSTHROUGH,
234 			.sid = {
242 		.sid = TEGRA186_SID_NVENC,
244 			.sid = {
252 		.sid = TEGRA186_SID_AFI,
254 			.sid = {
262 		.sid = TEGRA186_SID_HDA,
264 			.sid = {
272 		.sid = TEGRA186_SID_PASSTHROUGH,
274 			.sid = {
282 		.sid = TEGRA186_SID_SATA,
284 			.sid = {
292 		.sid = TEGRA186_SID_ISP,
294 			.sid = {
302 		.sid = TEGRA186_SID_ISP,
304 			.sid = {
312 		.sid = TEGRA186_SID_ISP,
314 			.sid = {
322 		.sid = TEGRA186_SID_XUSB_HOST,
324 			.sid = {
332 		.sid = TEGRA186_SID_XUSB_HOST,
334 			.sid = {
342 		.sid = TEGRA186_SID_XUSB_DEV,
344 			.sid = {
352 		.sid = TEGRA186_SID_XUSB_DEV,
354 			.sid = {
362 		.sid = TEGRA186_SID_TSEC,
364 			.sid = {
372 		.sid = TEGRA186_SID_TSEC,
374 			.sid = {
382 		.sid = TEGRA186_SID_GPU,
384 			.sid = {
392 		.sid = TEGRA186_SID_GPU,
394 			.sid = {
402 		.sid = TEGRA186_SID_SDMMC1,
404 			.sid = {
412 		.sid = TEGRA186_SID_SDMMC2,
414 			.sid = {
422 		.sid = TEGRA186_SID_SDMMC3,
424 			.sid = {
432 		.sid = TEGRA186_SID_SDMMC4,
434 			.sid = {
442 		.sid = TEGRA186_SID_SDMMC1,
444 			.sid = {
452 		.sid = TEGRA186_SID_SDMMC2,
454 			.sid = {
462 		.sid = TEGRA186_SID_SDMMC3,
464 			.sid = {
472 		.sid = TEGRA186_SID_SDMMC4,
474 			.sid = {
482 		.sid = TEGRA186_SID_VIC,
484 			.sid = {
492 		.sid = TEGRA186_SID_VIC,
494 			.sid = {
502 		.sid = TEGRA186_SID_VI,
504 			.sid = {
512 		.sid = TEGRA186_SID_NVDEC,
514 			.sid = {
522 		.sid = TEGRA186_SID_NVDEC,
524 			.sid = {
532 		.sid = TEGRA186_SID_APE,
534 			.sid = {
542 		.sid = TEGRA186_SID_APE,
544 			.sid = {
552 		.sid = TEGRA186_SID_NVJPG,
554 			.sid = {
562 		.sid = TEGRA186_SID_NVJPG,
564 			.sid = {
572 		.sid = TEGRA186_SID_SE,
574 			.sid = {
582 		.sid = TEGRA186_SID_SE,
584 			.sid = {
592 		.sid = TEGRA186_SID_ETR,
594 			.sid = {
602 		.sid = TEGRA186_SID_ETR,
604 			.sid = {
612 		.sid = TEGRA186_SID_TSECB,
614 			.sid = {
622 		.sid = TEGRA186_SID_TSECB,
624 			.sid = {
632 		.sid = TEGRA186_SID_GPU,
634 			.sid = {
642 		.sid = TEGRA186_SID_GPU,
644 			.sid = {
652 		.sid = TEGRA186_SID_GPCDMA_0,
654 			.sid = {
662 		.sid = TEGRA186_SID_GPCDMA_0,
664 			.sid = {
672 		.sid = TEGRA186_SID_EQOS,
674 			.sid = {
682 		.sid = TEGRA186_SID_EQOS,
684 			.sid = {
692 		.sid = TEGRA186_SID_UFSHC,
694 			.sid = {
702 		.sid = TEGRA186_SID_UFSHC,
704 			.sid = {
712 		.sid = TEGRA186_SID_NVDISPLAY,
714 			.sid = {
722 		.sid = TEGRA186_SID_BPMP,
724 			.sid = {
732 		.sid = TEGRA186_SID_BPMP,
734 			.sid = {
742 		.sid = TEGRA186_SID_BPMP,
744 			.sid = {
752 		.sid = TEGRA186_SID_BPMP,
754 			.sid = {
762 		.sid = TEGRA186_SID_AON,
764 			.sid = {
772 		.sid = TEGRA186_SID_AON,
774 			.sid = {
782 		.sid = TEGRA186_SID_AON,
784 			.sid = {
792 		.sid = TEGRA186_SID_AON,
794 			.sid = {
802 		.sid = TEGRA186_SID_SCE,
804 			.sid = {
812 		.sid = TEGRA186_SID_SCE,
814 			.sid = {
822 		.sid = TEGRA186_SID_SCE,
824 			.sid = {
832 		.sid = TEGRA186_SID_SCE,
834 			.sid = {
842 		.sid = TEGRA186_SID_APE,
844 			.sid = {
852 		.sid = TEGRA186_SID_APE,
854 			.sid = {
862 		.sid = TEGRA186_SID_NVDISPLAY,
864 			.sid = {
872 		.sid = TEGRA186_SID_VIC,
874 			.sid = {
882 		.sid = TEGRA186_SID_NVDEC,
884 			.sid = {