41 #define FMC2_BCR_MTYP			GENMASK(3, 2)  macro
252 	if (bcr & FMC2_BCR_MTYP)  in stm32_fmc2_ebi_check_mux()
262 	u32 bcr, val = FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR);  in stm32_fmc2_ebi_check_waitcfg()
269 	if ((bcr & FMC2_BCR_MTYP) == val && bcr & FMC2_BCR_BURSTEN)  in stm32_fmc2_ebi_check_waitcfg()
340 	u32 bcr, val = FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_PSRAM);  in stm32_fmc2_ebi_check_cpsize()
347 	if ((bcr & FMC2_BCR_MTYP) == val && bcr & FMC2_BCR_BURSTEN)  in stm32_fmc2_ebi_check_cpsize()
521 	bcr_mask = FMC2_BCR_MUXEN | FMC2_BCR_MTYP | FMC2_BCR_FACCEN |  in stm32_fmc2_ebi_set_trans_type()
527 		bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_SRAM);  in stm32_fmc2_ebi_set_trans_type()
538 		bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_PSRAM);  in stm32_fmc2_ebi_set_trans_type()
545 		bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_SRAM);  in stm32_fmc2_ebi_set_trans_type()
555 		bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_PSRAM);  in stm32_fmc2_ebi_set_trans_type()
565 		bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR);  in stm32_fmc2_ebi_set_trans_type()
573 		bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR);  in stm32_fmc2_ebi_set_trans_type()
583 		bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR);  in stm32_fmc2_ebi_set_trans_type()
593 		bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR);  in stm32_fmc2_ebi_set_trans_type()
603 		bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_PSRAM);  in stm32_fmc2_ebi_set_trans_type()
611 		bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_PSRAM);  in stm32_fmc2_ebi_set_trans_type()
619 		bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR);  in stm32_fmc2_ebi_set_trans_type()
627 		bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR);  in stm32_fmc2_ebi_set_trans_type()