Lines Matching +full:0 +full:x8200
24 * 0.000400, 0x0002
25 * 0.001000, 0x0005
26 * 0.005000, 0x0019
27 * 0.020000, 0x0064
28 * 0.080000, 0x0190
29 * 0.400000, 0x07D0
30 * 1.000000, 0x1388
31 * 2.000000, 0x2710
34 * 0x1000: master channel enable bit
35 * 0x007F: low gain bits
36 * 0x0080: medium gain bit
37 * 0x0100: high gain bit
49 * 1.00, 0x105C, 0x1068, 0x10C8, 0x105C
50 * 1.20, 0x106E, 0x107E, 0x10D6, 0x106E
51 * 1.40, 0x10C0, 0x10CA, 0x10E5, 0x10C0
52 * 1.60, 0x10C9, 0x10D4, 0x10F3, 0x10C9
53 * 1.80, 0x10D2, 0x10DE, 0x11C1, 0x10D2
54 * 2.00, 0x10DC, 0x10E9, 0x11C8, 0x10DC
55 * 2.20, 0x10E5, 0x10F3, 0x11CF, 0x10E5
56 * 2.40, 0x10EE, 0x10FE, 0x11D7, 0x10EE
57 * 2.60, 0x10F7, 0x11C4, 0x11DE, 0x10F7
58 * 2.80, 0x11C0, 0x11CA, 0x11E5, 0x11C0
59 * 3.00, 0x11C5, 0x11CF, 0x11ED, 0x11C5
69 * Essentially gains are in range 0-0x001FF
89 * Maximum gain is 0x7FF * 2 * 2 => 0x1FFC (8188)
99 #define BULK_SIZE 0x4000
102 #define REG_COARSE_INTEGRATION_TIME_ 0x3012
103 #define REG_GROUPED_PARAMETER_HOLD_ 0x3022
104 #define REG_MODE_SELECT 0x0100
105 #define REG_OP_SYS_CLK_DIV 0x030A
106 #define REG_VT_SYS_CLK_DIV 0x0302
107 #define REG_PRE_PLL_CLK_DIV 0x0304
108 #define REG_VT_PIX_CLK_DIV 0x0300
109 #define REG_OP_PIX_CLK_DIV 0x0308
110 #define REG_PLL_MULTIPLIER 0x0306
111 #define REG_COARSE_INTEGRATION_TIME_ 0x3012
112 #define REG_FRAME_LENGTH_LINES 0x0340
113 #define REG_FRAME_LENGTH_LINES_ 0x300A
114 #define REG_GREEN1_GAIN 0x3056
115 #define REG_GREEN2_GAIN 0x305C
116 #define REG_GROUPED_PARAMETER_HOLD 0x0104
117 #define REG_LINE_LENGTH_PCK_ 0x300C
118 #define REG_MODE_SELECT 0x0100
119 #define REG_PLL_MULTIPLIER 0x0306
120 #define REG_READ_MODE 0x3040
121 #define REG_BLUE_GAIN 0x3058
122 #define REG_RED_GAIN 0x305A
123 #define REG_RESET_REGISTER 0x301A
124 #define REG_SCALE_M 0x0404
125 #define REG_SCALING_MODE 0x0400
126 #define REG_SOFTWARE_RESET 0x0103
127 #define REG_X_ADDR_END 0x0348
128 #define REG_X_ADDR_START 0x0344
129 #define REG_X_ADDR_START 0x0344
130 #define REG_X_OUTPUT_SIZE 0x034C
131 #define REG_Y_ADDR_END 0x034A
132 #define REG_Y_ADDR_START 0x0346
133 #define REG_Y_OUTPUT_SIZE 0x034E
188 if (rc < 0) { in val_reply()
196 if (reply[0] != 0x08) { in val_reply()
197 gspca_err(gspca_dev, "Bad reply 0x%02x\n", (int)reply[0]); in val_reply()
200 return 0; in val_reply()
209 "reg_w bReq=0x0B, bReqT=0xC0, wVal=0x%04X, wInd=0x%04X\n\n", in reg_w()
211 rc = usb_control_msg(gspca_dev->dev, usb_rcvctrlpipe(gspca_dev->dev, 0), in reg_w()
212 0x0B, 0xC0, value, index, buff, 1, 500); in reg_w()
213 gspca_dbg(gspca_dev, D_USBO, "rc=%d, ret={0x%02x}\n", rc, (int)buff[0]); in reg_w()
214 if (rc < 0) { in reg_w()
215 gspca_err(gspca_dev, "Failed reg_w(0x0B, 0xC0, 0x%04X, 0x%04X) w/ rc %d\n", in reg_w()
221 gspca_err(gspca_dev, "Bad reply to reg_w(0x0B, 0xC0, 0x%04X, 0x%04X\n", in reg_w()
233 } while (--l > 0); in reg_w_buf()
252 gspca_dbg(gspca_dev, D_STREAM, "exposure: 0x%04X ms\n\n", value); in setexposure()
263 * 0x000 (0):0x07F (127): regL in gainify()
264 * 0x080 (128) - 0x0FF (255): regM, regL in gainify()
265 * 0x100 (256) - max: regH, regM, regL in gainify()
267 if (in <= 0x7F) in gainify()
268 return 0x1000 | in; in gainify()
269 else if (in <= 0xFF) in gainify()
270 return 0x1080 | in / 2; in gainify()
272 return 0x1180 | in / 4; in gainify()
280 gspca_dbg(gspca_dev, D_STREAM, "gain G1/G2 (0x%04X): 0x%04X (src 0x%04X)\n\n", in setggain()
296 gspca_dbg(gspca_dev, D_STREAM, "Truncating blue 0x%04X w/ value 0x%04X\n\n", in setbgain()
301 gspca_dbg(gspca_dev, D_STREAM, "gain B (0x%04X): 0x%04X w/ source 0x%04X\n\n", in setbgain()
315 gspca_dbg(gspca_dev, D_STREAM, "Truncating gain 0x%04X w/ value 0x%04X\n\n", in setrgain()
320 gspca_dbg(gspca_dev, D_STREAM, "gain R (0x%04X): 0x%04X w / source 0x%04X\n\n", in setrgain()
334 {0x0060, REG_X_ADDR_START}, in configure_wh()
335 {0x0CD9, REG_X_ADDR_END}, in configure_wh()
336 {0x0036, REG_Y_ADDR_START}, in configure_wh()
337 {0x098F, REG_Y_ADDR_END}, in configure_wh()
338 {0x07C7, REG_READ_MODE}, in configure_wh()
345 {0x009C, REG_X_ADDR_START}, in configure_wh()
346 {0x0D19, REG_X_ADDR_END}, in configure_wh()
347 {0x0068, REG_Y_ADDR_START}, in configure_wh()
348 {0x09C5, REG_Y_ADDR_END}, in configure_wh()
349 {0x06C3, REG_READ_MODE}, in configure_wh()
356 {0x00E8, REG_X_ADDR_START}, in configure_wh()
357 {0x0DA7, REG_X_ADDR_END}, in configure_wh()
358 {0x009E, REG_Y_ADDR_START}, in configure_wh()
359 {0x0A2D, REG_Y_ADDR_END}, in configure_wh()
360 {0x0241, REG_READ_MODE}, in configure_wh()
371 reg_w(gspca_dev, 0x0000, REG_SCALING_MODE); in configure_wh()
372 reg_w(gspca_dev, 0x0010, REG_SCALE_M); in configure_wh()
377 reg_w(gspca_dev, 0x0384, REG_FRAME_LENGTH_LINES_); in configure_wh()
378 reg_w(gspca_dev, 0x0960, REG_LINE_LENGTH_PCK_); in configure_wh()
380 reg_w(gspca_dev, 0x0640, REG_FRAME_LENGTH_LINES_); in configure_wh()
381 reg_w(gspca_dev, 0x0FA0, REG_LINE_LENGTH_PCK_); in configure_wh()
383 reg_w(gspca_dev, 0x0B4B, REG_FRAME_LENGTH_LINES_); in configure_wh()
384 reg_w(gspca_dev, 0x1F40, REG_LINE_LENGTH_PCK_); in configure_wh()
396 {0x0100, REG_SOFTWARE_RESET}, in configure_encrypted()
397 {0x0000, REG_MODE_SELECT}, in configure_encrypted()
398 {0x0100, REG_GROUPED_PARAMETER_HOLD}, in configure_encrypted()
399 {0x0004, REG_VT_PIX_CLK_DIV}, in configure_encrypted()
400 {0x0001, REG_VT_SYS_CLK_DIV}, in configure_encrypted()
401 {0x0008, REG_OP_PIX_CLK_DIV}, in configure_encrypted()
402 {0x0001, REG_OP_SYS_CLK_DIV}, in configure_encrypted()
403 {0x0004, REG_PRE_PLL_CLK_DIV}, in configure_encrypted()
404 {0x0040, REG_PLL_MULTIPLIER}, in configure_encrypted()
405 {0x0000, REG_GROUPED_PARAMETER_HOLD}, in configure_encrypted()
406 {0x0100, REG_GROUPED_PARAMETER_HOLD}, in configure_encrypted()
409 {0x0000, REG_GROUPED_PARAMETER_HOLD}, in configure_encrypted()
410 {0x0301, 0x31AE}, in configure_encrypted()
411 {0x0805, 0x3064}, in configure_encrypted()
412 {0x0071, 0x3170}, in configure_encrypted()
413 {0x10DE, REG_RESET_REGISTER}, in configure_encrypted()
414 {0x0000, REG_MODE_SELECT}, in configure_encrypted()
415 {0x0010, REG_PLL_MULTIPLIER}, in configure_encrypted()
416 {0x0100, REG_MODE_SELECT}, in configure_encrypted()
424 reg_w(gspca_dev, 0x0100, REG_GROUPED_PARAMETER_HOLD); in configure_encrypted()
425 reg_w(gspca_dev, 0x0000, REG_GROUPED_PARAMETER_HOLD); in configure_encrypted()
446 * bRequest is not and bRequestType is always 0xC0 in configure()
448 * By setting 0 we XOR with 0 and the shifting and XOR drops out in configure()
450 rc = usb_control_msg(gspca_dev->dev, usb_rcvctrlpipe(gspca_dev->dev, 0), in configure()
451 0x16, 0xC0, 0x0000, 0x0000, buff, 2, 500); in configure()
463 * 16 bytes out challenge, requestType: 0x40 in configure()
464 * 16 bytes in response, requestType: 0xC0 in configure()
467 rc = usb_control_msg(gspca_dev->dev, usb_sndctrlpipe(gspca_dev->dev, 0), in configure()
468 0x01, 0x40, 0x0001, 0x000F, NULL, 0, 500); in configure()
469 if (rc < 0) { in configure()
475 rc = usb_control_msg(gspca_dev->dev, usb_sndctrlpipe(gspca_dev->dev, 0), in configure()
476 0x01, 0x40, 0x0000, 0x000F, NULL, 0, 500); in configure()
477 if (rc < 0) { in configure()
483 rc = usb_control_msg(gspca_dev->dev, usb_sndctrlpipe(gspca_dev->dev, 0), in configure()
484 0x01, 0x40, 0x0001, 0x000F, NULL, 0, 500); in configure()
485 if (rc < 0) { in configure()
495 * usb_rcvctrlpipe(gspca_dev->dev, 0), in configure()
496 * 0x20, 0xC0, 0x0000, 0x0000, buff, 4, 500); in configure()
500 gspca_dev->usb_err = 0; in configure()
506 rc = usb_control_msg(gspca_dev->dev, usb_sndctrlpipe(gspca_dev->dev, 0), in configure()
507 0x01, 0x40, 0x0003, 0x000F, NULL, 0, 500); in configure()
508 if (rc < 0) { in configure()
515 return 0; in configure()
525 gspca_dev->cam.no_urb_create = 0; in sd_config()
532 return 0; in sd_config()
540 sd->this_f = 0; in sd_start()
543 if (rc < 0) { in sd_start()
549 return 0; in sd_start()
566 gspca_frame_add(gspca_dev, DISCARD_PACKET, NULL, 0); in sd_pkt_scan()
570 sd->this_f = 0; in sd_pkt_scan()
572 if (sd->this_f == 0) in sd_pkt_scan()
582 return 0; in sd_init()
591 gspca_dev->usb_err = 0; in sd_s_ctrl()
594 return 0; in sd_s_ctrl()
631 V4L2_CID_EXPOSURE, 0, 800, 1, 350); in sd_init_controls()
633 V4L2_CID_GAIN, 0, 511, 1, 128); in sd_init_controls()
635 V4L2_CID_BLUE_BALANCE, 0, 1023, 1, 80); in sd_init_controls()
637 V4L2_CID_RED_BALANCE, 0, 1023, 1, 295); in sd_init_controls()
643 return 0; in sd_init_controls()
660 /* { USB_DEVICE(0x0547, 0x6035) }, TT UCMOS00350KPA */
661 /* { USB_DEVICE(0x0547, 0x6130) }, TT UCMOS01300KPA */
662 /* { USB_DEVICE(0x0547, 0x6200) }, TT UCMOS02000KPA */
663 /* { USB_DEVICE(0x0547, 0x6310) }, TT UCMOS03100KPA */
664 /* { USB_DEVICE(0x0547, 0x6510) }, TT UCMOS05100KPA */
665 /* { USB_DEVICE(0x0547, 0x6800) }, TT UCMOS08000KPA */
666 /* { USB_DEVICE(0x0547, 0x6801) }, TT UCMOS08000KPB */
667 { USB_DEVICE(0x0547, 0x6801) }, /* TT UCMOS08000KPB, AS MU800 */
668 /* { USB_DEVICE(0x0547, 0x6900) }, TT UCMOS09000KPA */
669 /* { USB_DEVICE(0x0547, 0x6901) }, TT UCMOS09000KPB */
670 /* { USB_DEVICE(0x0547, 0x6010) }, TT UCMOS10000KPA */
671 /* { USB_DEVICE(0x0547, 0x6014) }, TT UCMOS14000KPA */
672 /* { USB_DEVICE(0x0547, 0x6131) }, TT UCMOS01300KMA */
673 /* { USB_DEVICE(0x0547, 0x6511) }, TT UCMOS05100KMA */
674 /* { USB_DEVICE(0x0547, 0x8080) }, TT UHCCD00800KPA */
675 /* { USB_DEVICE(0x0547, 0x8140) }, TT UHCCD01400KPA */
676 /* { USB_DEVICE(0x0547, 0x8141) }, TT EXCCD01400KPA */
677 /* { USB_DEVICE(0x0547, 0x8200) }, TT UHCCD02000KPA */
678 /* { USB_DEVICE(0x0547, 0x8201) }, TT UHCCD02000KPB */
679 /* { USB_DEVICE(0x0547, 0x8310) }, TT UHCCD03100KPA */
680 /* { USB_DEVICE(0x0547, 0x8500) }, TT UHCCD05000KPA */
681 /* { USB_DEVICE(0x0547, 0x8510) }, TT UHCCD05100KPA */
682 /* { USB_DEVICE(0x0547, 0x8600) }, TT UHCCD06000KPA */
683 /* { USB_DEVICE(0x0547, 0x8800) }, TT UHCCD08000KPA */
684 /* { USB_DEVICE(0x0547, 0x8315) }, TT UHCCD03150KPA */
685 /* { USB_DEVICE(0x0547, 0x7800) }, TT UHCCD00800KMA */
686 /* { USB_DEVICE(0x0547, 0x7140) }, TT UHCCD01400KMA */
687 /* { USB_DEVICE(0x0547, 0x7141) }, TT UHCCD01400KMB */
688 /* { USB_DEVICE(0x0547, 0x7200) }, TT UHCCD02000KMA */
689 /* { USB_DEVICE(0x0547, 0x7315) }, TT UHCCD03150KMA */
717 if (ret < 0) in sd_mod_init()
719 return 0; in sd_mod_init()