426 static inline int r820t_write_reg_mask(struct r820t_priv *priv, u8 reg, u8 val,  in r820t_write_reg_mask()  function
487 	rc = r820t_write_reg_mask(priv, 0x17, range->open_d, 0x08);  in r820t_set_mux()
492 	rc = r820t_write_reg_mask(priv, 0x1a, range->rf_mux_ploy, 0xc3);  in r820t_set_mux()
518 	rc = r820t_write_reg_mask(priv, 0x10, val, 0x0b);  in r820t_set_mux()
529 	rc = r820t_write_reg_mask(priv, 0x08, reg08, 0x3f);  in r820t_set_mux()
533 	rc = r820t_write_reg_mask(priv, 0x09, reg09, 0x3f);  in r820t_set_mux()
580 	rc = r820t_write_reg_mask(priv, 0x10, refdiv2, 0x10);  in r820t_set_pll()
585 	rc = r820t_write_reg_mask(priv, 0x1a, 0x00, 0x0c);  in r820t_set_pll()
590 	rc = r820t_write_reg_mask(priv, 0x12, 0x80, 0xe0);  in r820t_set_pll()
628 	rc = r820t_write_reg_mask(priv, 0x10, div_num << 5, 0xe0);  in r820t_set_pll()
661 	rc = r820t_write_reg_mask(priv, 0x12, val, 0x08);  in r820t_set_pll()
698 			rc = r820t_write_reg_mask(priv, 0x12, 0x60, 0xe0);  in r820t_set_pll()
713 	rc = r820t_write_reg_mask(priv, 0x1a, 0x08, 0x08);  in r820t_set_pll()
818 		rc = r820t_write_reg_mask(priv, 0x06, pre_dect, 0x40);  in r820t_sysfreq_sel()
823 	rc = r820t_write_reg_mask(priv, 0x1d, lna_top, 0xc7);  in r820t_sysfreq_sel()
826 	rc = r820t_write_reg_mask(priv, 0x1c, mixer_top, 0xf8);  in r820t_sysfreq_sel()
837 	rc = r820t_write_reg_mask(priv, 0x05, air_cable1_in, 0x60);  in r820t_sysfreq_sel()
840 	rc = r820t_write_reg_mask(priv, 0x06, cable2_in, 0x08);  in r820t_sysfreq_sel()
844 	rc = r820t_write_reg_mask(priv, 0x11, cp_cur, 0x38);  in r820t_sysfreq_sel()
847 	rc = r820t_write_reg_mask(priv, 0x17, div_buf_cur, 0x30);  in r820t_sysfreq_sel()
850 	rc = r820t_write_reg_mask(priv, 0x0a, filter_cur, 0x60);  in r820t_sysfreq_sel()
866 		rc = r820t_write_reg_mask(priv, 0x1d, 0, 0x38);  in r820t_sysfreq_sel()
871 		rc = r820t_write_reg_mask(priv, 0x1c, 0, 0x04);  in r820t_sysfreq_sel()
876 		rc = r820t_write_reg_mask(priv, 0x06, 0, 0x40);  in r820t_sysfreq_sel()
881 		rc = r820t_write_reg_mask(priv, 0x1a, 0x30, 0x30);  in r820t_sysfreq_sel()
888 		rc = r820t_write_reg_mask(priv, 0x1d, 0x18, 0x38);  in r820t_sysfreq_sel()
897 		rc = r820t_write_reg_mask(priv, 0x1c, mixer_top, 0x04);  in r820t_sysfreq_sel()
902 		rc = r820t_write_reg_mask(priv, 0x1e, lna_discharge, 0x1f);  in r820t_sysfreq_sel()
907 		rc = r820t_write_reg_mask(priv, 0x1a, 0x20, 0x30);  in r820t_sysfreq_sel()
912 		rc = r820t_write_reg_mask(priv, 0x06, 0, 0x40);  in r820t_sysfreq_sel()
917 		rc = r820t_write_reg_mask(priv, 0x1d, lna_top, 0x38);  in r820t_sysfreq_sel()
926 		rc = r820t_write_reg_mask(priv, 0x1c, mixer_top, 0x04);  in r820t_sysfreq_sel()
931 		rc = r820t_write_reg_mask(priv, 0x1e, lna_discharge, 0x1f);  in r820t_sysfreq_sel()
936 		rc = r820t_write_reg_mask(priv, 0x1a, 0x00, 0x30);  in r820t_sysfreq_sel()
940 		rc = r820t_write_reg_mask(priv, 0x10, 0x00, 0x04);  in r820t_sysfreq_sel()
1067 	rc = r820t_write_reg_mask(priv, 0x0c, val, 0x0f);  in r820t_set_tv_standard()
1072 	rc = r820t_write_reg_mask(priv, 0x13, VER_NUM, 0x3f);  in r820t_set_tv_standard()
1078 		rc = r820t_write_reg_mask(priv, 0x1d, 0x00, 0x38);  in r820t_set_tv_standard()
1100 			rc = r820t_write_reg_mask(priv, 0x0b, hp_cor, 0x60);  in r820t_set_tv_standard()
1105 			rc = r820t_write_reg_mask(priv, 0x0f, 0x04, 0x04);  in r820t_set_tv_standard()
1110 			rc = r820t_write_reg_mask(priv, 0x10, 0x00, 0x03);  in r820t_set_tv_standard()
1119 			rc = r820t_write_reg_mask(priv, 0x0b, 0x10, 0x10);  in r820t_set_tv_standard()
1126 			rc = r820t_write_reg_mask(priv, 0x0b, 0x00, 0x10);  in r820t_set_tv_standard()
1131 			rc = r820t_write_reg_mask(priv, 0x0f, 0x00, 0x04);  in r820t_set_tv_standard()
1149 	rc = r820t_write_reg_mask(priv, 0x0a,  in r820t_set_tv_standard()
1155 	rc = r820t_write_reg_mask(priv, 0x0b, hp_cor, 0xef);  in r820t_set_tv_standard()
1161 	rc = r820t_write_reg_mask(priv, 0x07, img_r, 0x80);  in r820t_set_tv_standard()
1166 	rc = r820t_write_reg_mask(priv, 0x06, filt_gain, 0x30);  in r820t_set_tv_standard()
1171 	rc = r820t_write_reg_mask(priv, 0x1e, ext_enable, 0x60);  in r820t_set_tv_standard()
1176 	rc = r820t_write_reg_mask(priv, 0x05, loop_through, 0x80);  in r820t_set_tv_standard()
1181 	rc = r820t_write_reg_mask(priv, 0x1f, lt_att, 0x80);  in r820t_set_tv_standard()
1186 	rc = r820t_write_reg_mask(priv, 0x0f, flt_ext_widest, 0x80);  in r820t_set_tv_standard()
1191 	rc = r820t_write_reg_mask(priv, 0x19, polyfil_cur, 0x60);  in r820t_set_tv_standard()
1245 		rc = r820t_write_reg_mask(priv, 0x05, 0x10, 0x10);
1250 		rc = r820t_write_reg_mask(priv, 0x07, 0, 0x10);
1259 		rc = r820t_write_reg_mask(priv, 0x0c, 0x08, 0x9f);
1276 		rc = r820t_write_reg_mask(priv, 0x05, lna_index, 0x0f);
1281 		rc = r820t_write_reg_mask(priv, 0x07, mix_index, 0x0f);
1286 		rc = r820t_write_reg_mask(priv, 0x05, 0, 0x10);
1291 		rc = r820t_write_reg_mask(priv, 0x07, 0x10, 0x10);
1296 		rc = r820t_write_reg_mask(priv, 0x0c, 0x0b, 0x9f);
1412 	rc = r820t_write_reg_mask(priv, 0x10, 0x0b, 0x0b);  in r820t_xtal_check()
1417 	rc = r820t_write_reg_mask(priv, 0x1a, 0x00, 0x0c);  in r820t_xtal_check()
1422 	rc = r820t_write_reg_mask(priv, 0x13, 0x7f, 0x7f);  in r820t_xtal_check()
1427 	rc = r820t_write_reg_mask(priv, 0x13, 0x00, 0x40);  in r820t_xtal_check()
1433 		rc = r820t_write_reg_mask(priv, 0x10,  in r820t_xtal_check()
1469 	rc = r820t_write_reg_mask(priv, 0x05, 0x20, 0x20);  in r820t_imr_prepare()
1474 	rc = r820t_write_reg_mask(priv, 0x07, 0, 0x10);  in r820t_imr_prepare()
1479 	rc = r820t_write_reg_mask(priv, 0x0a, 0x0f, 0x0f);  in r820t_imr_prepare()
1484 	rc = r820t_write_reg_mask(priv, 0x0b, 0x60, 0x6f);  in r820t_imr_prepare()
1489 	rc = r820t_write_reg_mask(priv, 0x0c, 0x0b, 0x9f);  in r820t_imr_prepare()
1494 	rc = r820t_write_reg_mask(priv, 0x0f, 0, 0x08);  in r820t_imr_prepare()
1499 	rc = r820t_write_reg_mask(priv, 0x18, 0x10, 0x10);  in r820t_imr_prepare()
1504 	rc = r820t_write_reg_mask(priv, 0x1c, 0x02, 0x02);  in r820t_imr_prepare()
1509 	rc = r820t_write_reg_mask(priv, 0x1e, 0x80, 0x80);  in r820t_imr_prepare()
1514 	rc = r820t_write_reg_mask(priv, 0x06, 0x20, 0x20);  in r820t_imr_prepare()
1807 		rc = r820t_write_reg_mask(priv, 0x0c, vga_count, 0x0f);  in r820t_vga_adjust()
1881 	rc = r820t_write_reg_mask(priv, 0x08, 0, 0x3f);  in r820t_iq()
1885 	rc = r820t_write_reg_mask(priv, 0x09, 0, 0x3f);  in r820t_iq()
2134 	return r820t_write_reg_mask(priv, 0x0f, enable ? 1 : 0, 0x01);