Lines Matching +full:pulse +full:- +full:width

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 #define ENE_STATUS		0	/* hardware status - unused */
50 #define ENE_FW_SMPL_BUF_FAN_PLS	0x8000	/* combined sample is pulse */
98 #define ENE_CIRCFG2_FAST_SAMPL1	0x40	/* Fast leading pulse detection for RC6 */
101 /* Knobs for protocol decoding - will document when/if will use them */
108 /* Actual register which contains RLC RX data - read by firmware */
112 /* RLC configuration - sample period (1us resolution) + idle mode */
120 #define ENE_CIRRLC_OUT_PULSE	0x80	/* Transmitted sample is pulse */
125  * Low nibble  - number of carrier pulses to average
126  * High nibble - number of initial carrier pulses to discard
134 /* detected RX carrier pulse width (resolution: 500 ns) */
144 /* TX pulse width (resolution: 500 ns)*/
212 	bool tx_sample_pulse;			/* current sample is pulse */