Lines Matching +full:enable +full:- +full:remote +full:- +full:sense
1 // SPDX-License-Identifier: GPL-2.0-or-later
27 #include <media/rc-core.h>
37 outb(reg >> 8, dev->hw_io + ENE_ADDR_HI); in ene_set_reg_addr()
38 outb(reg & 0xFF, dev->hw_io + ENE_ADDR_LO); in ene_set_reg_addr()
46 retval = inb(dev->hw_io + ENE_IO); in ene_read_reg()
54 dbg_regs("reg %04x <- %02x", reg, value); in ene_write_reg()
56 outb(value, dev->hw_io + ENE_IO); in ene_write_reg()
64 outb(inb(dev->hw_io + ENE_IO) | mask, dev->hw_io + ENE_IO); in ene_set_reg_mask()
72 outb(inb(dev->hw_io + ENE_IO) & ~mask, dev->hw_io + ENE_IO); in ene_clear_reg_mask()
100 dev->pll_freq = (ene_read_reg(dev, ENE_PLLFRH) << 4) + in ene_hw_detect()
104 dev->rx_period_adjust = in ene_hw_detect()
105 dev->pll_freq == ENE_DEFAULT_PLL_FREQ ? 2 : 4; in ene_hw_detect()
109 pr_warn("send a mail to lirc-list@lists.sourceforge.net\n"); in ene_hw_detect()
111 return -ENODEV; in ene_hw_detect()
114 pr_notice("chip is 0x%02x%02x - kbver = 0x%02x, rev = 0x%02x\n", in ene_hw_detect()
117 pr_notice("PLL freq = %d\n", dev->pll_freq); in ene_hw_detect()
121 return -ENODEV; in ene_hw_detect()
125 dev->hw_revision = ENE_HW_C; in ene_hw_detect()
128 dev->hw_revision = ENE_HW_B; in ene_hw_detect()
131 dev->hw_revision = ENE_HW_D; in ene_hw_detect()
136 if (dev->hw_revision < ENE_HW_C) in ene_hw_detect()
144 dev->hw_use_gpio_0a = !!(fw_reg2 & ENE_FW2_GP0A); in ene_hw_detect()
145 dev->hw_learning_and_tx_capable = !!(fw_reg2 & ENE_FW2_LEARNING); in ene_hw_detect()
146 dev->hw_extra_buffer = !!(fw_reg1 & ENE_FW1_HAS_EXTRA_BUF); in ene_hw_detect()
148 if (dev->hw_learning_and_tx_capable) in ene_hw_detect()
149 dev->hw_fan_input = !!(fw_reg2 & ENE_FW2_FAN_INPUT); in ene_hw_detect()
153 if (dev->hw_learning_and_tx_capable) { in ene_hw_detect()
158 pr_notice(" lirc-list@lists.sourceforge.net\n"); in ene_hw_detect()
162 dev->hw_use_gpio_0a ? "40" : "0A"); in ene_hw_detect()
164 if (dev->hw_fan_input) in ene_hw_detect()
168 if (!dev->hw_fan_input) in ene_hw_detect()
170 dev->hw_use_gpio_0a ? "0A" : "40"); in ene_hw_detect()
172 if (dev->hw_extra_buffer) in ene_hw_detect()
183 dev->r_pointer = dev->w_pointer; in ene_rx_setup_hw_buffer()
185 if (!dev->hw_extra_buffer) { in ene_rx_setup_hw_buffer()
186 dev->buffer_len = ENE_FW_PACKET_SIZE * 2; in ene_rx_setup_hw_buffer()
192 dev->extra_buf1_address = tmp; in ene_rx_setup_hw_buffer()
194 dev->extra_buf1_len = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 2); in ene_rx_setup_hw_buffer()
198 dev->extra_buf2_address = tmp; in ene_rx_setup_hw_buffer()
200 dev->extra_buf2_len = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 5); in ene_rx_setup_hw_buffer()
202 dev->buffer_len = dev->extra_buf1_len + dev->extra_buf2_len + 8; in ene_rx_setup_hw_buffer()
205 pr_notice(" 0x%04x - len : %d\n", in ene_rx_setup_hw_buffer()
206 dev->extra_buf1_address, dev->extra_buf1_len); in ene_rx_setup_hw_buffer()
207 pr_notice(" 0x%04x - len : %d\n", in ene_rx_setup_hw_buffer()
208 dev->extra_buf2_address, dev->extra_buf2_len); in ene_rx_setup_hw_buffer()
210 pr_notice("Total buffer len = %d\n", dev->buffer_len); in ene_rx_setup_hw_buffer()
212 if (dev->buffer_len > 64 || dev->buffer_len < 16) in ene_rx_setup_hw_buffer()
215 if (dev->extra_buf1_address > 0xFBFC || in ene_rx_setup_hw_buffer()
216 dev->extra_buf1_address < 0xEC00) in ene_rx_setup_hw_buffer()
219 if (dev->extra_buf2_address > 0xFBFC || in ene_rx_setup_hw_buffer()
220 dev->extra_buf2_address < 0xEC00) in ene_rx_setup_hw_buffer()
223 if (dev->r_pointer > dev->buffer_len) in ene_rx_setup_hw_buffer()
230 dev->hw_extra_buffer = false; in ene_rx_setup_hw_buffer()
235 /* Restore the pointers to extra buffers - to make module reload work*/
238 if (!dev->hw_extra_buffer) in ene_rx_restore_hw_buffer()
242 dev->extra_buf1_address & 0xFF); in ene_rx_restore_hw_buffer()
244 dev->extra_buf1_address >> 8); in ene_rx_restore_hw_buffer()
245 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 2, dev->extra_buf1_len); in ene_rx_restore_hw_buffer()
248 dev->extra_buf2_address & 0xFF); in ene_rx_restore_hw_buffer()
250 dev->extra_buf2_address >> 8); in ene_rx_restore_hw_buffer()
252 dev->extra_buf2_len); in ene_rx_restore_hw_buffer()
259 if (dev->hw_extra_buffer) in ene_rx_read_hw_pointer()
260 dev->w_pointer = ene_read_reg(dev, ENE_FW_RX_POINTER); in ene_rx_read_hw_pointer()
262 dev->w_pointer = ene_read_reg(dev, ENE_FW2) in ene_rx_read_hw_pointer()
266 dev->w_pointer, dev->r_pointer); in ene_rx_read_hw_pointer()
274 if (dev->r_pointer == dev->w_pointer) { in ene_rx_get_sample_reg()
279 if (dev->r_pointer == dev->w_pointer) { in ene_rx_get_sample_reg()
280 dbg_verbose("RB: end of data at %d", dev->r_pointer); in ene_rx_get_sample_reg()
284 dbg_verbose("RB: reading at offset %d", dev->r_pointer); in ene_rx_get_sample_reg()
285 r_pointer = dev->r_pointer; in ene_rx_get_sample_reg()
287 dev->r_pointer++; in ene_rx_get_sample_reg()
288 if (dev->r_pointer == dev->buffer_len) in ene_rx_get_sample_reg()
289 dev->r_pointer = 0; in ene_rx_get_sample_reg()
291 dbg_verbose("RB: next read will be from offset %d", dev->r_pointer); in ene_rx_get_sample_reg()
298 r_pointer -= 8; in ene_rx_get_sample_reg()
300 if (r_pointer < dev->extra_buf1_len) { in ene_rx_get_sample_reg()
302 return dev->extra_buf1_address + r_pointer; in ene_rx_get_sample_reg()
305 r_pointer -= dev->extra_buf1_len; in ene_rx_get_sample_reg()
307 if (r_pointer < dev->extra_buf2_len) { in ene_rx_get_sample_reg()
309 return dev->extra_buf2_address + r_pointer; in ene_rx_get_sample_reg()
316 /* Sense current received carrier */
338 if (dev->carrier_detect_enabled) { in ene_rx_sense_carrier()
344 ir_raw_event_store(dev->rdev, &ev); in ene_rx_sense_carrier()
349 static void ene_rx_enable_cir_engine(struct ene_device *dev, bool enable) in ene_rx_enable_cir_engine() argument
352 ENE_CIRCFG_RX_EN | ENE_CIRCFG_RX_IRQ, enable); in ene_rx_enable_cir_engine()
365 static void ene_rx_enable_fan_input(struct ene_device *dev, bool enable) in ene_rx_enable_fan_input() argument
367 if (!dev->hw_fan_input) in ene_rx_enable_fan_input()
370 if (!enable) in ene_rx_enable_fan_input()
381 bool learning_mode = dev->learning_mode_enabled || in ene_rx_setup()
382 dev->carrier_detect_enabled; in ene_rx_setup()
394 dev->pll_freq == ENE_DEFAULT_PLL_FREQ ? 1 : 2; in ene_rx_setup()
400 if (dev->hw_revision < ENE_HW_C) in ene_rx_setup()
405 WARN_ON(!dev->hw_learning_and_tx_capable); in ene_rx_setup()
407 /* Enable the opposite of the normal input in ene_rx_setup()
412 ene_rx_select_input(dev, !dev->hw_use_gpio_0a); in ene_rx_setup()
413 dev->rx_fan_input_inuse = false; in ene_rx_setup()
415 /* Enable carrier demodulation */ in ene_rx_setup()
418 /* Enable carrier detection */ in ene_rx_setup()
421 dev->carrier_detect_enabled || debug); in ene_rx_setup()
423 if (dev->hw_fan_input) in ene_rx_setup()
424 dev->rx_fan_input_inuse = true; in ene_rx_setup()
426 ene_rx_select_input(dev, dev->hw_use_gpio_0a); in ene_rx_setup()
434 if (dev->rx_fan_input_inuse) { in ene_rx_setup()
435 dev->rdev->rx_resolution = ENE_FW_SAMPLE_PERIOD_FAN; in ene_rx_setup()
439 dev->rdev->min_timeout = dev->rdev->max_timeout = in ene_rx_setup()
443 dev->rdev->rx_resolution = sample_period; in ene_rx_setup()
450 dev->rdev->min_timeout = 127 * sample_period; in ene_rx_setup()
451 dev->rdev->max_timeout = 200000; in ene_rx_setup()
454 if (dev->rdev->timeout > dev->rdev->max_timeout) in ene_rx_setup()
455 dev->rdev->timeout = dev->rdev->max_timeout; in ene_rx_setup()
456 if (dev->rdev->timeout < dev->rdev->min_timeout) in ene_rx_setup()
457 dev->rdev->timeout = dev->rdev->min_timeout; in ene_rx_setup()
460 /* Enable the device for receive */
465 /* Enable system interrupt */ in ene_rx_enable_hw()
466 if (dev->hw_revision < ENE_HW_C) { in ene_rx_enable_hw()
467 ene_write_reg(dev, ENEB_IRQ, dev->irq << 1); in ene_rx_enable_hw()
473 reg_value |= (dev->irq & ENE_IRQ_MASK); in ene_rx_enable_hw()
477 /* Enable inputs */ in ene_rx_enable_hw()
478 ene_rx_enable_fan_input(dev, dev->rx_fan_input_inuse); in ene_rx_enable_hw()
479 ene_rx_enable_cir_engine(dev, !dev->rx_fan_input_inuse); in ene_rx_enable_hw()
481 /* ack any pending irqs - just in case */ in ene_rx_enable_hw()
484 /* enable firmware bits */ in ene_rx_enable_hw()
488 ir_raw_event_set_idle(dev->rdev, true); in ene_rx_enable_hw()
491 /* Enable the device for receive - wrapper to track the state*/
495 dev->rx_enabled = true; in ene_rx_enable()
507 ir_raw_event_set_idle(dev->rdev, true); in ene_rx_disable_hw()
510 /* Disable the device receiver - wrapper to track the state */
514 dev->rx_enabled = false; in ene_rx_disable()
532 spin_lock_irqsave(&dev->hw_lock, flags); in ene_tx_set_carrier()
535 ENE_CIRCFG_TX_CARR, dev->tx_period > 0); in ene_tx_set_carrier()
537 if (!dev->tx_period) in ene_tx_set_carrier()
540 BUG_ON(dev->tx_duty_cycle >= 100 || dev->tx_duty_cycle <= 0); in ene_tx_set_carrier()
542 tx_puls_width = dev->tx_period / (100 / dev->tx_duty_cycle); in ene_tx_set_carrier()
547 dbg("TX: pulse distance = %d * 500 ns", dev->tx_period); in ene_tx_set_carrier()
550 ene_write_reg(dev, ENE_CIRMOD_PRD, dev->tx_period | ENE_CIRMOD_PRD_POL); in ene_tx_set_carrier()
553 spin_unlock_irqrestore(&dev->hw_lock, flags); in ene_tx_set_carrier()
556 /* Enable/disable transmitters */
561 spin_lock_irqsave(&dev->hw_lock, flags); in ene_tx_set_transmitters()
563 !!(dev->transmitter_mask & 0x01)); in ene_tx_set_transmitters()
565 !!(dev->transmitter_mask & 0x02)); in ene_tx_set_transmitters()
566 spin_unlock_irqrestore(&dev->hw_lock, flags); in ene_tx_set_transmitters()
575 dev->saved_conf1 = conf1; in ene_tx_enable()
588 if (dev->hw_revision == ENE_HW_C) in ene_tx_enable()
591 /* Enable TX engine */ in ene_tx_enable()
599 ene_write_reg(dev, ENE_CIRCFG, dev->saved_conf1); in ene_tx_disable()
600 dev->tx_buffer = NULL; in ene_tx_disable()
604 /* TX one sample - must be called with dev->hw_lock*/
609 bool pulse = dev->tx_sample_pulse; in ene_tx_sample()
611 if (!dev->tx_buffer) { in ene_tx_sample()
617 if (!dev->tx_sample) { in ene_tx_sample()
619 if (dev->tx_pos == dev->tx_len) { in ene_tx_sample()
620 if (!dev->tx_done) { in ene_tx_sample()
622 dev->tx_done = true; in ene_tx_sample()
627 complete(&dev->tx_complete); in ene_tx_sample()
632 sample = dev->tx_buffer[dev->tx_pos++]; in ene_tx_sample()
633 dev->tx_sample_pulse = !dev->tx_sample_pulse; in ene_tx_sample()
635 dev->tx_sample = DIV_ROUND_CLOSEST(sample, sample_period); in ene_tx_sample()
637 if (!dev->tx_sample) in ene_tx_sample()
638 dev->tx_sample = 1; in ene_tx_sample()
641 raw_tx = min(dev->tx_sample , (unsigned int)ENE_CIRRLC_OUT_MASK); in ene_tx_sample()
642 dev->tx_sample -= raw_tx; in ene_tx_sample()
650 dev->tx_reg ? ENE_CIRRLC_OUT1 : ENE_CIRRLC_OUT0, raw_tx); in ene_tx_sample()
652 dev->tx_reg = !dev->tx_reg; in ene_tx_sample()
656 mod_timer(&dev->tx_sim_timer, jiffies + HZ / 500); in ene_tx_sample()
665 spin_lock_irqsave(&dev->hw_lock, flags); in ene_tx_irqsim()
667 spin_unlock_irqrestore(&dev->hw_lock, flags); in ene_tx_irqsim()
680 if (dev->hw_revision < ENE_HW_C) { in ene_irq_status()
694 /* original driver does that twice - a workaround ? */ in ene_irq_status()
725 spin_lock_irqsave(&dev->hw_lock, flags); in ene_isr()
738 if (!dev->hw_learning_and_tx_capable) { in ene_isr()
750 if (dev->hw_learning_and_tx_capable) in ene_isr()
755 if (!dev->hw_extra_buffer) in ene_isr()
756 dev->r_pointer = dev->w_pointer == 0 ? ENE_FW_PACKET_SIZE : 0; in ene_isr()
768 if (dev->rx_fan_input_inuse) { in ene_isr()
770 int offset = ENE_FW_SMPL_BUF_FAN - ENE_FW_SAMPLE_BUFFER; in ene_isr()
785 if (dev->rx_period_adjust) { in ene_isr()
787 hw_sample /= (100 + dev->rx_period_adjust); in ene_isr()
791 if (!dev->hw_extra_buffer && !hw_sample) { in ene_isr()
792 dev->r_pointer = dev->w_pointer; in ene_isr()
800 ir_raw_event_store_with_filter(dev->rdev, &ev); in ene_isr()
803 ir_raw_event_handle(dev->rdev); in ene_isr()
805 spin_unlock_irqrestore(&dev->hw_lock, flags); in ene_isr()
812 dev->tx_period = 32; in ene_setup_default_settings()
813 dev->tx_duty_cycle = 50; /*%*/ in ene_setup_default_settings()
814 dev->transmitter_mask = 0x03; in ene_setup_default_settings()
815 dev->learning_mode_enabled = learning_mode_force; in ene_setup_default_settings()
818 dev->rdev->timeout = MS_TO_US(150); in ene_setup_default_settings()
824 if (dev->hw_learning_and_tx_capable) { in ene_setup_hw_settings()
835 struct ene_device *dev = rdev->priv; in ene_open()
838 spin_lock_irqsave(&dev->hw_lock, flags); in ene_open()
840 spin_unlock_irqrestore(&dev->hw_lock, flags); in ene_open()
847 struct ene_device *dev = rdev->priv; in ene_close()
849 spin_lock_irqsave(&dev->hw_lock, flags); in ene_close()
852 spin_unlock_irqrestore(&dev->hw_lock, flags); in ene_close()
858 struct ene_device *dev = rdev->priv; in ene_set_tx_mask()
868 dev->transmitter_mask = tx_mask; in ene_set_tx_mask()
876 struct ene_device *dev = rdev->priv; in ene_set_tx_carrier()
881 return -EINVAL; in ene_set_tx_carrier()
887 dbg("TX: out of range %d-%d kHz carrier", in ene_set_tx_carrier()
889 return -EINVAL; in ene_set_tx_carrier()
892 dev->tx_period = period; in ene_set_tx_carrier()
900 struct ene_device *dev = rdev->priv; in ene_set_tx_duty_cycle()
902 dev->tx_duty_cycle = duty_cycle; in ene_set_tx_duty_cycle()
907 /* outside interface: enable learning mode */
908 static int ene_set_learning_mode(struct rc_dev *rdev, int enable) in ene_set_learning_mode() argument
910 struct ene_device *dev = rdev->priv; in ene_set_learning_mode()
912 if (enable == dev->learning_mode_enabled) in ene_set_learning_mode()
915 spin_lock_irqsave(&dev->hw_lock, flags); in ene_set_learning_mode()
916 dev->learning_mode_enabled = enable; in ene_set_learning_mode()
920 spin_unlock_irqrestore(&dev->hw_lock, flags); in ene_set_learning_mode()
924 static int ene_set_carrier_report(struct rc_dev *rdev, int enable) in ene_set_carrier_report() argument
926 struct ene_device *dev = rdev->priv; in ene_set_carrier_report()
929 if (enable == dev->carrier_detect_enabled) in ene_set_carrier_report()
932 spin_lock_irqsave(&dev->hw_lock, flags); in ene_set_carrier_report()
933 dev->carrier_detect_enabled = enable; in ene_set_carrier_report()
937 spin_unlock_irqrestore(&dev->hw_lock, flags); in ene_set_carrier_report()
941 /* outside interface: enable or disable idle mode */
944 struct ene_device *dev = rdev->priv; in ene_set_idle()
955 struct ene_device *dev = rdev->priv; in ene_transmit()
958 dev->tx_buffer = buf; in ene_transmit()
959 dev->tx_len = n; in ene_transmit()
960 dev->tx_pos = 0; in ene_transmit()
961 dev->tx_reg = 0; in ene_transmit()
962 dev->tx_done = 0; in ene_transmit()
963 dev->tx_sample = 0; in ene_transmit()
964 dev->tx_sample_pulse = false; in ene_transmit()
966 dbg("TX: %d samples", dev->tx_len); in ene_transmit()
968 spin_lock_irqsave(&dev->hw_lock, flags); in ene_transmit()
976 spin_unlock_irqrestore(&dev->hw_lock, flags); in ene_transmit()
978 if (wait_for_completion_timeout(&dev->tx_complete, 2 * HZ) == 0) { in ene_transmit()
980 spin_lock_irqsave(&dev->hw_lock, flags); in ene_transmit()
982 spin_unlock_irqrestore(&dev->hw_lock, flags); in ene_transmit()
991 int error = -ENOMEM; in ene_probe()
1002 error = -ENODEV; in ene_probe()
1004 /* init these to -1, as 0 is valid for both */ in ene_probe()
1005 dev->hw_io = -1; in ene_probe()
1006 dev->irq = -1; in ene_probe()
1015 spin_lock_init(&dev->hw_lock); in ene_probe()
1017 dev->hw_io = pnp_port_start(pnp_dev, 0); in ene_probe()
1018 dev->irq = pnp_irq(pnp_dev, 0); in ene_probe()
1022 dev->pnp_dev = pnp_dev; in ene_probe()
1033 if (!dev->hw_learning_and_tx_capable && txsim) { in ene_probe()
1034 dev->hw_learning_and_tx_capable = true; in ene_probe()
1035 timer_setup(&dev->tx_sim_timer, ene_tx_irqsim, 0); in ene_probe()
1039 if (!dev->hw_learning_and_tx_capable) in ene_probe()
1042 rdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER; in ene_probe()
1043 rdev->priv = dev; in ene_probe()
1044 rdev->open = ene_open; in ene_probe()
1045 rdev->close = ene_close; in ene_probe()
1046 rdev->s_idle = ene_set_idle; in ene_probe()
1047 rdev->driver_name = ENE_DRIVER_NAME; in ene_probe()
1048 rdev->map_name = RC_MAP_RC6_MCE; in ene_probe()
1049 rdev->device_name = "ENE eHome Infrared Remote Receiver"; in ene_probe()
1051 if (dev->hw_learning_and_tx_capable) { in ene_probe()
1052 rdev->s_wideband_receiver = ene_set_learning_mode; in ene_probe()
1053 init_completion(&dev->tx_complete); in ene_probe()
1054 rdev->tx_ir = ene_transmit; in ene_probe()
1055 rdev->s_tx_mask = ene_set_tx_mask; in ene_probe()
1056 rdev->s_tx_carrier = ene_set_tx_carrier; in ene_probe()
1057 rdev->s_tx_duty_cycle = ene_set_tx_duty_cycle; in ene_probe()
1058 rdev->s_carrier_report = ene_set_carrier_report; in ene_probe()
1059 rdev->device_name = "ENE eHome Infrared Remote Transceiver"; in ene_probe()
1062 dev->rdev = rdev; in ene_probe()
1068 device_set_wakeup_capable(&pnp_dev->dev, true); in ene_probe()
1069 device_set_wakeup_enable(&pnp_dev->dev, true); in ene_probe()
1076 error = -EBUSY; in ene_probe()
1077 if (!request_region(dev->hw_io, ENE_IO_SIZE, ENE_DRIVER_NAME)) { in ene_probe()
1081 if (request_irq(dev->irq, ene_isr, in ene_probe()
1090 release_region(dev->hw_io, ENE_IO_SIZE); in ene_probe()
1106 rc_unregister_device(dev->rdev); in ene_remove()
1107 del_timer_sync(&dev->tx_sim_timer); in ene_remove()
1108 spin_lock_irqsave(&dev->hw_lock, flags); in ene_remove()
1111 spin_unlock_irqrestore(&dev->hw_lock, flags); in ene_remove()
1113 free_irq(dev->irq, dev); in ene_remove()
1114 release_region(dev->hw_io, ENE_IO_SIZE); in ene_remove()
1118 /* enable wake on IR (wakes on specific button on original remote) */
1119 static void ene_enable_wake(struct ene_device *dev, bool enable) in ene_enable_wake() argument
1121 dbg("wake on IR %s", enable ? "enabled" : "disabled"); in ene_enable_wake()
1122 ene_set_clear_reg_mask(dev, ENE_FW1, ENE_FW1_WAKE, enable); in ene_enable_wake()
1129 bool wake = device_may_wakeup(&dev->pnp_dev->dev); in ene_suspend()
1131 if (!wake && dev->rx_enabled) in ene_suspend()
1143 if (dev->rx_enabled) in ene_resume()
1183 MODULE_PARM_DESC(learning_mode_force, "Enable learning mode by default");