Lines Matching full:phy
33 static inline u32 camerarx_read(struct cal_camerarx *phy, u32 offset)
35 return ioread32(phy->base + offset);
38 static inline void camerarx_write(struct cal_camerarx *phy, u32 offset, u32 val)
40 iowrite32(val, phy->base + offset);
48 static s64 cal_camerarx_get_ext_link_freq(struct cal_camerarx *phy)
50 struct v4l2_mbus_config_mipi_csi2 *mipi_csi2 = &phy->endpoint.bus.mipi_csi2;
66 state = v4l2_subdev_get_locked_active_state(&phy->subdev);
85 freq = v4l2_get_link_freq(&phy->source->entity.pads[phy->source_pad],
88 phy_err(phy, "failed to get link freq for subdev '%s'\n",
89 phy->source->name);
93 phy_dbg(3, phy, "Source Link Freq: %llu\n", freq);
98 static void cal_camerarx_lane_config(struct cal_camerarx *phy)
100 u32 val = cal_read(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance));
104 &phy->endpoint.bus.mipi_csi2;
121 cal_write(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), val);
122 phy_dbg(3, phy, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x\n",
123 phy->instance, val);
126 static void cal_camerarx_enable(struct cal_camerarx *phy)
128 u32 num_lanes = phy->cal->data->camerarx[phy->instance].num_lanes;
130 regmap_field_write(phy->fields[F_CAMMODE], 0);
131 /* Always enable all lanes at the phy control level */
132 regmap_field_write(phy->fields[F_LANEENABLE], (1 << num_lanes) - 1);
134 if (phy->fields[F_CSI_MODE])
135 regmap_field_write(phy->fields[F_CSI_MODE], 1);
136 regmap_field_write(phy->fields[F_CTRLCLKEN], 1);
139 void cal_camerarx_disable(struct cal_camerarx *phy)
141 regmap_field_write(phy->fields[F_CTRLCLKEN], 0);
151 static void cal_camerarx_config(struct cal_camerarx *phy, s64 link_freq)
160 phy_dbg(1, phy, "ths_term: %d (0x%02x)\n", ths_term, ths_term);
164 phy_dbg(1, phy, "ths_settle: %d (0x%02x)\n", ths_settle, ths_settle);
166 reg0 = camerarx_read(phy, CAL_CSI2_PHY_REG0);
172 phy_dbg(1, phy, "CSI2_%d_REG0 = 0x%08x\n", phy->instance, reg0);
173 camerarx_write(phy, CAL_CSI2_PHY_REG0, reg0);
175 reg1 = camerarx_read(phy, CAL_CSI2_PHY_REG1);
182 phy_dbg(1, phy, "CSI2_%d_REG1 = 0x%08x\n", phy->instance, reg1);
183 camerarx_write(phy, CAL_CSI2_PHY_REG1, reg1);
186 static void cal_camerarx_power(struct cal_camerarx *phy, bool enable)
194 cal_write_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance),
200 current_state = cal_read_field(phy->cal,
201 CAL_CSI2_COMPLEXIO_CFG(phy->instance),
211 phy_err(phy, "Failed to power %s complexio\n",
215 static void cal_camerarx_wait_reset(struct cal_camerarx *phy)
221 if (cal_read_field(phy->cal,
222 CAL_CSI2_COMPLEXIO_CFG(phy->instance),
229 if (cal_read_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance),
232 phy_err(phy, "Timeout waiting for Complex IO reset done\n");
235 static void cal_camerarx_wait_stop_state(struct cal_camerarx *phy)
241 if (cal_read_field(phy->cal,
242 CAL_CSI2_TIMING(phy->instance),
248 if (cal_read_field(phy->cal, CAL_CSI2_TIMING(phy->instance),
250 phy_err(phy, "Timeout waiting for stop state\n");
253 static void cal_camerarx_enable_irqs(struct cal_camerarx *phy)
271 cal_write(phy->cal, CAL_HL_IRQENABLE_SET(0),
272 CAL_HL_IRQ_CIO_MASK(phy->instance) |
273 CAL_HL_IRQ_VC_MASK(phy->instance));
274 cal_write(phy->cal, CAL_CSI2_COMPLEXIO_IRQENABLE(phy->instance),
276 cal_write(phy->cal, CAL_CSI2_VC_IRQENABLE(phy->instance),
280 static void cal_camerarx_disable_irqs(struct cal_camerarx *phy)
283 cal_write(phy->cal, CAL_HL_IRQENABLE_CLR(0),
284 CAL_HL_IRQ_CIO_MASK(phy->instance) |
285 CAL_HL_IRQ_VC_MASK(phy->instance));
286 cal_write(phy->cal, CAL_CSI2_COMPLEXIO_IRQENABLE(phy->instance), 0);
287 cal_write(phy->cal, CAL_CSI2_VC_IRQENABLE(phy->instance), 0);
290 static void cal_camerarx_ppi_enable(struct cal_camerarx *phy)
292 cal_write_field(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance),
295 cal_write_field(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance),
299 static void cal_camerarx_ppi_disable(struct cal_camerarx *phy)
301 cal_write_field(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance),
305 static int cal_camerarx_start(struct cal_camerarx *phy, u32 sink_stream)
313 remote_pad = media_pad_remote_pad_first(&phy->pads[CAL_CAMERARX_PAD_SINK]);
316 * We need to enable the PHY hardware when enabling the first stream,
321 if (phy->enable_count > 0) {
322 ret = v4l2_subdev_enable_streams(phy->source, remote_pad->index,
325 phy_err(phy, "enable streams failed in source: %d\n", ret);
329 phy->enable_count++;
334 link_freq = cal_camerarx_get_ext_link_freq(phy);
338 ret = v4l2_subdev_call(phy->source, core, s_power, 1);
340 phy_err(phy, "power on failed in subdev\n");
344 cal_camerarx_enable_irqs(phy);
347 * CSI-2 PHY Link Initialization Sequence, according to the DRA74xP /
354 * receive signals/data from the CSI-2 PHY.
358 cal_camerarx_lane_config(phy);
361 * vi.-vii. Configure D-PHY mode, enable the required lanes and
364 cal_camerarx_enable(phy);
367 * 2. CSI PHY and link initialization sequence.
369 * a. Deassert the CSI-2 PHY reset. Do not wait for reset completion
373 cal_write_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance),
376 phy_dbg(3, phy, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x De-assert Complex IO Reset\n",
377 phy->instance,
378 cal_read(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance)));
381 camerarx_read(phy, CAL_CSI2_PHY_REG0);
383 /* Program the PHY timing parameters. */
384 cal_camerarx_config(phy, link_freq);
396 sscounter = DIV_ROUND_UP(clk_get_rate(phy->cal->fclk), 10000 * 16 * 4);
398 val = cal_read(phy->cal, CAL_CSI2_TIMING(phy->instance));
403 cal_write(phy->cal, CAL_CSI2_TIMING(phy->instance), val);
404 phy_dbg(3, phy, "CAL_CSI2_TIMING(%d) = 0x%08x Stop States\n",
405 phy->instance,
406 cal_read(phy->cal, CAL_CSI2_TIMING(phy->instance)));
409 cal_write_field(phy->cal, CAL_CSI2_TIMING(phy->instance),
411 phy_dbg(3, phy, "CAL_CSI2_TIMING(%d) = 0x%08x Force RXMODE\n",
412 phy->instance,
413 cal_read(phy->cal, CAL_CSI2_TIMING(phy->instance)));
416 * c. Connect pull-down on CSI-2 PHY link (using pad control).
423 * d. Power up the CSI-2 PHY.
426 cal_camerarx_power(phy, true);
430 * CSI-2 PHY reset to complete.
432 ret = v4l2_subdev_enable_streams(phy->source, remote_pad->index,
435 v4l2_subdev_call(phy->source, core, s_power, 0);
436 cal_camerarx_disable_irqs(phy);
437 phy_err(phy, "stream on failed in subdev\n");
441 cal_camerarx_wait_reset(phy);
444 cal_camerarx_wait_stop_state(phy);
446 phy_dbg(1, phy, "CSI2_%u_REG1 = 0x%08x (bits 31-28 should be set)\n",
447 phy->instance, camerarx_read(phy, CAL_CSI2_PHY_REG1));
450 * g. Disable pull-down on CSI-2 PHY link (using pad control).
456 /* Finally, enable the PHY Protocol Interface (PPI). */
457 cal_camerarx_ppi_enable(phy);
459 phy->enable_count++;
464 static void cal_camerarx_stop(struct cal_camerarx *phy, u32 sink_stream)
469 remote_pad = media_pad_remote_pad_first(&phy->pads[CAL_CAMERARX_PAD_SINK]);
471 if (--phy->enable_count > 0) {
472 ret = v4l2_subdev_disable_streams(phy->source,
476 phy_err(phy, "stream off failed in subdev\n");
481 cal_camerarx_ppi_disable(phy);
483 cal_camerarx_disable_irqs(phy);
485 cal_camerarx_power(phy, false);
488 cal_write_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance),
492 phy_dbg(3, phy, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x Complex IO in Reset\n",
493 phy->instance,
494 cal_read(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance)));
496 /* Disable the phy */
497 cal_camerarx_disable(phy);
499 ret = v4l2_subdev_disable_streams(phy->source, remote_pad->index,
502 phy_err(phy, "stream off failed in subdev\n");
504 ret = v4l2_subdev_call(phy->source, core, s_power, 0);
506 phy_err(phy, "power off failed in subdev\n");
528 void cal_camerarx_i913_errata(struct cal_camerarx *phy)
530 u32 reg10 = camerarx_read(phy, CAL_CSI2_PHY_REG10);
534 phy_dbg(1, phy, "CSI2_%d_REG10 = 0x%08x\n", phy->instance, reg10);
535 camerarx_write(phy, CAL_CSI2_PHY_REG10, reg10);
539 struct cal_camerarx *phy)
547 phy_data = &cal->data->camerarx[phy->instance];
560 phy->fields[i] = devm_regmap_field_alloc(cal->dev,
563 if (IS_ERR(phy->fields[i])) {
565 return PTR_ERR(phy->fields[i]);
572 static int cal_camerarx_parse_dt(struct cal_camerarx *phy)
574 struct v4l2_fwnode_endpoint *endpoint = &phy->endpoint;
581 * Find the endpoint node for the port corresponding to the PHY
584 ep_node = of_graph_get_endpoint_by_regs(phy->cal->dev->of_node,
585 phy->instance, 0);
588 * The endpoint is not mandatory, not all PHY instances need to
591 phy_dbg(3, phy, "Port has no endpoint\n");
598 phy_err(phy, "Failed to parse endpoint\n");
606 phy_err(phy, "Invalid position %u for data lane %u\n",
618 phy_dbg(3, phy,
624 phy->source_ep_node = of_graph_get_remote_endpoint(ep_node);
625 phy->source_node = of_graph_get_port_parent(phy->source_ep_node);
626 if (!phy->source_node) {
627 phy_dbg(3, phy, "Can't get remote parent\n");
628 of_node_put(phy->source_ep_node);
633 phy_dbg(1, phy, "Found connected device %pOFn\n", phy->source_node);
666 struct cal_camerarx *phy = to_cal_camerarx(sd);
675 return cal_camerarx_start(phy, sink_stream);
682 struct cal_camerarx *phy = to_cal_camerarx(sd);
691 cal_camerarx_stop(phy, sink_stream);
874 struct cal_camerarx *phy = to_cal_camerarx(sd);
890 remote_pad = media_pad_remote_pad_first(&phy->pads[CAL_CAMERARX_PAD_SINK]);
896 ret = v4l2_subdev_call(phy->source, pad, get_frame_desc,
902 cal_err(phy->cal,
914 cal_err(phy->cal, "Stream %u not found in remote frame desc\n",
963 struct cal_camerarx *phy;
968 phy = devm_kzalloc(cal->dev, sizeof(*phy), GFP_KERNEL);
969 if (!phy)
972 phy->cal = cal;
973 phy->instance = instance;
975 spin_lock_init(&phy->vc_lock);
977 phy->res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
981 phy->base = devm_ioremap_resource(cal->dev, phy->res);
982 if (IS_ERR(phy->base)) {
984 return ERR_CAST(phy->base);
988 phy->res->name, &phy->res->start, &phy->res->end);
990 ret = cal_camerarx_regmap_init(cal, phy);
994 ret = cal_camerarx_parse_dt(phy);
999 sd = &phy->subdev;
1007 phy->pads[CAL_CAMERARX_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
1009 phy->pads[i].flags = MEDIA_PAD_FL_SOURCE;
1011 ret = media_entity_pads_init(&sd->entity, ARRAY_SIZE(phy->pads),
1012 phy->pads);
1024 return phy;
1029 media_entity_cleanup(&phy->subdev.entity);
1031 of_node_put(phy->source_ep_node);
1032 of_node_put(phy->source_node);
1036 void cal_camerarx_destroy(struct cal_camerarx *phy)
1038 if (!phy)
1041 v4l2_device_unregister_subdev(&phy->subdev);
1042 v4l2_subdev_cleanup(&phy->subdev);
1043 media_entity_cleanup(&phy->subdev.entity);
1044 of_node_put(phy->source_ep_node);
1045 of_node_put(phy->source_node);