Lines Matching +full:0 +full:x0a60
8 /* 0 - General */
87 #define BLT_CTL 0x0A00
88 #define BLT_ITS 0x0A04
89 #define BLT_STA1 0x0A08
90 #define BLT_AQ1_CTL 0x0A60
91 #define BLT_AQ1_IP 0x0A64
92 #define BLT_AQ1_LNA 0x0A68
93 #define BLT_AQ1_STA 0x0A6C
94 #define BLT_ITM0 0x0AD0
96 #define BLT_PLUGS1_OP2 0x0B04
97 #define BLT_PLUGS1_CHZ 0x0B08
98 #define BLT_PLUGS1_MSZ 0x0B0C
99 #define BLT_PLUGS1_PGZ 0x0B10
100 #define BLT_PLUGS2_OP2 0x0B24
101 #define BLT_PLUGS2_CHZ 0x0B28
102 #define BLT_PLUGS2_MSZ 0x0B2C
103 #define BLT_PLUGS2_PGZ 0x0B30
104 #define BLT_PLUGS3_OP2 0x0B44
105 #define BLT_PLUGS3_CHZ 0x0B48
106 #define BLT_PLUGS3_MSZ 0x0B4C
107 #define BLT_PLUGS3_PGZ 0x0B50
108 #define BLT_PLUGT_OP2 0x0B84
109 #define BLT_PLUGT_CHZ 0x0B88
110 #define BLT_PLUGT_MSZ 0x0B8C
111 #define BLT_PLUGT_PGZ 0x0B90
113 #define BLT_NIP 0x0C00
114 #define BLT_CIC 0x0C04
115 #define BLT_INS 0x0C08
116 #define BLT_ACK 0x0C0C
117 #define BLT_TBA 0x0C10
118 #define BLT_TTY 0x0C14
119 #define BLT_TXY 0x0C18
120 #define BLT_TSZ 0x0C1C
121 #define BLT_S1BA 0x0C28
122 #define BLT_S1TY 0x0C2C
123 #define BLT_S1XY 0x0C30
124 #define BLT_S2BA 0x0C38
125 #define BLT_S2TY 0x0C3C
126 #define BLT_S2XY 0x0C40
127 #define BLT_S2SZ 0x0C44
128 #define BLT_S3BA 0x0C48
129 #define BLT_S3TY 0x0C4C
130 #define BLT_S3XY 0x0C50
131 #define BLT_S3SZ 0x0C54
132 #define BLT_FCTL 0x0C68
133 #define BLT_RSF 0x0C70
134 #define BLT_RZI 0x0C74
135 #define BLT_HFP 0x0C78
136 #define BLT_VFP 0x0C7C
137 #define BLT_Y_RSF 0x0C80
138 #define BLT_Y_RZI 0x0C84
139 #define BLT_Y_HFP 0x0C88
140 #define BLT_Y_VFP 0x0C8C
141 #define BLT_IVMX0 0x0CC0
142 #define BLT_IVMX1 0x0CC4
143 #define BLT_IVMX2 0x0CC8
144 #define BLT_IVMX3 0x0CCC
145 #define BLT_OVMX0 0x0CD0
146 #define BLT_OVMX1 0x0CD4
147 #define BLT_OVMX2 0x0CD8
148 #define BLT_OVMX3 0x0CDC
149 #define BLT_DEI 0x0CEC
151 #define BLT_HFC_N 0x0D00
152 #define BLT_VFC_N 0x0D90
153 #define BLT_Y_HFC_N 0x0E00
154 #define BLT_Y_VFC_N 0x0E90
163 #define BLT_STA1_IDLE BIT(0) /* BDISP idle */
165 #define BLT_AQ1_CTL_CFG 0x80400003 /* Enable, P3, LNA reached */
167 #define BLT_INS_S1_MASK (BIT(0) | BIT(1) | BIT(2))
168 #define BLT_INS_S1_OFF 0x00000000 /* src1 disabled */
169 #define BLT_INS_S1_MEM 0x00000001 /* src1 fetched from memory */
170 #define BLT_INS_S1_CF 0x00000003 /* src1 color fill */
171 #define BLT_INS_S1_COPY 0x00000004 /* src1 direct copy */
172 #define BLT_INS_S1_FILL 0x00000007 /* src1 firect fill */
174 #define BLT_INS_S2_OFF 0x00000000 /* src2 disabled */
175 #define BLT_INS_S2_MEM 0x00000008 /* src2 fetched from memory */
176 #define BLT_INS_S2_CF 0x00000018 /* src2 color fill */
178 #define BLT_INS_S3_OFF 0x00000000 /* src3 disabled */
179 #define BLT_INS_S3_MEM 0x00000020 /* src3 fetched from memory */
195 #define BLT_CIC_ALL_GRP 0x000FDFFC /* all valid groups present */
196 #define BLT_ACK_BYPASS_S2S3 0x00000007 /* Bypass src2 and src3 */
199 #define BLT_TTY_COL_MASK 0x001F0000 /* Color format mask */
221 #define BLT_FCTL_HV_SCALE 0x00000055 /* H/V resize + color filter */
222 #define BLT_FCTL_Y_HV_SCALE 0x33000000 /* Luma version */
224 #define BLT_FCTL_HV_SAMPLE 0x00000044 /* H/V resize */
225 #define BLT_FCTL_Y_HV_SAMPLE 0x22000000 /* Luma version */
227 #define BLT_RZI_DEFAULT 0x20003000 /* H/VNB_repeat = 3/2 */
230 #define BDISP_RGB565 0x00 /* RGB565 */
231 #define BDISP_RGB888 0x01 /* RGB888 */
232 #define BDISP_XRGB8888 0x02 /* RGB888_32 */
233 #define BDISP_ARGB8888 0x05 /* ARGB888 */
234 #define BDISP_NV12 0x16 /* YCbCr42x R2B */
235 #define BDISP_YUV_3B 0x1E /* YUV (3 buffer) */