Lines Matching full:29
18 #define FIMC_REG_CISRCFMT_ITU601_16BIT BIT(29)
28 #define FIMC_REG_CIWDOFST_CLROVRLB BIT(29)
38 #define FIMC_REG_CIGCTRL_SELCAM_ITU_A BIT(29)
79 #define FIMC_REG_CITRGFMT_YCBCR420 (0 << 29)
80 #define FIMC_REG_CITRGFMT_YCBCR422 (1 << 29)
81 #define FIMC_REG_CITRGFMT_YCBCR422_1P (2 << 29)
82 #define FIMC_REG_CITRGFMT_RGB (3 << 29)
83 #define FIMC_REG_CITRGFMT_FMT_MASK (3 << 29)
123 #define FIMC_REG_CISCCTRL_SCALEUP_V BIT(29)
154 #define FIMC_REG_CISTATUS_OVFICR BIT(29)
185 #define FIMC_REG_CIIMGEFF_IE_SC_BEFORE (0 << 29)
186 #define FIMC_REG_CIIMGEFF_IE_SC_AFTER (1 << 29)
262 #define FIMC_REG_CIDMAPARAM_R_LINEAR (0 << 29)
263 #define FIMC_REG_CIDMAPARAM_R_64X32 (3 << 29)
266 #define FIMC_REG_CIDMAPARAM_TILE_MASK ((3 << 29) | (3 << 13))