Lines Matching +full:fimc +full:- +full:is

1 // SPDX-License-Identifier: GPL-2.0-only
3 * Samsung EXYNOS4x12 FIMC-IS (Imaging Subsystem) driver
30 #include <media/videobuf2-dma-contig.h>
32 #include "media-dev.h"
33 #include "fimc-is.h"
34 #include "fimc-is-command.h"
35 #include "fimc-is-errno.h"
36 #include "fimc-is-i2c.h"
37 #include "fimc-is-param.h"
38 #include "fimc-is-regs.h"
65 static void fimc_is_put_clocks(struct fimc_is *is) in fimc_is_put_clocks() argument
70 if (IS_ERR(is->clocks[i])) in fimc_is_put_clocks()
72 clk_put(is->clocks[i]); in fimc_is_put_clocks()
73 is->clocks[i] = ERR_PTR(-EINVAL); in fimc_is_put_clocks()
77 static int fimc_is_get_clocks(struct fimc_is *is) in fimc_is_get_clocks() argument
82 is->clocks[i] = ERR_PTR(-EINVAL); in fimc_is_get_clocks()
85 is->clocks[i] = clk_get(&is->pdev->dev, fimc_is_clocks[i]); in fimc_is_get_clocks()
86 if (IS_ERR(is->clocks[i])) { in fimc_is_get_clocks()
87 ret = PTR_ERR(is->clocks[i]); in fimc_is_get_clocks()
94 fimc_is_put_clocks(is); in fimc_is_get_clocks()
95 dev_err(&is->pdev->dev, "failed to get clock: %s\n", in fimc_is_get_clocks()
100 static int fimc_is_setup_clocks(struct fimc_is *is) in fimc_is_setup_clocks() argument
104 ret = clk_set_parent(is->clocks[ISS_CLK_ACLK200], in fimc_is_setup_clocks()
105 is->clocks[ISS_CLK_ACLK200_DIV]); in fimc_is_setup_clocks()
109 ret = clk_set_parent(is->clocks[ISS_CLK_ACLK400MCUISP], in fimc_is_setup_clocks()
110 is->clocks[ISS_CLK_ACLK400MCUISP_DIV]); in fimc_is_setup_clocks()
114 ret = clk_set_rate(is->clocks[ISS_CLK_ISP_DIV0], ACLK_AXI_FREQUENCY); in fimc_is_setup_clocks()
118 ret = clk_set_rate(is->clocks[ISS_CLK_ISP_DIV1], ACLK_AXI_FREQUENCY); in fimc_is_setup_clocks()
122 ret = clk_set_rate(is->clocks[ISS_CLK_MCUISP_DIV0], in fimc_is_setup_clocks()
127 return clk_set_rate(is->clocks[ISS_CLK_MCUISP_DIV1], in fimc_is_setup_clocks()
131 static int fimc_is_enable_clocks(struct fimc_is *is) in fimc_is_enable_clocks() argument
136 if (IS_ERR(is->clocks[i])) in fimc_is_enable_clocks()
138 ret = clk_prepare_enable(is->clocks[i]); in fimc_is_enable_clocks()
140 dev_err(&is->pdev->dev, "clock %s enable failed\n", in fimc_is_enable_clocks()
142 for (--i; i >= 0; i--) in fimc_is_enable_clocks()
143 clk_disable_unprepare(is->clocks[i]); in fimc_is_enable_clocks()
151 static void fimc_is_disable_clocks(struct fimc_is *is) in fimc_is_disable_clocks() argument
156 if (!IS_ERR(is->clocks[i])) { in fimc_is_disable_clocks()
157 clk_disable_unprepare(is->clocks[i]); in fimc_is_disable_clocks()
163 static int fimc_is_parse_sensor_config(struct fimc_is *is, unsigned int index, in fimc_is_parse_sensor_config() argument
166 struct fimc_is_sensor *sensor = &is->sensor[index]; in fimc_is_parse_sensor_config()
171 sensor->drvdata = fimc_is_sensor_get_drvdata(node); in fimc_is_parse_sensor_config()
172 if (!sensor->drvdata) { in fimc_is_parse_sensor_config()
173 dev_err(&is->pdev->dev, "no driver data found for: %pOF\n", in fimc_is_parse_sensor_config()
175 return -EINVAL; in fimc_is_parse_sensor_config()
178 ep = of_graph_get_endpoint_by_regs(node, 0, -1); in fimc_is_parse_sensor_config()
180 return -ENXIO; in fimc_is_parse_sensor_config()
185 return -ENXIO; in fimc_is_parse_sensor_config()
187 /* Use MIPI-CSIS channel id to determine the ISP I2C bus index. */ in fimc_is_parse_sensor_config()
190 dev_err(&is->pdev->dev, "reg property not found at: %pOF\n", in fimc_is_parse_sensor_config()
197 sensor->i2c_bus = tmp - FIMC_INPUT_MIPI_CSI2_0; in fimc_is_parse_sensor_config()
201 static int fimc_is_register_subdevs(struct fimc_is *is) in fimc_is_register_subdevs() argument
206 ret = fimc_isp_subdev_create(&is->isp); in fimc_is_register_subdevs()
212 ret = fimc_is_parse_sensor_config(is, index, child); in fimc_is_register_subdevs()
225 static int fimc_is_unregister_subdevs(struct fimc_is *is) in fimc_is_unregister_subdevs() argument
227 fimc_isp_subdev_destroy(&is->isp); in fimc_is_unregister_subdevs()
231 static int fimc_is_load_setfile(struct fimc_is *is, char *file_name) in fimc_is_load_setfile() argument
237 ret = request_firmware(&fw, file_name, &is->pdev->dev); in fimc_is_load_setfile()
239 dev_err(&is->pdev->dev, "firmware request failed (%d)\n", ret); in fimc_is_load_setfile()
242 buf = is->memory.vaddr + is->setfile.base; in fimc_is_load_setfile()
243 memcpy(buf, fw->data, fw->size); in fimc_is_load_setfile()
245 is->setfile.size = fw->size; in fimc_is_load_setfile()
247 pr_debug("mem vaddr: %p, setfile buf: %p\n", is->memory.vaddr, buf); in fimc_is_load_setfile()
249 memcpy(is->fw.setfile_info, in fimc_is_load_setfile()
250 fw->data + fw->size - FIMC_IS_SETFILE_INFO_LEN, in fimc_is_load_setfile()
251 FIMC_IS_SETFILE_INFO_LEN - 1); in fimc_is_load_setfile()
253 is->fw.setfile_info[FIMC_IS_SETFILE_INFO_LEN - 1] = '\0'; in fimc_is_load_setfile()
254 is->setfile.state = 1; in fimc_is_load_setfile()
256 pr_debug("FIMC-IS setfile loaded: base: %#x, size: %zu B\n", in fimc_is_load_setfile()
257 is->setfile.base, fw->size); in fimc_is_load_setfile()
263 int fimc_is_cpu_set_power(struct fimc_is *is, int on) in fimc_is_cpu_set_power() argument
269 mcuctl_write(0, is, REG_WDT_ISP); in fimc_is_cpu_set_power()
271 /* Cortex-A5 start address setting */ in fimc_is_cpu_set_power()
272 mcuctl_write(is->memory.addr, is, MCUCTL_REG_BBOAR); in fimc_is_cpu_set_power()
274 /* Enable and start Cortex-A5 */ in fimc_is_cpu_set_power()
275 pmuisp_write(0x18000, is, REG_PMU_ISP_ARM_OPTION); in fimc_is_cpu_set_power()
276 pmuisp_write(0x1, is, REG_PMU_ISP_ARM_CONFIGURATION); in fimc_is_cpu_set_power()
279 pmuisp_write(0x10000, is, REG_PMU_ISP_ARM_OPTION); in fimc_is_cpu_set_power()
280 pmuisp_write(0x0, is, REG_PMU_ISP_ARM_CONFIGURATION); in fimc_is_cpu_set_power()
282 while (pmuisp_read(is, REG_PMU_ISP_ARM_STATUS) & 1) { in fimc_is_cpu_set_power()
284 return -ETIME; in fimc_is_cpu_set_power()
285 timeout--; in fimc_is_cpu_set_power()
293 /* Wait until @bit of @is->state is set to @state in the interrupt handler. */
294 int fimc_is_wait_event(struct fimc_is *is, unsigned long bit, in fimc_is_wait_event() argument
298 int ret = wait_event_timeout(is->irq_queue, in fimc_is_wait_event()
299 !state ^ test_bit(bit, &is->state), in fimc_is_wait_event()
302 dev_WARN(&is->pdev->dev, "%s() timed out\n", __func__); in fimc_is_wait_event()
303 return -ETIME; in fimc_is_wait_event()
308 int fimc_is_start_firmware(struct fimc_is *is) in fimc_is_start_firmware() argument
310 struct device *dev = &is->pdev->dev; in fimc_is_start_firmware()
313 if (is->fw.f_w == NULL) { in fimc_is_start_firmware()
314 dev_err(dev, "firmware is not loaded\n"); in fimc_is_start_firmware()
315 return -EINVAL; in fimc_is_start_firmware()
318 memcpy(is->memory.vaddr, is->fw.f_w->data, is->fw.f_w->size); in fimc_is_start_firmware()
321 ret = fimc_is_cpu_set_power(is, 1); in fimc_is_start_firmware()
325 ret = fimc_is_wait_event(is, IS_ST_A5_PWR_ON, 1, in fimc_is_start_firmware()
328 dev_err(dev, "FIMC-IS CPU power on failed\n"); in fimc_is_start_firmware()
333 /* Allocate working memory for the FIMC-IS CPU. */
334 static int fimc_is_alloc_cpu_memory(struct fimc_is *is) in fimc_is_alloc_cpu_memory() argument
336 struct device *dev = &is->pdev->dev; in fimc_is_alloc_cpu_memory()
338 is->memory.vaddr = dma_alloc_coherent(dev, FIMC_IS_CPU_MEM_SIZE, in fimc_is_alloc_cpu_memory()
339 &is->memory.addr, GFP_KERNEL); in fimc_is_alloc_cpu_memory()
340 if (is->memory.vaddr == NULL) in fimc_is_alloc_cpu_memory()
341 return -ENOMEM; in fimc_is_alloc_cpu_memory()
343 is->memory.size = FIMC_IS_CPU_MEM_SIZE; in fimc_is_alloc_cpu_memory()
345 dev_info(dev, "FIMC-IS CPU memory base: %pad\n", &is->memory.addr); in fimc_is_alloc_cpu_memory()
347 if (((u32)is->memory.addr) & FIMC_IS_FW_ADDR_MASK) { in fimc_is_alloc_cpu_memory()
349 (u32)is->memory.addr); in fimc_is_alloc_cpu_memory()
350 dma_free_coherent(dev, is->memory.size, is->memory.vaddr, in fimc_is_alloc_cpu_memory()
351 is->memory.addr); in fimc_is_alloc_cpu_memory()
352 return -EIO; in fimc_is_alloc_cpu_memory()
355 is->is_p_region = (struct is_region *)(is->memory.vaddr + in fimc_is_alloc_cpu_memory()
356 FIMC_IS_CPU_MEM_SIZE - FIMC_IS_REGION_SIZE); in fimc_is_alloc_cpu_memory()
358 is->is_dma_p_region = is->memory.addr + in fimc_is_alloc_cpu_memory()
359 FIMC_IS_CPU_MEM_SIZE - FIMC_IS_REGION_SIZE; in fimc_is_alloc_cpu_memory()
361 is->is_shared_region = (struct is_share_region *)(is->memory.vaddr + in fimc_is_alloc_cpu_memory()
366 static void fimc_is_free_cpu_memory(struct fimc_is *is) in fimc_is_free_cpu_memory() argument
368 struct device *dev = &is->pdev->dev; in fimc_is_free_cpu_memory()
370 if (is->memory.vaddr == NULL) in fimc_is_free_cpu_memory()
373 dma_free_coherent(dev, is->memory.size, is->memory.vaddr, in fimc_is_free_cpu_memory()
374 is->memory.addr); in fimc_is_free_cpu_memory()
379 struct fimc_is *is = context; in fimc_is_load_firmware() local
380 struct device *dev = &is->pdev->dev; in fimc_is_load_firmware()
388 mutex_lock(&is->lock); in fimc_is_load_firmware()
390 if (fw->size < FIMC_IS_FW_SIZE_MIN || fw->size > FIMC_IS_FW_SIZE_MAX) { in fimc_is_load_firmware()
391 dev_err(dev, "wrong firmware size: %zu\n", fw->size); in fimc_is_load_firmware()
395 is->fw.size = fw->size; in fimc_is_load_firmware()
397 ret = fimc_is_alloc_cpu_memory(is); in fimc_is_load_firmware()
399 dev_err(dev, "failed to allocate FIMC-IS CPU memory\n"); in fimc_is_load_firmware()
403 memcpy(is->memory.vaddr, fw->data, fw->size); in fimc_is_load_firmware()
407 buf = (void *)(is->memory.vaddr + fw->size - FIMC_IS_FW_DESC_LEN); in fimc_is_load_firmware()
408 memcpy(&is->fw.info, buf, FIMC_IS_FW_INFO_LEN); in fimc_is_load_firmware()
409 is->fw.info[FIMC_IS_FW_INFO_LEN] = 0; in fimc_is_load_firmware()
411 buf = (void *)(is->memory.vaddr + fw->size - FIMC_IS_FW_VER_LEN); in fimc_is_load_firmware()
412 memcpy(&is->fw.version, buf, FIMC_IS_FW_VER_LEN); in fimc_is_load_firmware()
413 is->fw.version[FIMC_IS_FW_VER_LEN - 1] = 0; in fimc_is_load_firmware()
415 is->fw.state = 1; in fimc_is_load_firmware()
418 is->fw.info, is->fw.version); in fimc_is_load_firmware()
419 dev_dbg(dev, "FW size: %zu, DMA addr: %pad\n", fw->size, &is->memory.addr); in fimc_is_load_firmware()
421 is->is_shared_region->chip_id = 0xe4412; in fimc_is_load_firmware()
422 is->is_shared_region->chip_rev_no = 1; in fimc_is_load_firmware()
427 * FIXME: The firmware is not being released for now, as it is in fimc_is_load_firmware()
428 * needed around for copying to the IS working memory every in fimc_is_load_firmware()
429 * time before the Cortex-A5 is restarted. in fimc_is_load_firmware()
431 release_firmware(is->fw.f_w); in fimc_is_load_firmware()
432 is->fw.f_w = fw; in fimc_is_load_firmware()
434 mutex_unlock(&is->lock); in fimc_is_load_firmware()
437 static int fimc_is_request_firmware(struct fimc_is *is, const char *fw_name) in fimc_is_request_firmware() argument
440 FW_ACTION_UEVENT, fw_name, &is->pdev->dev, in fimc_is_request_firmware()
441 GFP_KERNEL, is, fimc_is_load_firmware); in fimc_is_request_firmware()
444 /* General IS interrupt handler */
445 static void fimc_is_general_irq_handler(struct fimc_is *is) in fimc_is_general_irq_handler() argument
447 is->i2h_cmd.cmd = mcuctl_read(is, MCUCTL_REG_ISSR(10)); in fimc_is_general_irq_handler()
449 switch (is->i2h_cmd.cmd) { in fimc_is_general_irq_handler()
451 fimc_is_hw_get_params(is, 1); in fimc_is_general_irq_handler()
452 fimc_is_hw_wait_intmsr0_intmsd0(is); in fimc_is_general_irq_handler()
453 fimc_is_hw_set_sensor_num(is); in fimc_is_general_irq_handler()
454 pr_debug("ISP FW version: %#x\n", is->i2h_cmd.args[0]); in fimc_is_general_irq_handler()
458 fimc_is_hw_get_params(is, 2); in fimc_is_general_irq_handler()
463 fimc_is_hw_get_params(is, 3); in fimc_is_general_irq_handler()
466 fimc_is_hw_get_params(is, 4); in fimc_is_general_irq_handler()
471 pr_info("unknown command: %#x\n", is->i2h_cmd.cmd); in fimc_is_general_irq_handler()
474 fimc_is_fw_clear_irq1(is, FIMC_IS_INT_GENERAL); in fimc_is_general_irq_handler()
476 switch (is->i2h_cmd.cmd) { in fimc_is_general_irq_handler()
478 fimc_is_hw_set_intgr0_gd0(is); in fimc_is_general_irq_handler()
479 set_bit(IS_ST_A5_PWR_ON, &is->state); in fimc_is_general_irq_handler()
486 is->fd_header.count = is->i2h_cmd.args[0]; in fimc_is_general_irq_handler()
487 is->fd_header.index = is->i2h_cmd.args[1]; in fimc_is_general_irq_handler()
488 is->fd_header.offset = 0; in fimc_is_general_irq_handler()
495 pr_debug("AA_DONE - %d, %d, %d\n", is->i2h_cmd.args[0], in fimc_is_general_irq_handler()
496 is->i2h_cmd.args[1], is->i2h_cmd.args[2]); in fimc_is_general_irq_handler()
500 pr_debug("ISR_DONE: args[0]: %#x\n", is->i2h_cmd.args[0]); in fimc_is_general_irq_handler()
502 switch (is->i2h_cmd.args[0]) { in fimc_is_general_irq_handler()
505 set_bit(IS_ST_CHANGE_MODE, &is->state); in fimc_is_general_irq_handler()
506 is->isp.cac_margin_x = is->i2h_cmd.args[1]; in fimc_is_general_irq_handler()
507 is->isp.cac_margin_y = is->i2h_cmd.args[2]; in fimc_is_general_irq_handler()
509 is->isp.cac_margin_x, is->isp.cac_margin_y); in fimc_is_general_irq_handler()
513 clear_bit(IS_ST_STREAM_OFF, &is->state); in fimc_is_general_irq_handler()
514 set_bit(IS_ST_STREAM_ON, &is->state); in fimc_is_general_irq_handler()
518 clear_bit(IS_ST_STREAM_ON, &is->state); in fimc_is_general_irq_handler()
519 set_bit(IS_ST_STREAM_OFF, &is->state); in fimc_is_general_irq_handler()
523 is->config[is->config_index].p_region_index[0] = 0; in fimc_is_general_irq_handler()
524 is->config[is->config_index].p_region_index[1] = 0; in fimc_is_general_irq_handler()
525 set_bit(IS_ST_BLOCK_CMD_CLEARED, &is->state); in fimc_is_general_irq_handler()
539 set_bit(IS_ST_OPEN_SENSOR, &is->state); in fimc_is_general_irq_handler()
541 is->i2h_cmd.args[2], is->i2h_cmd.args[1]); in fimc_is_general_irq_handler()
545 clear_bit(IS_ST_OPEN_SENSOR, &is->state); in fimc_is_general_irq_handler()
546 is->sensor_index = 0; in fimc_is_general_irq_handler()
554 clear_bit(IS_ST_PWR_SUBIP_ON, &is->state); in fimc_is_general_irq_handler()
558 is->setfile.base = is->i2h_cmd.args[1]; in fimc_is_general_irq_handler()
559 set_bit(IS_ST_SETFILE_LOADED, &is->state); in fimc_is_general_irq_handler()
563 set_bit(IS_ST_SETFILE_LOADED, &is->state); in fimc_is_general_irq_handler()
569 pr_err("ISR_NDONE: %d: %#x, %s\n", is->i2h_cmd.args[0], in fimc_is_general_irq_handler()
570 is->i2h_cmd.args[1], in fimc_is_general_irq_handler()
571 fimc_is_strerr(is->i2h_cmd.args[1])); in fimc_is_general_irq_handler()
573 if (is->i2h_cmd.args[1] & IS_ERROR_TIME_OUT_FLAG) in fimc_is_general_irq_handler()
576 switch (is->i2h_cmd.args[1]) { in fimc_is_general_irq_handler()
581 switch (is->i2h_cmd.args[0]) { in fimc_is_general_irq_handler()
583 is->config[is->config_index].p_region_index[0] = 0; in fimc_is_general_irq_handler()
584 is->config[is->config_index].p_region_index[1] = 0; in fimc_is_general_irq_handler()
585 set_bit(IS_ST_BLOCK_CMD_CLEARED, &is->state); in fimc_is_general_irq_handler()
591 pr_err("IS control sequence error: Not Ready\n"); in fimc_is_general_irq_handler()
595 wake_up(&is->irq_queue); in fimc_is_general_irq_handler()
600 struct fimc_is *is = priv; in fimc_is_irq_handler() local
604 spin_lock_irqsave(&is->slock, flags); in fimc_is_irq_handler()
605 status = mcuctl_read(is, MCUCTL_REG_INTSR1); in fimc_is_irq_handler()
608 fimc_is_general_irq_handler(is); in fimc_is_irq_handler()
611 fimc_isp_irq_handler(is); in fimc_is_irq_handler()
613 spin_unlock_irqrestore(&is->slock, flags); in fimc_is_irq_handler()
617 static int fimc_is_hw_open_sensor(struct fimc_is *is, in fimc_is_hw_open_sensor() argument
620 struct sensor_open_extended *soe = (void *)&is->is_p_region->shared; in fimc_is_hw_open_sensor()
622 fimc_is_hw_wait_intmsr0_intmsd0(is); in fimc_is_hw_open_sensor()
624 soe->self_calibration_mode = 1; in fimc_is_hw_open_sensor()
625 soe->actuator_type = 0; in fimc_is_hw_open_sensor()
626 soe->mipi_lane_num = 0; in fimc_is_hw_open_sensor()
627 soe->mclk = 0; in fimc_is_hw_open_sensor()
628 soe->mipi_speed = 0; in fimc_is_hw_open_sensor()
629 soe->fast_open_sensor = 0; in fimc_is_hw_open_sensor()
630 soe->i2c_sclk = 88000000; in fimc_is_hw_open_sensor()
640 mcuctl_write(HIC_OPEN_SENSOR, is, MCUCTL_REG_ISSR(0)); in fimc_is_hw_open_sensor()
641 mcuctl_write(is->sensor_index, is, MCUCTL_REG_ISSR(1)); in fimc_is_hw_open_sensor()
642 mcuctl_write(sensor->drvdata->id, is, MCUCTL_REG_ISSR(2)); in fimc_is_hw_open_sensor()
643 mcuctl_write(sensor->i2c_bus, is, MCUCTL_REG_ISSR(3)); in fimc_is_hw_open_sensor()
644 mcuctl_write(is->is_dma_p_region, is, MCUCTL_REG_ISSR(4)); in fimc_is_hw_open_sensor()
646 fimc_is_hw_set_intgr0_gd0(is); in fimc_is_hw_open_sensor()
648 return fimc_is_wait_event(is, IS_ST_OPEN_SENSOR, 1, in fimc_is_hw_open_sensor()
649 sensor->drvdata->open_timeout); in fimc_is_hw_open_sensor()
653 int fimc_is_hw_initialize(struct fimc_is *is) in fimc_is_hw_initialize() argument
659 struct device *dev = &is->pdev->dev; in fimc_is_hw_initialize()
663 /* Sensor initialization. Only one sensor is currently supported. */ in fimc_is_hw_initialize()
664 ret = fimc_is_hw_open_sensor(is, &is->sensor[0]); in fimc_is_hw_initialize()
669 fimc_is_hw_get_setfile_addr(is); in fimc_is_hw_initialize()
671 ret = fimc_is_wait_event(is, IS_ST_SETFILE_LOADED, 1, in fimc_is_hw_initialize()
677 pr_debug("setfile.base: %#x\n", is->setfile.base); in fimc_is_hw_initialize()
680 fimc_is_load_setfile(is, FIMC_IS_SETFILE_6A3); in fimc_is_hw_initialize()
681 clear_bit(IS_ST_SETFILE_LOADED, &is->state); in fimc_is_hw_initialize()
682 fimc_is_hw_load_setfile(is); in fimc_is_hw_initialize()
683 ret = fimc_is_wait_event(is, IS_ST_SETFILE_LOADED, 1, in fimc_is_hw_initialize()
691 is->setfile.base, is->setfile.size); in fimc_is_hw_initialize()
692 pr_info("FIMC-IS Setfile info: %s\n", is->fw.setfile_info); in fimc_is_hw_initialize()
695 if (is->is_p_region->shared[MAX_SHARED_COUNT - 1] != in fimc_is_hw_initialize()
698 return -EIO; in fimc_is_hw_initialize()
702 &is->memory.addr + FIMC_IS_SHARED_REGION_OFFSET, in fimc_is_hw_initialize()
703 &is->is_dma_p_region); in fimc_is_hw_initialize()
705 is->setfile.sub_index = 0; in fimc_is_hw_initialize()
708 fimc_is_hw_stream_off(is); in fimc_is_hw_initialize()
709 ret = fimc_is_wait_event(is, IS_ST_STREAM_OFF, 1, in fimc_is_hw_initialize()
717 prev_id = is->config_index; in fimc_is_hw_initialize()
721 is->config_index = config_ids[i]; in fimc_is_hw_initialize()
722 fimc_is_set_initial_params(is); in fimc_is_hw_initialize()
723 ret = fimc_is_itf_s_param(is, true); in fimc_is_hw_initialize()
725 is->config_index = prev_id; in fimc_is_hw_initialize()
729 is->config_index = prev_id; in fimc_is_hw_initialize()
731 set_bit(IS_ST_INIT_DONE, &is->state); in fimc_is_hw_initialize()
733 is->config_index); in fimc_is_hw_initialize()
739 struct fimc_is *is = s->private; in fimc_is_show() local
740 const u8 *buf = is->memory.vaddr + FIMC_IS_DEBUG_REGION_OFFSET; in fimc_is_show()
742 if (is->memory.vaddr == NULL) { in fimc_is_show()
743 dev_err(&is->pdev->dev, "firmware memory is not initialized\n"); in fimc_is_show()
744 return -EIO; in fimc_is_show()
753 static void fimc_is_debugfs_remove(struct fimc_is *is) in fimc_is_debugfs_remove() argument
755 debugfs_remove_recursive(is->debugfs_entry); in fimc_is_debugfs_remove()
756 is->debugfs_entry = NULL; in fimc_is_debugfs_remove()
759 static void fimc_is_debugfs_create(struct fimc_is *is) in fimc_is_debugfs_create() argument
761 is->debugfs_entry = debugfs_create_dir("fimc_is", NULL); in fimc_is_debugfs_create()
763 debugfs_create_file("fw_log", S_IRUGO, is->debugfs_entry, is, in fimc_is_debugfs_create()
775 node = of_parse_phandle(dev->of_node, "samsung,pmu-syscon", 0); in fimc_is_get_pmu_regs()
777 node = of_get_child_by_name(dev->of_node, "pmu"); in fimc_is_get_pmu_regs()
779 return IOMEM_ERR_PTR(-ENODEV); in fimc_is_get_pmu_regs()
786 return IOMEM_ERR_PTR(-ENOMEM); in fimc_is_get_pmu_regs()
793 struct device *dev = &pdev->dev; in fimc_is_probe()
794 struct fimc_is *is; in fimc_is_probe() local
798 is = devm_kzalloc(&pdev->dev, sizeof(*is), GFP_KERNEL); in fimc_is_probe()
799 if (!is) in fimc_is_probe()
800 return -ENOMEM; in fimc_is_probe()
802 is->pdev = pdev; in fimc_is_probe()
803 is->isp.pdev = pdev; in fimc_is_probe()
805 init_waitqueue_head(&is->irq_queue); in fimc_is_probe()
806 spin_lock_init(&is->slock); in fimc_is_probe()
807 mutex_init(&is->lock); in fimc_is_probe()
809 ret = of_address_to_resource(dev->of_node, 0, &res); in fimc_is_probe()
813 is->regs = devm_ioremap_resource(dev, &res); in fimc_is_probe()
814 if (IS_ERR(is->regs)) in fimc_is_probe()
815 return PTR_ERR(is->regs); in fimc_is_probe()
817 is->pmu_regs = fimc_is_get_pmu_regs(dev); in fimc_is_probe()
818 if (IS_ERR(is->pmu_regs)) in fimc_is_probe()
819 return PTR_ERR(is->pmu_regs); in fimc_is_probe()
821 is->irq = irq_of_parse_and_map(dev->of_node, 0); in fimc_is_probe()
822 if (!is->irq) { in fimc_is_probe()
824 ret = -EINVAL; in fimc_is_probe()
828 ret = fimc_is_get_clocks(is); in fimc_is_probe()
832 platform_set_drvdata(pdev, is); in fimc_is_probe()
834 ret = request_irq(is->irq, fimc_is_irq_handler, 0, dev_name(dev), is); in fimc_is_probe()
858 * Register FIMC-IS V4L2 subdevs to this driver. The video nodes in fimc_is_probe()
861 ret = fimc_is_register_subdevs(is); in fimc_is_probe()
865 fimc_is_debugfs_create(is); in fimc_is_probe()
867 ret = fimc_is_request_firmware(is, FIMC_IS_FW_FILENAME); in fimc_is_probe()
873 dev_dbg(dev, "FIMC-IS registered successfully\n"); in fimc_is_probe()
877 fimc_is_debugfs_remove(is); in fimc_is_probe()
878 fimc_is_unregister_subdevs(is); in fimc_is_probe()
886 free_irq(is->irq, is); in fimc_is_probe()
888 fimc_is_put_clocks(is); in fimc_is_probe()
890 iounmap(is->pmu_regs); in fimc_is_probe()
896 struct fimc_is *is = dev_get_drvdata(dev); in fimc_is_runtime_resume() local
899 ret = fimc_is_setup_clocks(is); in fimc_is_runtime_resume()
903 return fimc_is_enable_clocks(is); in fimc_is_runtime_resume()
908 struct fimc_is *is = dev_get_drvdata(dev); in fimc_is_runtime_suspend() local
910 fimc_is_disable_clocks(is); in fimc_is_runtime_suspend()
923 struct fimc_is *is = dev_get_drvdata(dev); in fimc_is_suspend() local
926 if (test_bit(IS_ST_A5_PWR_ON, &is->state)) in fimc_is_suspend()
927 return -EBUSY; in fimc_is_suspend()
935 struct device *dev = &pdev->dev; in fimc_is_remove()
936 struct fimc_is *is = dev_get_drvdata(dev); in fimc_is_remove() local
942 free_irq(is->irq, is); in fimc_is_remove()
943 fimc_is_unregister_subdevs(is); in fimc_is_remove()
945 fimc_is_put_clocks(is); in fimc_is_remove()
946 iounmap(is->pmu_regs); in fimc_is_remove()
947 fimc_is_debugfs_remove(is); in fimc_is_remove()
948 release_firmware(is->fw.f_w); in fimc_is_remove()
949 fimc_is_free_cpu_memory(is); in fimc_is_remove()
953 { .compatible = "samsung,exynos4212-fimc-is" },
1002 MODULE_DESCRIPTION("Samsung EXYNOS4x12 FIMC-IS (Imaging Subsystem) driver");