Lines Matching refs:csid
3 * camss-csid-4-7.c
15 #include "camss-csid.h"
16 #include "camss-csid-gen2.h"
32 #define CSID_CSI2_RDIN_IRQ_STATUS(rdi) ((csid_is_lite(csid) ? 0x30 : 0x40) \
34 #define CSID_CSI2_RDIN_IRQ_MASK(rdi) ((csid_is_lite(csid) ? 0x34 : 0x44) \
36 #define CSID_CSI2_RDIN_IRQ_CLEAR(rdi) ((csid_is_lite(csid) ? 0x38 : 0x48) \
38 #define CSID_CSI2_RDIN_IRQ_SET(rdi) ((csid_is_lite(csid) ? 0x3C : 0x4C) \
70 #define CSID_RDI_CFG0(rdi) ((csid_is_lite(csid) ? 0x200 : 0x300) \
95 #define CSID_RDI_CFG1(rdi) ((csid_is_lite(csid) ? 0x204 : 0x304)\
99 #define CSID_RDI_CTRL(rdi) ((csid_is_lite(csid) ? 0x208 : 0x308)\
106 #define CSID_RDI_FRM_DROP_PATTERN(rdi) ((csid_is_lite(csid) ? 0x20C : 0x30C)\
108 #define CSID_RDI_FRM_DROP_PERIOD(rdi) ((csid_is_lite(csid) ? 0x210 : 0x310)\
110 #define CSID_RDI_IRQ_SUBSAMPLE_PATTERN(rdi) ((csid_is_lite(csid) ? 0x214 : 0x314)\
112 #define CSID_RDI_IRQ_SUBSAMPLE_PERIOD(rdi) ((csid_is_lite(csid) ? 0x218 : 0x318)\
114 #define CSID_RDI_RPP_PIX_DROP_PATTERN(rdi) ((csid_is_lite(csid) ? 0x224 : 0x324)\
116 #define CSID_RDI_RPP_PIX_DROP_PERIOD(rdi) ((csid_is_lite(csid) ? 0x228 : 0x328)\
118 #define CSID_RDI_RPP_LINE_DROP_PATTERN(rdi) ((csid_is_lite(csid) ? 0x22C : 0x32C)\
120 #define CSID_RDI_RPP_LINE_DROP_PERIOD(rdi) ((csid_is_lite(csid) ? 0x230 : 0x330)\
174 static void __csid_configure_rx(struct csid_device *csid,
177 u8 lane_cnt = csid->phy.lane_cnt;
186 writel_relaxed(val, csid->base + CSID_CSI2_RX_CFG0);
192 writel_relaxed(val, csid->base + CSID_CSI2_RX_CFG1);
195 static void __csid_ctrl_rdi(struct csid_device *csid, int enable, u8 rdi)
203 writel_relaxed(val, csid->base + CSID_RDI_CTRL(rdi));
206 static void __csid_configure_testgen(struct csid_device *csid, u8 enable, u8 vc)
208 struct csid_testgen_config *tg = &csid->testgen;
209 struct v4l2_mbus_framefmt *input_format = &csid->fmt[MSM_CSID_PAD_FIRST_SRC + vc];
210 const struct csid_format_info *format = csid_get_fmt_entry(csid->res->formats->formats,
211 csid->res->formats->nformats,
213 u8 lane_cnt = csid->phy.lane_cnt;
223 writel_relaxed(val, csid->base + CSID_TPG_VC_CFG0);
227 writel_relaxed(val, csid->base + CSID_TPG_VC_CFG1);
229 writel_relaxed(0x12345678, csid->base + CSID_TPG_LFSR_SEED);
233 writel_relaxed(val, csid->base + CSID_TPG_DT_n_CFG_0(0));
236 writel_relaxed(val, csid->base + CSID_TPG_DT_n_CFG_1(0));
241 writel_relaxed(val, csid->base + CSID_TPG_DT_n_CFG_2(0));
243 writel_relaxed(0, csid->base + CSID_TPG_COLOR_BARS_CFG);
245 writel_relaxed(0, csid->base + CSID_TPG_COLOR_BOX_CFG);
253 writel_relaxed(val, csid->base + CSID_TPG_CTRL);
256 static void __csid_configure_rdi_stream(struct csid_device *csid, u8 enable, u8 vc)
259 struct v4l2_mbus_framefmt *input_format = &csid->fmt[MSM_CSID_PAD_FIRST_SRC + vc];
260 const struct csid_format_info *format = csid_get_fmt_entry(csid->res->formats->formats,
261 csid->res->formats->nformats,
287 writel_relaxed(val, csid->base + CSID_RDI_CFG0(vc));
291 writel_relaxed(val, csid->base + CSID_RDI_CFG1(vc));
294 writel_relaxed(val, csid->base + CSID_RDI_FRM_DROP_PERIOD(vc));
297 writel_relaxed(val, csid->base + CSID_RDI_FRM_DROP_PATTERN(vc));
300 writel_relaxed(val, csid->base + CSID_RDI_IRQ_SUBSAMPLE_PERIOD(vc));
303 writel_relaxed(val, csid->base + CSID_RDI_IRQ_SUBSAMPLE_PATTERN(vc));
306 writel_relaxed(val, csid->base + CSID_RDI_RPP_PIX_DROP_PERIOD(vc));
309 writel_relaxed(val, csid->base + CSID_RDI_RPP_PIX_DROP_PATTERN(vc));
312 writel_relaxed(val, csid->base + CSID_RDI_RPP_LINE_DROP_PERIOD(vc));
315 writel_relaxed(val, csid->base + CSID_RDI_RPP_LINE_DROP_PATTERN(vc));
318 writel_relaxed(val, csid->base + CSID_RDI_CTRL(vc));
320 val = readl_relaxed(csid->base + CSID_RDI_CFG0(vc));
322 writel_relaxed(val, csid->base + CSID_RDI_CFG0(vc));
325 static void csid_configure_stream(struct csid_device *csid, u8 enable)
327 struct csid_testgen_config *tg = &csid->testgen;
331 if (csid->phy.en_vc & BIT(i)) {
333 __csid_configure_testgen(csid, enable, i);
335 __csid_configure_rdi_stream(csid, enable, i);
336 __csid_configure_rx(csid, &csid->phy, i);
337 __csid_ctrl_rdi(csid, enable, i);
341 static int csid_configure_testgen_pattern(struct csid_device *csid, s32 val)
343 if (val > 0 && val <= csid->testgen.nmodes)
344 csid->testgen.mode = val;
358 struct csid_device *csid = dev;
363 val = readl_relaxed(csid->base + CSID_TOP_IRQ_STATUS);
364 writel_relaxed(val, csid->base + CSID_TOP_IRQ_CLEAR);
367 val = readl_relaxed(csid->base + CSID_CSI2_RX_IRQ_STATUS);
368 writel_relaxed(val, csid->base + CSID_CSI2_RX_IRQ_CLEAR);
372 if (csid->phy.en_vc & BIT(i)) {
373 val = readl_relaxed(csid->base + CSID_CSI2_RDIN_IRQ_STATUS(i));
374 writel_relaxed(val, csid->base + CSID_CSI2_RDIN_IRQ_CLEAR(i));
378 writel_relaxed(val, csid->base + CSID_IRQ_CMD);
381 complete(&csid->reset_complete);
388 * @csid: CSID device
392 static int csid_reset(struct csid_device *csid)
397 reinit_completion(&csid->reset_complete);
399 writel_relaxed(1, csid->base + CSID_TOP_IRQ_CLEAR);
400 writel_relaxed(1, csid->base + CSID_IRQ_CMD);
401 writel_relaxed(1, csid->base + CSID_TOP_IRQ_MASK);
402 writel_relaxed(1, csid->base + CSID_IRQ_CMD);
406 writel_relaxed(val, csid->base + CSID_RST_STROBES);
408 time = wait_for_completion_timeout(&csid->reset_complete,
411 dev_err(csid->camss->dev, "CSID reset timeout\n");
418 static void csid_subdev_init(struct csid_device *csid)
420 csid->testgen.modes = csid_testgen_modes;
421 csid->testgen.nmodes = CSID_PAYLOAD_MODE_NUM_SUPPORTED_GEN2;