Lines Matching +full:0 +full:x610
25 #define CSID_RST_STROBES 0x10
26 #define RST_STROBES 0
28 #define CSID_CSI2_RX_IRQ_STATUS 0x20
29 #define CSID_CSI2_RX_IRQ_MASK 0x24
30 #define CSID_CSI2_RX_IRQ_CLEAR 0x28
32 #define CSID_CSI2_RDIN_IRQ_STATUS(rdi) ((csid_is_lite(csid) ? 0x30 : 0x40) \
33 + 0x10 * (rdi))
34 #define CSID_CSI2_RDIN_IRQ_MASK(rdi) ((csid_is_lite(csid) ? 0x34 : 0x44) \
35 + 0x10 * (rdi))
36 #define CSID_CSI2_RDIN_IRQ_CLEAR(rdi) ((csid_is_lite(csid) ? 0x38 : 0x48) \
37 + 0x10 * (rdi))
38 #define CSID_CSI2_RDIN_IRQ_SET(rdi) ((csid_is_lite(csid) ? 0x3C : 0x4C) \
39 + 0x10 * (rdi))
41 #define CSID_TOP_IRQ_STATUS 0x70
42 #define TOP_IRQ_STATUS_RESET_DONE 0
43 #define CSID_TOP_IRQ_MASK 0x74
44 #define CSID_TOP_IRQ_CLEAR 0x78
45 #define CSID_TOP_IRQ_SET 0x7C
46 #define CSID_IRQ_CMD 0x80
47 #define IRQ_CMD_CLEAR 0
50 #define CSID_CSI2_RX_CFG0 0x100
51 #define CSI2_RX_CFG0_NUM_ACTIVE_LANES 0
59 #define CSID_CSI2_RX_CFG1 0x104
60 #define CSI2_RX_CFG1_PACKET_ECC_CORRECTION_EN 0
67 #define CGC_MODE_DYNAMIC_GATING 0
70 #define CSID_RDI_CFG0(rdi) ((csid_is_lite(csid) ? 0x200 : 0x300) \
71 + 0x100 * (rdi))
72 #define RDI_CFG0_BYTE_CNTR_EN 0
81 #define CGC_MODE_DYNAMIC 0
84 #define PLAIN_ALIGNMENT_LSB 0
95 #define CSID_RDI_CFG1(rdi) ((csid_is_lite(csid) ? 0x204 : 0x304)\
96 + 0x100 * (rdi))
97 #define RDI_CFG1_TIMESTAMP_STB_SEL 0
99 #define CSID_RDI_CTRL(rdi) ((csid_is_lite(csid) ? 0x208 : 0x308)\
100 + 0x100 * (rdi))
101 #define RDI_CTRL_HALT_CMD 0
102 #define HALT_CMD_HALT_AT_FRAME_BOUNDARY 0
106 #define CSID_RDI_FRM_DROP_PATTERN(rdi) ((csid_is_lite(csid) ? 0x20C : 0x30C)\
107 + 0x100 * (rdi))
108 #define CSID_RDI_FRM_DROP_PERIOD(rdi) ((csid_is_lite(csid) ? 0x210 : 0x310)\
109 + 0x100 * (rdi))
110 #define CSID_RDI_IRQ_SUBSAMPLE_PATTERN(rdi) ((csid_is_lite(csid) ? 0x214 : 0x314)\
111 + 0x100 * (rdi))
112 #define CSID_RDI_IRQ_SUBSAMPLE_PERIOD(rdi) ((csid_is_lite(csid) ? 0x218 : 0x318)\
113 + 0x100 * (rdi))
114 #define CSID_RDI_RPP_PIX_DROP_PATTERN(rdi) ((csid_is_lite(csid) ? 0x224 : 0x324)\
115 + 0x100 * (rdi))
116 #define CSID_RDI_RPP_PIX_DROP_PERIOD(rdi) ((csid_is_lite(csid) ? 0x228 : 0x328)\
117 + 0x100 * (rdi))
118 #define CSID_RDI_RPP_LINE_DROP_PATTERN(rdi) ((csid_is_lite(csid) ? 0x22C : 0x32C)\
119 + 0x100 * (rdi))
120 #define CSID_RDI_RPP_LINE_DROP_PERIOD(rdi) ((csid_is_lite(csid) ? 0x230 : 0x330)\
121 + 0x100 * (rdi))
123 #define CSID_TPG_CTRL 0x600
124 #define TPG_CTRL_TEST_EN 0
131 #define CSID_TPG_VC_CFG0 0x604
132 #define TPG_VC_CFG0_VC_NUM 0
134 #define NUM_ACTIVE_SLOTS_0_ENABLED 0
139 #define INTELEAVING_MODE_INTERLEAVED 0
143 #define CSID_TPG_VC_CFG1 0x608
144 #define TPG_VC_CFG1_H_BLANKING_COUNT 0
148 #define CSID_TPG_LFSR_SEED 0x60C
150 #define CSID_TPG_DT_n_CFG_0(n) (0x610 + (n) * 0xC)
151 #define TPG_DT_n_CFG_0_FRAME_HEIGHT 0
154 #define CSID_TPG_DT_n_CFG_1(n) (0x614 + (n) * 0xC)
155 #define TPG_DT_n_CFG_1_DATA_TYPE 0
159 #define CSID_TPG_DT_n_CFG_2(n) (0x618 + (n) * 0xC)
160 #define TPG_DT_n_CFG_2_PAYLOAD_MODE 0
164 #define CSID_TPG_COLOR_BARS_CFG 0x640
165 #define TPG_COLOR_BARS_CFG_UNICOLOR_BAR_EN 0
170 #define CSID_TPG_COLOR_BOX_CFG 0x644
171 #define TPG_COLOR_BOX_CFG_MODE 0
222 val |= 0 << TPG_VC_CFG0_NUM_FRAMES;
225 val = 0x740 << TPG_VC_CFG1_H_BLANKING_COUNT;
226 val |= 0x3ff << TPG_VC_CFG1_V_BLANKING_COUNT;
229 writel_relaxed(0x12345678, csid->base + CSID_TPG_LFSR_SEED);
231 val = (input_format->height & 0x1fff) << TPG_DT_n_CFG_0_FRAME_HEIGHT;
232 val |= (input_format->width & 0x1fff) << TPG_DT_n_CFG_0_FRAME_WIDTH;
233 writel_relaxed(val, csid->base + CSID_TPG_DT_n_CFG_0(0));
236 writel_relaxed(val, csid->base + CSID_TPG_DT_n_CFG_1(0));
239 val |= 0xBE << TPG_DT_n_CFG_2_USER_SPECIFIED_PAYLOAD;
241 writel_relaxed(val, csid->base + CSID_TPG_DT_n_CFG_2(0));
243 writel_relaxed(0, csid->base + CSID_TPG_COLOR_BARS_CFG);
245 writel_relaxed(0, csid->base + CSID_TPG_COLOR_BOX_CFG);
251 val |= 0x64 << TPG_CTRL_CYCLES_BETWEEN_PKTS;
252 val |= 0xA << TPG_CTRL_NUM_TRAIL_BYTES;
275 * CID : VC 3:0 << 2 | DT_ID 1:0
277 u8 dt_id = vc & 0x03;
296 val = 0;
302 val = 0;
308 val = 0;
314 val = 0;
317 val = 0;
330 for (i = 0; i < MSM_CSID_MAX_SRC_STREAMS; i++)
343 if (val > 0 && val <= csid->testgen.nmodes)
346 return 0;
371 for (i = 0; i < MSM_CSID_MAX_SRC_STREAMS; i++)
390 * Return 0 on success or a negative error code otherwise
405 val = 0x1e << RST_STROBES;
415 return 0;