Lines Matching refs:MT8195
117 else if (CFG_CHECK(MT8195, p_id))
118 reg = CFG_COMP(MT8195, ctx->param, rdma.src_ctrl);
126 else if (CFG_CHECK(MT8195, p_id))
127 reg = CFG_COMP(MT8195, ctx->param, rdma.ufo_dec_y);
133 else if (CFG_CHECK(MT8195, p_id))
134 reg = CFG_COMP(MT8195, ctx->param, rdma.ufo_dec_c);
142 else if (CFG_CHECK(MT8195, p_id))
143 reg = CFG_COMP(MT8195, ctx->param, rdma.mf_bkgd_in_pxl);
153 } else if (CFG_CHECK(MT8195, p_id)) {
154 reg = CFG_COMP(MT8195, ctx->param, rdma.control);
162 else if (CFG_CHECK(MT8195, p_id))
163 reg = CFG_COMP(MT8195, ctx->param, rdma.iova[0]);
168 else if (CFG_CHECK(MT8195, p_id))
169 reg = CFG_COMP(MT8195, ctx->param, rdma.iova[1]);
174 else if (CFG_CHECK(MT8195, p_id))
175 reg = CFG_COMP(MT8195, ctx->param, rdma.iova[2]);
181 else if (CFG_CHECK(MT8195, p_id))
182 reg = CFG_COMP(MT8195, ctx->param, rdma.iova_end[0]);
187 else if (CFG_CHECK(MT8195, p_id))
188 reg = CFG_COMP(MT8195, ctx->param, rdma.iova_end[1]);
193 else if (CFG_CHECK(MT8195, p_id))
194 reg = CFG_COMP(MT8195, ctx->param, rdma.iova_end[2]);
200 else if (CFG_CHECK(MT8195, p_id))
201 reg = CFG_COMP(MT8195, ctx->param, rdma.mf_bkgd);
207 else if (CFG_CHECK(MT8195, p_id))
208 reg = CFG_COMP(MT8195, ctx->param, rdma.sf_bkgd);
215 else if (CFG_CHECK(MT8195, p_id))
216 reg = CFG_COMP(MT8195, ctx->param, rdma.transform);
223 if (CFG_CHECK(MT8195, p_id))
224 reg = CFG_COMP(MT8195, ctx->param, rdma.dmabuf_con0);
228 if (CFG_CHECK(MT8195, p_id))
229 reg = CFG_COMP(MT8195, ctx->param, rdma.ultra_th_high_con0);
233 if (CFG_CHECK(MT8195, p_id))
234 reg = CFG_COMP(MT8195, ctx->param, rdma.ultra_th_low_con0);
238 if (CFG_CHECK(MT8195, p_id))
239 reg = CFG_COMP(MT8195, ctx->param, rdma.dmabuf_con1);
243 if (CFG_CHECK(MT8195, p_id))
244 reg = CFG_COMP(MT8195, ctx->param, rdma.ultra_th_high_con1);
248 if (CFG_CHECK(MT8195, p_id))
249 reg = CFG_COMP(MT8195, ctx->param, rdma.ultra_th_low_con1);
253 if (CFG_CHECK(MT8195, p_id))
254 reg = CFG_COMP(MT8195, ctx->param, rdma.dmabuf_con2);
258 if (CFG_CHECK(MT8195, p_id))
259 reg = CFG_COMP(MT8195, ctx->param, rdma.ultra_th_high_con2);
263 if (CFG_CHECK(MT8195, p_id))
264 reg = CFG_COMP(MT8195, ctx->param, rdma.ultra_th_low_con2);
268 if (CFG_CHECK(MT8195, p_id))
269 reg = CFG_COMP(MT8195, ctx->param, rdma.dmabuf_con3);
295 else if (CFG_CHECK(MT8195, p_id))
296 reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].offset[0]);
304 else if (CFG_CHECK(MT8195, p_id))
305 reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].offset_0_p);
314 else if (CFG_CHECK(MT8195, p_id))
315 reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].offset[1]);
321 else if (CFG_CHECK(MT8195, p_id))
322 reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].offset[2]);
328 else if (CFG_CHECK(MT8195, p_id))
329 reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].src);
336 else if (CFG_CHECK(MT8195, p_id))
337 reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].clip);
344 else if (CFG_CHECK(MT8195, p_id))
345 reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].clip_ofst);
352 } else if (CFG_CHECK(MT8195, p_id)) {
353 csf_l = CFG_COMP(MT8195, ctx->param, subfrms[index].in.left);
354 csf_r = CFG_COMP(MT8195, ctx->param, subfrms[index].in.right);
405 if (CFG_CHECK(MT8195, p_id)) {
430 else if (CFG_CHECK(MT8195, p_id))
431 bypass = CFG_COMP(MT8195, ctx->param, frame.bypass);
441 else if (CFG_CHECK(MT8195, p_id))
442 reg = CFG_COMP(MT8195, ctx->param, rsz.control1);
447 else if (CFG_CHECK(MT8195, p_id))
448 reg = CFG_COMP(MT8195, ctx->param, rsz.control2);
453 else if (CFG_CHECK(MT8195, p_id))
454 reg = CFG_COMP(MT8195, ctx->param, rsz.coeff_step_x);
460 else if (CFG_CHECK(MT8195, p_id))
461 reg = CFG_COMP(MT8195, ctx->param, rsz.coeff_step_y);
480 else if (CFG_CHECK(MT8195, p_id))
481 reg = CFG_COMP(MT8195, ctx->param, rsz.subfrms[index].control2);
486 else if (CFG_CHECK(MT8195, p_id))
487 reg = CFG_COMP(MT8195, ctx->param, rsz.subfrms[index].src);
493 } else if (CFG_CHECK(MT8195, p_id)) {
494 csf_l = CFG_COMP(MT8195, ctx->param, subfrms[index].in.left);
495 csf_r = CFG_COMP(MT8195, ctx->param, subfrms[index].in.right);
504 else if (CFG_CHECK(MT8195, p_id))
505 reg = CFG_COMP(MT8195, ctx->param, subfrms[index].luma.left);
511 else if (CFG_CHECK(MT8195, p_id))
512 reg = CFG_COMP(MT8195, ctx->param, subfrms[index].luma.left_subpix);
518 else if (CFG_CHECK(MT8195, p_id))
519 reg = CFG_COMP(MT8195, ctx->param, subfrms[index].luma.top);
525 else if (CFG_CHECK(MT8195, p_id))
526 reg = CFG_COMP(MT8195, ctx->param, subfrms[index].luma.top_subpix);
532 else if (CFG_CHECK(MT8195, p_id))
533 reg = CFG_COMP(MT8195, ctx->param, subfrms[index].chroma.left);
539 else if (CFG_CHECK(MT8195, p_id))
540 reg = CFG_COMP(MT8195, ctx->param, subfrms[index].chroma.left_subpix);
546 else if (CFG_CHECK(MT8195, p_id))
547 reg = CFG_COMP(MT8195, ctx->param, rsz.subfrms[index].clip);
550 if (CFG_CHECK(MT8195, p_id)) {
567 if (CFG_CHECK(MT8195, p_id))
568 reg = CFG_COMP(MT8195, ctx->param, rsz.subfrms[index].rsz_switch);
574 if (CFG_CHECK(MT8195, p_id))
575 reg = CFG_COMP(MT8195, ctx->param, rsz.subfrms[index].merge_cfg);
609 } else if (CFG_CHECK(MT8195, p_id)) {
610 csf_l = CFG_COMP(MT8195, ctx->param, subfrms[index].in.left);
611 csf_r = CFG_COMP(MT8195, ctx->param, subfrms[index].in.right);
640 if (CFG_CHECK(MT8195, p_id))
660 else if (CFG_CHECK(MT8195, p_id))
661 reg = CFG_COMP(MT8195, ctx->param, wrot.iova[0]);
666 else if (CFG_CHECK(MT8195, p_id))
667 reg = CFG_COMP(MT8195, ctx->param, wrot.iova[1]);
672 else if (CFG_CHECK(MT8195, p_id))
673 reg = CFG_COMP(MT8195, ctx->param, wrot.iova[2]);
677 if (CFG_CHECK(MT8195, p_id))
678 reg = CFG_COMP(MT8195, ctx->param, wrot.scan_10bit);
682 if (CFG_CHECK(MT8195, p_id))
683 reg = CFG_COMP(MT8195, ctx->param, wrot.pending_zero);
688 if (CFG_CHECK(MT8195, p_id)) {
689 reg = CFG_COMP(MT8195, ctx->param, wrot.bit_number);
697 else if (CFG_CHECK(MT8195, p_id))
698 reg = CFG_COMP(MT8195, ctx->param, wrot.control);
702 if (CFG_CHECK(MT8195, p_id)) {
703 reg = CFG_COMP(MT8195, ctx->param, wrot.pre_ultra);
711 else if (CFG_CHECK(MT8195, p_id))
712 reg = CFG_COMP(MT8195, ctx->param, wrot.stride[0]);
718 else if (CFG_CHECK(MT8195, p_id))
719 reg = CFG_COMP(MT8195, ctx->param, wrot.stride[1]);
724 else if (CFG_CHECK(MT8195, p_id))
725 reg = CFG_COMP(MT8195, ctx->param, wrot.stride[2]);
731 else if (CFG_CHECK(MT8195, p_id))
732 reg = CFG_COMP(MT8195, ctx->param, wrot.mat_ctrl);
745 else if (CFG_CHECK(MT8195, p_id))
746 reg = CFG_COMP(MT8195, ctx->param, wrot.fifo_test);
756 else if (CFG_CHECK(MT8195, p_id))
757 reg = CFG_COMP(MT8195, ctx->param, wrot.filter);
762 if (CFG_CHECK(MT8195, p_id))
780 else if (CFG_CHECK(MT8195, p_id))
781 reg = CFG_COMP(MT8195, ctx->param, wrot.subfrms[index].offset[0]);
787 else if (CFG_CHECK(MT8195, p_id))
788 reg = CFG_COMP(MT8195, ctx->param, wrot.subfrms[index].offset[1]);
794 else if (CFG_CHECK(MT8195, p_id))
795 reg = CFG_COMP(MT8195, ctx->param, wrot.subfrms[index].offset[2]);
802 else if (CFG_CHECK(MT8195, p_id))
803 reg = CFG_COMP(MT8195, ctx->param, wrot.subfrms[index].src);
809 else if (CFG_CHECK(MT8195, p_id))
810 reg = CFG_COMP(MT8195, ctx->param, wrot.subfrms[index].clip);
815 else if (CFG_CHECK(MT8195, p_id))
816 reg = CFG_COMP(MT8195, ctx->param, wrot.subfrms[index].clip_ofst);
821 else if (CFG_CHECK(MT8195, p_id))
822 reg = CFG_COMP(MT8195, ctx->param, wrot.subfrms[index].main_buf);
1029 if (CFG_CHECK(MT8195, p_id))
1030 reg = CFG_COMP(MT8195, ctx->param, tdshp.cfg);
1043 if (CFG_CHECK(MT8195, p_id))
1044 reg = CFG_COMP(MT8195, ctx->param, tdshp.subfrms[index].src);
1047 if (CFG_CHECK(MT8195, p_id))
1048 reg = CFG_COMP(MT8195, ctx->param, tdshp.subfrms[index].clip_ofst);
1052 if (CFG_CHECK(MT8195, p_id))
1053 reg = CFG_COMP(MT8195, ctx->param, tdshp.subfrms[index].clip);
1056 if (CFG_CHECK(MT8195, p_id))
1057 reg = CFG_COMP(MT8195, ctx->param, tdshp.subfrms[index].hist_cfg_0);
1060 if (CFG_CHECK(MT8195, p_id))
1061 reg = CFG_COMP(MT8195, ctx->param, tdshp.subfrms[index].hist_cfg_1);
1104 if (CFG_CHECK(MT8195, p_id))
1105 reg = CFG_COMP(MT8195, ctx->param, color.start);
1118 if (CFG_CHECK(MT8195, p_id))
1119 reg = CFG_COMP(MT8195, ctx->param, color.subfrms[index].in_hsize);
1123 if (CFG_CHECK(MT8195, p_id))
1124 reg = CFG_COMP(MT8195, ctx->param, color.subfrms[index].in_vsize);
1198 if (CFG_CHECK(MT8195, p_id))
1199 reg = CFG_COMP(MT8195, ctx->param, aal.cfg_main);
1202 if (CFG_CHECK(MT8195, p_id))
1203 reg = CFG_COMP(MT8195, ctx->param, aal.cfg);
1216 if (CFG_CHECK(MT8195, p_id))
1217 reg = CFG_COMP(MT8195, ctx->param, aal.subfrms[index].src);
1220 if (CFG_CHECK(MT8195, p_id))
1221 reg = CFG_COMP(MT8195, ctx->param, aal.subfrms[index].clip_ofst);
1225 if (CFG_CHECK(MT8195, p_id))
1226 reg = CFG_COMP(MT8195, ctx->param, aal.subfrms[index].clip);
1258 if (CFG_CHECK(MT8195, p_id))
1259 reg = CFG_COMP(MT8195, ctx->param, hdr.top);
1262 if (CFG_CHECK(MT8195, p_id))
1263 reg = CFG_COMP(MT8195, ctx->param, hdr.relay);
1276 if (CFG_CHECK(MT8195, p_id))
1277 reg = CFG_COMP(MT8195, ctx->param, hdr.subfrms[index].win_size);
1280 if (CFG_CHECK(MT8195, p_id))
1281 reg = CFG_COMP(MT8195, ctx->param, hdr.subfrms[index].src);
1284 if (CFG_CHECK(MT8195, p_id))
1285 reg = CFG_COMP(MT8195, ctx->param, hdr.subfrms[index].clip_ofst0);
1288 if (CFG_CHECK(MT8195, p_id))
1289 reg = CFG_COMP(MT8195, ctx->param, hdr.subfrms[index].clip_ofst1);
1292 if (CFG_CHECK(MT8195, p_id))
1293 reg = CFG_COMP(MT8195, ctx->param, hdr.subfrms[index].hist_ctrl_0);
1296 if (CFG_CHECK(MT8195, p_id))
1297 reg = CFG_COMP(MT8195, ctx->param, hdr.subfrms[index].hist_ctrl_1);
1300 if (CFG_CHECK(MT8195, p_id))
1301 reg = CFG_COMP(MT8195, ctx->param, hdr.subfrms[index].hdr_top);
1305 if (CFG_CHECK(MT8195, p_id))
1306 reg = CFG_COMP(MT8195, ctx->param, hdr.subfrms[index].hist_addr);
1338 if (CFG_CHECK(MT8195, p_id))
1339 reg = CFG_COMP(MT8195, ctx->param, fg.ctrl_0);
1342 if (CFG_CHECK(MT8195, p_id))
1343 reg = CFG_COMP(MT8195, ctx->param, fg.ck_en);
1356 if (CFG_CHECK(MT8195, p_id))
1357 reg = CFG_COMP(MT8195, ctx->param, fg.subfrms[index].info_0);
1360 if (CFG_CHECK(MT8195, p_id))
1361 reg = CFG_COMP(MT8195, ctx->param, fg.subfrms[index].info_1);
1396 if (CFG_CHECK(MT8195, p_id))
1397 reg = CFG_COMP(MT8195, ctx->param, ovl.L0_con);
1400 if (CFG_CHECK(MT8195, p_id))
1401 reg = CFG_COMP(MT8195, ctx->param, ovl.src_con);
1414 if (CFG_CHECK(MT8195, p_id))
1415 reg = CFG_COMP(MT8195, ctx->param, ovl.subfrms[index].L0_src_size);
1419 if (CFG_CHECK(MT8195, p_id))
1420 reg = CFG_COMP(MT8195, ctx->param, ovl.subfrms[index].roi_size);
1453 if (CFG_CHECK(MT8195, p_id))
1454 reg = CFG_COMP(MT8195, ctx->param, pad.subfrms[index].pic_size);
1977 else if (CFG_CHECK(MT8195, p_id))
1978 arg = CFG_COMP(MT8195, param, type);
1996 else if (CFG_CHECK(MT8195, p_id))
1997 arg = CFG_COMP(MT8195, param, input);
2003 else if (CFG_CHECK(MT8195, p_id))
2004 idx = CFG_COMP(MT8195, param, num_outputs);
2010 else if (CFG_CHECK(MT8195, p_id))
2011 arg = CFG_COMP(MT8195, param, outputs[i]);