Lines Matching refs:CFG_COMP

116 		reg = CFG_COMP(MT8183, ctx->param, rdma.src_ctrl);  in config_rdma_frame()
118 reg = CFG_COMP(MT8195, ctx->param, rdma.src_ctrl); in config_rdma_frame()
126 reg = CFG_COMP(MT8183, ctx->param, rdma.ufo_dec_y); in config_rdma_frame()
128 reg = CFG_COMP(MT8195, ctx->param, rdma.ufo_dec_y); in config_rdma_frame()
134 reg = CFG_COMP(MT8183, ctx->param, rdma.ufo_dec_c); in config_rdma_frame()
136 reg = CFG_COMP(MT8195, ctx->param, rdma.ufo_dec_c); in config_rdma_frame()
144 reg = CFG_COMP(MT8183, ctx->param, rdma.mf_bkgd_in_pxl); in config_rdma_frame()
146 reg = CFG_COMP(MT8195, ctx->param, rdma.mf_bkgd_in_pxl); in config_rdma_frame()
154 reg = CFG_COMP(MT8183, ctx->param, rdma.control); in config_rdma_frame()
157 reg = CFG_COMP(MT8195, ctx->param, rdma.control); in config_rdma_frame()
165 reg = CFG_COMP(MT8183, ctx->param, rdma.iova[0]); in config_rdma_frame()
167 reg = CFG_COMP(MT8195, ctx->param, rdma.iova[0]); in config_rdma_frame()
172 reg = CFG_COMP(MT8183, ctx->param, rdma.iova[1]); in config_rdma_frame()
174 reg = CFG_COMP(MT8195, ctx->param, rdma.iova[1]); in config_rdma_frame()
179 reg = CFG_COMP(MT8183, ctx->param, rdma.iova[2]); in config_rdma_frame()
181 reg = CFG_COMP(MT8195, ctx->param, rdma.iova[2]); in config_rdma_frame()
187 reg = CFG_COMP(MT8183, ctx->param, rdma.iova_end[0]); in config_rdma_frame()
189 reg = CFG_COMP(MT8195, ctx->param, rdma.iova_end[0]); in config_rdma_frame()
194 reg = CFG_COMP(MT8183, ctx->param, rdma.iova_end[1]); in config_rdma_frame()
196 reg = CFG_COMP(MT8195, ctx->param, rdma.iova_end[1]); in config_rdma_frame()
201 reg = CFG_COMP(MT8183, ctx->param, rdma.iova_end[2]); in config_rdma_frame()
203 reg = CFG_COMP(MT8195, ctx->param, rdma.iova_end[2]); in config_rdma_frame()
209 reg = CFG_COMP(MT8183, ctx->param, rdma.mf_bkgd); in config_rdma_frame()
211 reg = CFG_COMP(MT8195, ctx->param, rdma.mf_bkgd); in config_rdma_frame()
216 reg = CFG_COMP(MT8183, ctx->param, rdma.sf_bkgd); in config_rdma_frame()
218 reg = CFG_COMP(MT8195, ctx->param, rdma.sf_bkgd); in config_rdma_frame()
224 reg = CFG_COMP(MT8183, ctx->param, rdma.transform); in config_rdma_frame()
226 reg = CFG_COMP(MT8195, ctx->param, rdma.transform); in config_rdma_frame()
234 reg = CFG_COMP(MT8195, ctx->param, rdma.dmabuf_con0); in config_rdma_frame()
239 reg = CFG_COMP(MT8195, ctx->param, rdma.ultra_th_high_con0); in config_rdma_frame()
244 reg = CFG_COMP(MT8195, ctx->param, rdma.ultra_th_low_con0); in config_rdma_frame()
249 reg = CFG_COMP(MT8195, ctx->param, rdma.dmabuf_con1); in config_rdma_frame()
254 reg = CFG_COMP(MT8195, ctx->param, rdma.ultra_th_high_con1); in config_rdma_frame()
259 reg = CFG_COMP(MT8195, ctx->param, rdma.ultra_th_low_con1); in config_rdma_frame()
264 reg = CFG_COMP(MT8195, ctx->param, rdma.dmabuf_con2); in config_rdma_frame()
269 reg = CFG_COMP(MT8195, ctx->param, rdma.ultra_th_high_con2); in config_rdma_frame()
274 reg = CFG_COMP(MT8195, ctx->param, rdma.ultra_th_low_con2); in config_rdma_frame()
279 reg = CFG_COMP(MT8195, ctx->param, rdma.dmabuf_con3); in config_rdma_frame()
304 reg = CFG_COMP(MT8183, ctx->param, rdma.subfrms[index].offset[0]); in config_rdma_subfrm()
306 reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].offset[0]); in config_rdma_subfrm()
314 reg = CFG_COMP(MT8183, ctx->param, rdma.subfrms[index].offset_0_p); in config_rdma_subfrm()
316 reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].offset_0_p); in config_rdma_subfrm()
325 reg = CFG_COMP(MT8183, ctx->param, rdma.subfrms[index].offset[1]); in config_rdma_subfrm()
327 reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].offset[1]); in config_rdma_subfrm()
333 reg = CFG_COMP(MT8183, ctx->param, rdma.subfrms[index].offset[2]); in config_rdma_subfrm()
335 reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].offset[2]); in config_rdma_subfrm()
341 reg = CFG_COMP(MT8183, ctx->param, rdma.subfrms[index].src); in config_rdma_subfrm()
343 reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].src); in config_rdma_subfrm()
349 reg = CFG_COMP(MT8183, ctx->param, rdma.subfrms[index].clip); in config_rdma_subfrm()
351 reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].clip); in config_rdma_subfrm()
357 reg = CFG_COMP(MT8183, ctx->param, rdma.subfrms[index].clip_ofst); in config_rdma_subfrm()
359 reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].clip_ofst); in config_rdma_subfrm()
364 csf_l = CFG_COMP(MT8183, ctx->param, subfrms[index].in.left); in config_rdma_subfrm()
365 csf_r = CFG_COMP(MT8183, ctx->param, subfrms[index].in.right); in config_rdma_subfrm()
367 csf_l = CFG_COMP(MT8195, ctx->param, subfrms[index].in.left); in config_rdma_subfrm()
368 csf_r = CFG_COMP(MT8195, ctx->param, subfrms[index].in.right); in config_rdma_subfrm()
443 bypass = CFG_COMP(MT8183, ctx->param, frame.bypass); in config_rsz_frame()
445 bypass = CFG_COMP(MT8195, ctx->param, frame.bypass); in config_rsz_frame()
454 reg = CFG_COMP(MT8183, ctx->param, rsz.control1); in config_rsz_frame()
456 reg = CFG_COMP(MT8195, ctx->param, rsz.control1); in config_rsz_frame()
461 reg = CFG_COMP(MT8183, ctx->param, rsz.control2); in config_rsz_frame()
463 reg = CFG_COMP(MT8195, ctx->param, rsz.control2); in config_rsz_frame()
468 reg = CFG_COMP(MT8183, ctx->param, rsz.coeff_step_x); in config_rsz_frame()
470 reg = CFG_COMP(MT8195, ctx->param, rsz.coeff_step_x); in config_rsz_frame()
475 reg = CFG_COMP(MT8183, ctx->param, rsz.coeff_step_y); in config_rsz_frame()
477 reg = CFG_COMP(MT8195, ctx->param, rsz.coeff_step_y); in config_rsz_frame()
495 reg = CFG_COMP(MT8183, ctx->param, rsz.subfrms[index].control2); in config_rsz_subfrm()
497 reg = CFG_COMP(MT8195, ctx->param, rsz.subfrms[index].control2); in config_rsz_subfrm()
502 reg = CFG_COMP(MT8183, ctx->param, rsz.subfrms[index].src); in config_rsz_subfrm()
504 reg = CFG_COMP(MT8195, ctx->param, rsz.subfrms[index].src); in config_rsz_subfrm()
509 csf_l = CFG_COMP(MT8183, ctx->param, subfrms[index].in.left); in config_rsz_subfrm()
510 csf_r = CFG_COMP(MT8183, ctx->param, subfrms[index].in.right); in config_rsz_subfrm()
512 csf_l = CFG_COMP(MT8195, ctx->param, subfrms[index].in.left); in config_rsz_subfrm()
513 csf_r = CFG_COMP(MT8195, ctx->param, subfrms[index].in.right); in config_rsz_subfrm()
521 reg = CFG_COMP(MT8183, ctx->param, subfrms[index].luma.left); in config_rsz_subfrm()
523 reg = CFG_COMP(MT8195, ctx->param, subfrms[index].luma.left); in config_rsz_subfrm()
528 reg = CFG_COMP(MT8183, ctx->param, subfrms[index].luma.left_subpix); in config_rsz_subfrm()
530 reg = CFG_COMP(MT8195, ctx->param, subfrms[index].luma.left_subpix); in config_rsz_subfrm()
536 reg = CFG_COMP(MT8183, ctx->param, subfrms[index].luma.top); in config_rsz_subfrm()
538 reg = CFG_COMP(MT8195, ctx->param, subfrms[index].luma.top); in config_rsz_subfrm()
543 reg = CFG_COMP(MT8183, ctx->param, subfrms[index].luma.top_subpix); in config_rsz_subfrm()
545 reg = CFG_COMP(MT8195, ctx->param, subfrms[index].luma.top_subpix); in config_rsz_subfrm()
550 reg = CFG_COMP(MT8183, ctx->param, subfrms[index].chroma.left); in config_rsz_subfrm()
552 reg = CFG_COMP(MT8195, ctx->param, subfrms[index].chroma.left); in config_rsz_subfrm()
558 reg = CFG_COMP(MT8183, ctx->param, subfrms[index].chroma.left_subpix); in config_rsz_subfrm()
560 reg = CFG_COMP(MT8195, ctx->param, subfrms[index].chroma.left_subpix); in config_rsz_subfrm()
566 reg = CFG_COMP(MT8183, ctx->param, rsz.subfrms[index].clip); in config_rsz_subfrm()
568 reg = CFG_COMP(MT8195, ctx->param, rsz.subfrms[index].clip); in config_rsz_subfrm()
590 reg = CFG_COMP(MT8195, ctx->param, rsz.subfrms[index].rsz_switch); in config_rsz_subfrm()
597 reg = CFG_COMP(MT8195, ctx->param, rsz.subfrms[index].merge_cfg); in config_rsz_subfrm()
629 csf_l = CFG_COMP(MT8183, ctx->param, subfrms[index].in.left); in advance_rsz_subfrm()
630 csf_r = CFG_COMP(MT8183, ctx->param, subfrms[index].in.right); in advance_rsz_subfrm()
632 csf_l = CFG_COMP(MT8195, ctx->param, subfrms[index].in.left); in advance_rsz_subfrm()
633 csf_r = CFG_COMP(MT8195, ctx->param, subfrms[index].in.right); in advance_rsz_subfrm()
681 reg = CFG_COMP(MT8183, ctx->param, wrot.iova[0]); in config_wrot_frame()
683 reg = CFG_COMP(MT8195, ctx->param, wrot.iova[0]); in config_wrot_frame()
688 reg = CFG_COMP(MT8183, ctx->param, wrot.iova[1]); in config_wrot_frame()
690 reg = CFG_COMP(MT8195, ctx->param, wrot.iova[1]); in config_wrot_frame()
695 reg = CFG_COMP(MT8183, ctx->param, wrot.iova[2]); in config_wrot_frame()
697 reg = CFG_COMP(MT8195, ctx->param, wrot.iova[2]); in config_wrot_frame()
703 reg = CFG_COMP(MT8195, ctx->param, wrot.scan_10bit); in config_wrot_frame()
708 reg = CFG_COMP(MT8195, ctx->param, wrot.pending_zero); in config_wrot_frame()
714 reg = CFG_COMP(MT8195, ctx->param, wrot.bit_number); in config_wrot_frame()
721 reg = CFG_COMP(MT8183, ctx->param, wrot.control); in config_wrot_frame()
723 reg = CFG_COMP(MT8195, ctx->param, wrot.control); in config_wrot_frame()
729 reg = CFG_COMP(MT8195, ctx->param, wrot.pre_ultra); in config_wrot_frame()
736 reg = CFG_COMP(MT8183, ctx->param, wrot.stride[0]); in config_wrot_frame()
738 reg = CFG_COMP(MT8195, ctx->param, wrot.stride[0]); in config_wrot_frame()
744 reg = CFG_COMP(MT8183, ctx->param, wrot.stride[1]); in config_wrot_frame()
746 reg = CFG_COMP(MT8195, ctx->param, wrot.stride[1]); in config_wrot_frame()
751 reg = CFG_COMP(MT8183, ctx->param, wrot.stride[2]); in config_wrot_frame()
753 reg = CFG_COMP(MT8195, ctx->param, wrot.stride[2]); in config_wrot_frame()
759 reg = CFG_COMP(MT8183, ctx->param, wrot.mat_ctrl); in config_wrot_frame()
761 reg = CFG_COMP(MT8195, ctx->param, wrot.mat_ctrl); in config_wrot_frame()
773 reg = CFG_COMP(MT8183, ctx->param, wrot.fifo_test); in config_wrot_frame()
775 reg = CFG_COMP(MT8195, ctx->param, wrot.fifo_test); in config_wrot_frame()
784 reg = CFG_COMP(MT8183, ctx->param, wrot.filter); in config_wrot_frame()
786 reg = CFG_COMP(MT8195, ctx->param, wrot.filter); in config_wrot_frame()
808 reg = CFG_COMP(MT8183, ctx->param, wrot.subfrms[index].offset[0]); in config_wrot_subfrm()
810 reg = CFG_COMP(MT8195, ctx->param, wrot.subfrms[index].offset[0]); in config_wrot_subfrm()
816 reg = CFG_COMP(MT8183, ctx->param, wrot.subfrms[index].offset[1]); in config_wrot_subfrm()
818 reg = CFG_COMP(MT8195, ctx->param, wrot.subfrms[index].offset[1]); in config_wrot_subfrm()
824 reg = CFG_COMP(MT8183, ctx->param, wrot.subfrms[index].offset[2]); in config_wrot_subfrm()
826 reg = CFG_COMP(MT8195, ctx->param, wrot.subfrms[index].offset[2]); in config_wrot_subfrm()
832 reg = CFG_COMP(MT8183, ctx->param, wrot.subfrms[index].src); in config_wrot_subfrm()
834 reg = CFG_COMP(MT8195, ctx->param, wrot.subfrms[index].src); in config_wrot_subfrm()
840 reg = CFG_COMP(MT8183, ctx->param, wrot.subfrms[index].clip); in config_wrot_subfrm()
842 reg = CFG_COMP(MT8195, ctx->param, wrot.subfrms[index].clip); in config_wrot_subfrm()
847 reg = CFG_COMP(MT8183, ctx->param, wrot.subfrms[index].clip_ofst); in config_wrot_subfrm()
849 reg = CFG_COMP(MT8195, ctx->param, wrot.subfrms[index].clip_ofst); in config_wrot_subfrm()
854 reg = CFG_COMP(MT8183, ctx->param, wrot.subfrms[index].main_buf); in config_wrot_subfrm()
856 reg = CFG_COMP(MT8195, ctx->param, wrot.subfrms[index].main_buf); in config_wrot_subfrm()
926 reg = CFG_COMP(MT8183, ctx->param, wdma.wdma_cfg); in config_wdma_frame()
931 reg = CFG_COMP(MT8183, ctx->param, wdma.iova[0]); in config_wdma_frame()
935 reg = CFG_COMP(MT8183, ctx->param, wdma.iova[1]); in config_wdma_frame()
939 reg = CFG_COMP(MT8183, ctx->param, wdma.iova[2]); in config_wdma_frame()
944 reg = CFG_COMP(MT8183, ctx->param, wdma.w_in_byte); in config_wdma_frame()
949 reg = CFG_COMP(MT8183, ctx->param, wdma.uv_stride); in config_wdma_frame()
968 reg = CFG_COMP(MT8183, ctx->param, wdma.subfrms[index].offset[0]); in config_wdma_subfrm()
973 reg = CFG_COMP(MT8183, ctx->param, wdma.subfrms[index].offset[1]); in config_wdma_subfrm()
978 reg = CFG_COMP(MT8183, ctx->param, wdma.subfrms[index].offset[2]); in config_wdma_subfrm()
983 reg = CFG_COMP(MT8183, ctx->param, wdma.subfrms[index].src); in config_wdma_subfrm()
988 reg = CFG_COMP(MT8183, ctx->param, wdma.subfrms[index].clip); in config_wdma_subfrm()
993 reg = CFG_COMP(MT8183, ctx->param, wdma.subfrms[index].clip_ofst); in config_wdma_subfrm()
1074 reg = CFG_COMP(MT8195, ctx->param, tdshp.cfg); in config_tdshp_frame()
1088 reg = CFG_COMP(MT8195, ctx->param, tdshp.subfrms[index].src); in config_tdshp_subfrm()
1093 reg = CFG_COMP(MT8195, ctx->param, tdshp.subfrms[index].clip_ofst); in config_tdshp_subfrm()
1098 reg = CFG_COMP(MT8195, ctx->param, tdshp.subfrms[index].clip); in config_tdshp_subfrm()
1103 reg = CFG_COMP(MT8195, ctx->param, tdshp.subfrms[index].hist_cfg_0); in config_tdshp_subfrm()
1107 reg = CFG_COMP(MT8195, ctx->param, tdshp.subfrms[index].hist_cfg_1); in config_tdshp_subfrm()
1153 reg = CFG_COMP(MT8195, ctx->param, color.start); in config_color_frame()
1168 reg = CFG_COMP(MT8195, ctx->param, color.subfrms[index].in_hsize); in config_color_subfrm()
1173 reg = CFG_COMP(MT8195, ctx->param, color.subfrms[index].in_vsize); in config_color_subfrm()
1209 csf_l = CFG_COMP(MT8183, ctx->param, subfrms[index].in.left); in config_ccorr_subfrm()
1210 csf_r = CFG_COMP(MT8183, ctx->param, subfrms[index].in.right); in config_ccorr_subfrm()
1211 csf_t = CFG_COMP(MT8183, ctx->param, subfrms[index].in.top); in config_ccorr_subfrm()
1212 csf_b = CFG_COMP(MT8183, ctx->param, subfrms[index].in.bottom); in config_ccorr_subfrm()
1248 reg = CFG_COMP(MT8195, ctx->param, aal.cfg_main); in config_aal_frame()
1252 reg = CFG_COMP(MT8195, ctx->param, aal.cfg); in config_aal_frame()
1266 reg = CFG_COMP(MT8195, ctx->param, aal.subfrms[index].src); in config_aal_subfrm()
1271 reg = CFG_COMP(MT8195, ctx->param, aal.subfrms[index].clip_ofst); in config_aal_subfrm()
1276 reg = CFG_COMP(MT8195, ctx->param, aal.subfrms[index].clip); in config_aal_subfrm()
1310 reg = CFG_COMP(MT8195, ctx->param, hdr.top); in config_hdr_frame()
1314 reg = CFG_COMP(MT8195, ctx->param, hdr.relay); in config_hdr_frame()
1328 reg = CFG_COMP(MT8195, ctx->param, hdr.subfrms[index].win_size); in config_hdr_subfrm()
1333 reg = CFG_COMP(MT8195, ctx->param, hdr.subfrms[index].src); in config_hdr_subfrm()
1337 reg = CFG_COMP(MT8195, ctx->param, hdr.subfrms[index].clip_ofst0); in config_hdr_subfrm()
1341 reg = CFG_COMP(MT8195, ctx->param, hdr.subfrms[index].clip_ofst1); in config_hdr_subfrm()
1345 reg = CFG_COMP(MT8195, ctx->param, hdr.subfrms[index].hist_ctrl_0); in config_hdr_subfrm()
1349 reg = CFG_COMP(MT8195, ctx->param, hdr.subfrms[index].hist_ctrl_1); in config_hdr_subfrm()
1353 reg = CFG_COMP(MT8195, ctx->param, hdr.subfrms[index].hdr_top); in config_hdr_subfrm()
1358 reg = CFG_COMP(MT8195, ctx->param, hdr.subfrms[index].hist_addr); in config_hdr_subfrm()
1391 reg = CFG_COMP(MT8195, ctx->param, fg.ctrl_0); in config_fg_frame()
1395 reg = CFG_COMP(MT8195, ctx->param, fg.ck_en); in config_fg_frame()
1409 reg = CFG_COMP(MT8195, ctx->param, fg.subfrms[index].info_0); in config_fg_subfrm()
1413 reg = CFG_COMP(MT8195, ctx->param, fg.subfrms[index].info_1); in config_fg_subfrm()
1452 reg = CFG_COMP(MT8195, ctx->param, ovl.L0_con); in config_ovl_frame()
1456 reg = CFG_COMP(MT8195, ctx->param, ovl.src_con); in config_ovl_frame()
1470 reg = CFG_COMP(MT8195, ctx->param, ovl.subfrms[index].L0_src_size); in config_ovl_subfrm()
1476 reg = CFG_COMP(MT8195, ctx->param, ovl.subfrms[index].roi_size); in config_ovl_subfrm()
1514 reg = CFG_COMP(MT8195, ctx->param, pad.subfrms[index].pic_size); in config_pad_subfrm()
2037 arg = CFG_COMP(MT8183, param, type); in mdp_comp_ctx_config()
2039 arg = CFG_COMP(MT8195, param, type); in mdp_comp_ctx_config()
2056 arg = CFG_COMP(MT8183, param, input); in mdp_comp_ctx_config()
2058 arg = CFG_COMP(MT8195, param, input); in mdp_comp_ctx_config()
2063 idx = CFG_COMP(MT8183, param, num_outputs); in mdp_comp_ctx_config()
2065 idx = CFG_COMP(MT8195, param, num_outputs); in mdp_comp_ctx_config()
2070 arg = CFG_COMP(MT8183, param, outputs[i]); in mdp_comp_ctx_config()
2072 arg = CFG_COMP(MT8195, param, outputs[i]); in mdp_comp_ctx_config()