Lines Matching full:param
116 reg = CFG_COMP(MT8183, ctx->param, rdma.src_ctrl);
118 reg = CFG_COMP(MT8195, ctx->param, rdma.src_ctrl);
125 reg = CFG_COMP(MT8183, ctx->param, rdma.ufo_dec_y);
127 reg = CFG_COMP(MT8195, ctx->param, rdma.ufo_dec_y);
132 reg = CFG_COMP(MT8183, ctx->param, rdma.ufo_dec_c);
134 reg = CFG_COMP(MT8195, ctx->param, rdma.ufo_dec_c);
141 reg = CFG_COMP(MT8183, ctx->param, rdma.mf_bkgd_in_pxl);
143 reg = CFG_COMP(MT8195, ctx->param, rdma.mf_bkgd_in_pxl);
151 reg = CFG_COMP(MT8183, ctx->param, rdma.control);
154 reg = CFG_COMP(MT8195, ctx->param, rdma.control);
161 reg = CFG_COMP(MT8183, ctx->param, rdma.iova[0]);
163 reg = CFG_COMP(MT8195, ctx->param, rdma.iova[0]);
167 reg = CFG_COMP(MT8183, ctx->param, rdma.iova[1]);
169 reg = CFG_COMP(MT8195, ctx->param, rdma.iova[1]);
173 reg = CFG_COMP(MT8183, ctx->param, rdma.iova[2]);
175 reg = CFG_COMP(MT8195, ctx->param, rdma.iova[2]);
180 reg = CFG_COMP(MT8183, ctx->param, rdma.iova_end[0]);
182 reg = CFG_COMP(MT8195, ctx->param, rdma.iova_end[0]);
186 reg = CFG_COMP(MT8183, ctx->param, rdma.iova_end[1]);
188 reg = CFG_COMP(MT8195, ctx->param, rdma.iova_end[1]);
192 reg = CFG_COMP(MT8183, ctx->param, rdma.iova_end[2]);
194 reg = CFG_COMP(MT8195, ctx->param, rdma.iova_end[2]);
199 reg = CFG_COMP(MT8183, ctx->param, rdma.mf_bkgd);
201 reg = CFG_COMP(MT8195, ctx->param, rdma.mf_bkgd);
206 reg = CFG_COMP(MT8183, ctx->param, rdma.sf_bkgd);
208 reg = CFG_COMP(MT8195, ctx->param, rdma.sf_bkgd);
214 reg = CFG_COMP(MT8183, ctx->param, rdma.transform);
216 reg = CFG_COMP(MT8195, ctx->param, rdma.transform);
224 reg = CFG_COMP(MT8195, ctx->param, rdma.dmabuf_con0);
229 reg = CFG_COMP(MT8195, ctx->param, rdma.ultra_th_high_con0);
234 reg = CFG_COMP(MT8195, ctx->param, rdma.ultra_th_low_con0);
239 reg = CFG_COMP(MT8195, ctx->param, rdma.dmabuf_con1);
244 reg = CFG_COMP(MT8195, ctx->param, rdma.ultra_th_high_con1);
249 reg = CFG_COMP(MT8195, ctx->param, rdma.ultra_th_low_con1);
254 reg = CFG_COMP(MT8195, ctx->param, rdma.dmabuf_con2);
259 reg = CFG_COMP(MT8195, ctx->param, rdma.ultra_th_high_con2);
264 reg = CFG_COMP(MT8195, ctx->param, rdma.ultra_th_low_con2);
269 reg = CFG_COMP(MT8195, ctx->param, rdma.dmabuf_con3);
294 reg = CFG_COMP(MT8183, ctx->param, rdma.subfrms[index].offset[0]);
296 reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].offset[0]);
303 reg = CFG_COMP(MT8183, ctx->param, rdma.subfrms[index].offset_0_p);
305 reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].offset_0_p);
313 reg = CFG_COMP(MT8183, ctx->param, rdma.subfrms[index].offset[1]);
315 reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].offset[1]);
320 reg = CFG_COMP(MT8183, ctx->param, rdma.subfrms[index].offset[2]);
322 reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].offset[2]);
327 reg = CFG_COMP(MT8183, ctx->param, rdma.subfrms[index].src);
329 reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].src);
335 reg = CFG_COMP(MT8183, ctx->param, rdma.subfrms[index].clip);
337 reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].clip);
343 reg = CFG_COMP(MT8183, ctx->param, rdma.subfrms[index].clip_ofst);
345 reg = CFG_COMP(MT8195, ctx->param, rdma.subfrms[index].clip_ofst);
350 csf_l = CFG_COMP(MT8183, ctx->param, subfrms[index].in.left);
351 csf_r = CFG_COMP(MT8183, ctx->param, subfrms[index].in.right);
353 csf_l = CFG_COMP(MT8195, ctx->param, subfrms[index].in.left);
354 csf_r = CFG_COMP(MT8195, ctx->param, subfrms[index].in.right);
429 bypass = CFG_COMP(MT8183, ctx->param, frame.bypass);
431 bypass = CFG_COMP(MT8195, ctx->param, frame.bypass);
440 reg = CFG_COMP(MT8183, ctx->param, rsz.control1);
442 reg = CFG_COMP(MT8195, ctx->param, rsz.control1);
446 reg = CFG_COMP(MT8183, ctx->param, rsz.control2);
448 reg = CFG_COMP(MT8195, ctx->param, rsz.control2);
452 reg = CFG_COMP(MT8183, ctx->param, rsz.coeff_step_x);
454 reg = CFG_COMP(MT8195, ctx->param, rsz.coeff_step_x);
459 reg = CFG_COMP(MT8183, ctx->param, rsz.coeff_step_y);
461 reg = CFG_COMP(MT8195, ctx->param, rsz.coeff_step_y);
479 reg = CFG_COMP(MT8183, ctx->param, rsz.subfrms[index].control2);
481 reg = CFG_COMP(MT8195, ctx->param, rsz.subfrms[index].control2);
485 reg = CFG_COMP(MT8183, ctx->param, rsz.subfrms[index].src);
487 reg = CFG_COMP(MT8195, ctx->param, rsz.subfrms[index].src);
491 csf_l = CFG_COMP(MT8183, ctx->param, subfrms[index].in.left);
492 csf_r = CFG_COMP(MT8183, ctx->param, subfrms[index].in.right);
494 csf_l = CFG_COMP(MT8195, ctx->param, subfrms[index].in.left);
495 csf_r = CFG_COMP(MT8195, ctx->param, subfrms[index].in.right);
503 reg = CFG_COMP(MT8183, ctx->param, subfrms[index].luma.left);
505 reg = CFG_COMP(MT8195, ctx->param, subfrms[index].luma.left);
510 reg = CFG_COMP(MT8183, ctx->param, subfrms[index].luma.left_subpix);
512 reg = CFG_COMP(MT8195, ctx->param, subfrms[index].luma.left_subpix);
517 reg = CFG_COMP(MT8183, ctx->param, subfrms[index].luma.top);
519 reg = CFG_COMP(MT8195, ctx->param, subfrms[index].luma.top);
524 reg = CFG_COMP(MT8183, ctx->param, subfrms[index].luma.top_subpix);
526 reg = CFG_COMP(MT8195, ctx->param, subfrms[index].luma.top_subpix);
531 reg = CFG_COMP(MT8183, ctx->param, subfrms[index].chroma.left);
533 reg = CFG_COMP(MT8195, ctx->param, subfrms[index].chroma.left);
538 reg = CFG_COMP(MT8183, ctx->param, subfrms[index].chroma.left_subpix);
540 reg = CFG_COMP(MT8195, ctx->param, subfrms[index].chroma.left_subpix);
545 reg = CFG_COMP(MT8183, ctx->param, rsz.subfrms[index].clip);
547 reg = CFG_COMP(MT8195, ctx->param, rsz.subfrms[index].clip);
568 reg = CFG_COMP(MT8195, ctx->param, rsz.subfrms[index].rsz_switch);
575 reg = CFG_COMP(MT8195, ctx->param, rsz.subfrms[index].merge_cfg);
607 csf_l = CFG_COMP(MT8183, ctx->param, subfrms[index].in.left);
608 csf_r = CFG_COMP(MT8183, ctx->param, subfrms[index].in.right);
610 csf_l = CFG_COMP(MT8195, ctx->param, subfrms[index].in.left);
611 csf_r = CFG_COMP(MT8195, ctx->param, subfrms[index].in.right);
659 reg = CFG_COMP(MT8183, ctx->param, wrot.iova[0]);
661 reg = CFG_COMP(MT8195, ctx->param, wrot.iova[0]);
665 reg = CFG_COMP(MT8183, ctx->param, wrot.iova[1]);
667 reg = CFG_COMP(MT8195, ctx->param, wrot.iova[1]);
671 reg = CFG_COMP(MT8183, ctx->param, wrot.iova[2]);
673 reg = CFG_COMP(MT8195, ctx->param, wrot.iova[2]);
678 reg = CFG_COMP(MT8195, ctx->param, wrot.scan_10bit);
683 reg = CFG_COMP(MT8195, ctx->param, wrot.pending_zero);
689 reg = CFG_COMP(MT8195, ctx->param, wrot.bit_number);
696 reg = CFG_COMP(MT8183, ctx->param, wrot.control);
698 reg = CFG_COMP(MT8195, ctx->param, wrot.control);
703 reg = CFG_COMP(MT8195, ctx->param, wrot.pre_ultra);
710 reg = CFG_COMP(MT8183, ctx->param, wrot.stride[0]);
712 reg = CFG_COMP(MT8195, ctx->param, wrot.stride[0]);
717 reg = CFG_COMP(MT8183, ctx->param, wrot.stride[1]);
719 reg = CFG_COMP(MT8195, ctx->param, wrot.stride[1]);
723 reg = CFG_COMP(MT8183, ctx->param, wrot.stride[2]);
725 reg = CFG_COMP(MT8195, ctx->param, wrot.stride[2]);
730 reg = CFG_COMP(MT8183, ctx->param, wrot.mat_ctrl);
732 reg = CFG_COMP(MT8195, ctx->param, wrot.mat_ctrl);
744 reg = CFG_COMP(MT8183, ctx->param, wrot.fifo_test);
746 reg = CFG_COMP(MT8195, ctx->param, wrot.fifo_test);
755 reg = CFG_COMP(MT8183, ctx->param, wrot.filter);
757 reg = CFG_COMP(MT8195, ctx->param, wrot.filter);
779 reg = CFG_COMP(MT8183, ctx->param, wrot.subfrms[index].offset[0]);
781 reg = CFG_COMP(MT8195, ctx->param, wrot.subfrms[index].offset[0]);
786 reg = CFG_COMP(MT8183, ctx->param, wrot.subfrms[index].offset[1]);
788 reg = CFG_COMP(MT8195, ctx->param, wrot.subfrms[index].offset[1]);
793 reg = CFG_COMP(MT8183, ctx->param, wrot.subfrms[index].offset[2]);
795 reg = CFG_COMP(MT8195, ctx->param, wrot.subfrms[index].offset[2]);
801 reg = CFG_COMP(MT8183, ctx->param, wrot.subfrms[index].src);
803 reg = CFG_COMP(MT8195, ctx->param, wrot.subfrms[index].src);
808 reg = CFG_COMP(MT8183, ctx->param, wrot.subfrms[index].clip);
810 reg = CFG_COMP(MT8195, ctx->param, wrot.subfrms[index].clip);
814 reg = CFG_COMP(MT8183, ctx->param, wrot.subfrms[index].clip_ofst);
816 reg = CFG_COMP(MT8195, ctx->param, wrot.subfrms[index].clip_ofst);
820 reg = CFG_COMP(MT8183, ctx->param, wrot.subfrms[index].main_buf);
822 reg = CFG_COMP(MT8195, ctx->param, wrot.subfrms[index].main_buf);
891 reg = CFG_COMP(MT8183, ctx->param, wdma.wdma_cfg);
895 reg = CFG_COMP(MT8183, ctx->param, wdma.iova[0]);
898 reg = CFG_COMP(MT8183, ctx->param, wdma.iova[1]);
901 reg = CFG_COMP(MT8183, ctx->param, wdma.iova[2]);
905 reg = CFG_COMP(MT8183, ctx->param, wdma.w_in_byte);
910 reg = CFG_COMP(MT8183, ctx->param, wdma.uv_stride);
929 reg = CFG_COMP(MT8183, ctx->param, wdma.subfrms[index].offset[0]);
934 reg = CFG_COMP(MT8183, ctx->param, wdma.subfrms[index].offset[1]);
939 reg = CFG_COMP(MT8183, ctx->param, wdma.subfrms[index].offset[2]);
944 reg = CFG_COMP(MT8183, ctx->param, wdma.subfrms[index].src);
948 reg = CFG_COMP(MT8183, ctx->param, wdma.subfrms[index].clip);
952 reg = CFG_COMP(MT8183, ctx->param, wdma.subfrms[index].clip_ofst);
1030 reg = CFG_COMP(MT8195, ctx->param, tdshp.cfg);
1044 reg = CFG_COMP(MT8195, ctx->param, tdshp.subfrms[index].src);
1048 reg = CFG_COMP(MT8195, ctx->param, tdshp.subfrms[index].clip_ofst);
1053 reg = CFG_COMP(MT8195, ctx->param, tdshp.subfrms[index].clip);
1057 reg = CFG_COMP(MT8195, ctx->param, tdshp.subfrms[index].hist_cfg_0);
1061 reg = CFG_COMP(MT8195, ctx->param, tdshp.subfrms[index].hist_cfg_1);
1105 reg = CFG_COMP(MT8195, ctx->param, color.start);
1119 reg = CFG_COMP(MT8195, ctx->param, color.subfrms[index].in_hsize);
1124 reg = CFG_COMP(MT8195, ctx->param, color.subfrms[index].in_vsize);
1160 csf_l = CFG_COMP(MT8183, ctx->param, subfrms[index].in.left);
1161 csf_r = CFG_COMP(MT8183, ctx->param, subfrms[index].in.right);
1162 csf_t = CFG_COMP(MT8183, ctx->param, subfrms[index].in.top);
1163 csf_b = CFG_COMP(MT8183, ctx->param, subfrms[index].in.bottom);
1199 reg = CFG_COMP(MT8195, ctx->param, aal.cfg_main);
1203 reg = CFG_COMP(MT8195, ctx->param, aal.cfg);
1217 reg = CFG_COMP(MT8195, ctx->param, aal.subfrms[index].src);
1221 reg = CFG_COMP(MT8195, ctx->param, aal.subfrms[index].clip_ofst);
1226 reg = CFG_COMP(MT8195, ctx->param, aal.subfrms[index].clip);
1259 reg = CFG_COMP(MT8195, ctx->param, hdr.top);
1263 reg = CFG_COMP(MT8195, ctx->param, hdr.relay);
1277 reg = CFG_COMP(MT8195, ctx->param, hdr.subfrms[index].win_size);
1281 reg = CFG_COMP(MT8195, ctx->param, hdr.subfrms[index].src);
1285 reg = CFG_COMP(MT8195, ctx->param, hdr.subfrms[index].clip_ofst0);
1289 reg = CFG_COMP(MT8195, ctx->param, hdr.subfrms[index].clip_ofst1);
1293 reg = CFG_COMP(MT8195, ctx->param, hdr.subfrms[index].hist_ctrl_0);
1297 reg = CFG_COMP(MT8195, ctx->param, hdr.subfrms[index].hist_ctrl_1);
1301 reg = CFG_COMP(MT8195, ctx->param, hdr.subfrms[index].hdr_top);
1306 reg = CFG_COMP(MT8195, ctx->param, hdr.subfrms[index].hist_addr);
1339 reg = CFG_COMP(MT8195, ctx->param, fg.ctrl_0);
1343 reg = CFG_COMP(MT8195, ctx->param, fg.ck_en);
1357 reg = CFG_COMP(MT8195, ctx->param, fg.subfrms[index].info_0);
1361 reg = CFG_COMP(MT8195, ctx->param, fg.subfrms[index].info_1);
1397 reg = CFG_COMP(MT8195, ctx->param, ovl.L0_con);
1401 reg = CFG_COMP(MT8195, ctx->param, ovl.src_con);
1415 reg = CFG_COMP(MT8195, ctx->param, ovl.subfrms[index].L0_src_size);
1420 reg = CFG_COMP(MT8195, ctx->param, ovl.subfrms[index].roi_size);
1454 reg = CFG_COMP(MT8195, ctx->param, pad.subfrms[index].pic_size);
1962 const struct img_compparam *param,
1970 if (!param) {
1971 dev_err(dev, "Invalid component param");
1976 arg = CFG_COMP(MT8183, param, type);
1978 arg = CFG_COMP(MT8195, param, type);
1993 ctx->param = param;
1995 arg = CFG_COMP(MT8183, param, input);
1997 arg = CFG_COMP(MT8195, param, input);
2002 idx = CFG_COMP(MT8183, param, num_outputs);
2004 idx = CFG_COMP(MT8195, param, num_outputs);
2009 arg = CFG_COMP(MT8183, param, outputs[i]);
2011 arg = CFG_COMP(MT8195, param, outputs[i]);