63 static inline u32 settings_get_mcu_codec(struct create_channel_param *param)  in settings_get_mcu_codec()  argument
65 	enum mcu_msg_version version = param->version;  in settings_get_mcu_codec()
66 	u32 pixelformat = param->codec;  in settings_get_mcu_codec()
88 allegro_encode_config_blob(u32 *dst, struct create_channel_param *param)  in allegro_encode_config_blob()  argument
90 	enum mcu_msg_version version = param->version;  in allegro_encode_config_blob()
94 	unsigned int codec = settings_get_mcu_codec(param);  in allegro_encode_config_blob()
97 		dst[i++] = param->layer_id;  in allegro_encode_config_blob()
98 	dst[i++] = FIELD_PREP(GENMASK(31, 16), param->height) |  in allegro_encode_config_blob()
99 		   FIELD_PREP(GENMASK(15, 0), param->width);  in allegro_encode_config_blob()
101 		dst[i++] = param->videomode;  in allegro_encode_config_blob()
102 	dst[i++] = param->format;  in allegro_encode_config_blob()
104 		dst[i++] = param->colorspace;  in allegro_encode_config_blob()
105 	dst[i++] = param->src_mode;  in allegro_encode_config_blob()
107 		dst[i++] = param->src_bit_depth;  in allegro_encode_config_blob()
109 		   FIELD_PREP(GENMASK(23, 8), param->constraint_set_flags) |  in allegro_encode_config_blob()
110 		   FIELD_PREP(GENMASK(7, 0), param->profile);  in allegro_encode_config_blob()
111 	dst[i++] = FIELD_PREP(GENMASK(31, 16), param->tier) |  in allegro_encode_config_blob()
112 		   FIELD_PREP(GENMASK(15, 0), param->level);  in allegro_encode_config_blob()
115 	val |= param->temporal_mvp_enable ? BIT(20) : 0;  in allegro_encode_config_blob()
116 	val |= FIELD_PREP(GENMASK(7, 4), param->log2_max_frame_num);  in allegro_encode_config_blob()
118 		val |= FIELD_PREP(GENMASK(3, 0), param->log2_max_poc - 1);  in allegro_encode_config_blob()
120 		val |= FIELD_PREP(GENMASK(3, 0), param->log2_max_poc);  in allegro_encode_config_blob()
124 	val |= param->enable_reordering ? BIT(0) : 0;  in allegro_encode_config_blob()
125 	val |= param->dbf_ovr_en ? BIT(2) : 0;  in allegro_encode_config_blob()
126 	val |= param->override_lf ? BIT(12) : 0;  in allegro_encode_config_blob()
131 		val |= param->custom_lda ? BIT(2) : 0;  in allegro_encode_config_blob()
132 		val |= param->rdo_cost_mode ? BIT(20) : 0;  in allegro_encode_config_blob()
136 		val |= param->lf ? BIT(2) : 0;  in allegro_encode_config_blob()
137 		val |= param->lf_x_tile ? BIT(3) : 0;  in allegro_encode_config_blob()
138 		val |= param->lf_x_slice ? BIT(4) : 0;  in allegro_encode_config_blob()
145 	dst[i++] = FIELD_PREP(GENMASK(15, 8), param->beta_offset) |  in allegro_encode_config_blob()
146 		   FIELD_PREP(GENMASK(7, 0), param->tc_offset);  in allegro_encode_config_blob()
147 	dst[i++] = param->unknown11;  in allegro_encode_config_blob()
148 	dst[i++] = param->unknown12;  in allegro_encode_config_blob()
149 	dst[i++] = param->num_slices;  in allegro_encode_config_blob()
150 	dst[i++] = param->encoder_buffer_offset;  in allegro_encode_config_blob()
151 	dst[i++] = param->encoder_buffer_enabled;  in allegro_encode_config_blob()
153 	dst[i++] = FIELD_PREP(GENMASK(31, 16), param->clip_vrt_range) |  in allegro_encode_config_blob()
154 		   FIELD_PREP(GENMASK(15, 0), param->clip_hrz_range);  in allegro_encode_config_blob()
155 	dst[i++] = FIELD_PREP(GENMASK(31, 16), param->me_range[1]) |  in allegro_encode_config_blob()
156 		   FIELD_PREP(GENMASK(15, 0), param->me_range[0]);  in allegro_encode_config_blob()
157 	dst[i++] = FIELD_PREP(GENMASK(31, 16), param->me_range[3]) |  in allegro_encode_config_blob()
158 		   FIELD_PREP(GENMASK(15, 0), param->me_range[2]);  in allegro_encode_config_blob()
159 	dst[i++] = FIELD_PREP(GENMASK(31, 24), param->min_tu_size) |  in allegro_encode_config_blob()
160 		   FIELD_PREP(GENMASK(23, 16), param->max_tu_size) |  in allegro_encode_config_blob()
161 		   FIELD_PREP(GENMASK(15, 8), param->min_cu_size) |  in allegro_encode_config_blob()
162 		   FIELD_PREP(GENMASK(8, 0), param->max_cu_size);  in allegro_encode_config_blob()
163 	dst[i++] = FIELD_PREP(GENMASK(15, 8), param->max_transfo_depth_intra) |  in allegro_encode_config_blob()
164 		   FIELD_PREP(GENMASK(7, 0), param->max_transfo_depth_inter);  in allegro_encode_config_blob()
165 	dst[i++] = param->entropy_mode;  in allegro_encode_config_blob()
166 	dst[i++] = param->wp_mode;  in allegro_encode_config_blob()
168 	dst[i++] = param->rate_control_mode;  in allegro_encode_config_blob()
169 	dst[i++] = param->initial_rem_delay;  in allegro_encode_config_blob()
170 	dst[i++] = param->cpb_size;  in allegro_encode_config_blob()
171 	dst[i++] = FIELD_PREP(GENMASK(31, 16), param->clk_ratio) |  in allegro_encode_config_blob()
172 		   FIELD_PREP(GENMASK(15, 0), param->framerate);  in allegro_encode_config_blob()
173 	dst[i++] = param->target_bitrate;  in allegro_encode_config_blob()
174 	dst[i++] = param->max_bitrate;  in allegro_encode_config_blob()
175 	dst[i++] = FIELD_PREP(GENMASK(31, 16), param->min_qp) |  in allegro_encode_config_blob()
176 		   FIELD_PREP(GENMASK(15, 0), param->initial_qp);  in allegro_encode_config_blob()
177 	dst[i++] = FIELD_PREP(GENMASK(31, 16), param->ip_delta) |  in allegro_encode_config_blob()
178 		   FIELD_PREP(GENMASK(15, 0), param->max_qp);  in allegro_encode_config_blob()
179 	dst[i++] = FIELD_PREP(GENMASK(31, 16), param->golden_ref) |  in allegro_encode_config_blob()
180 		   FIELD_PREP(GENMASK(15, 0), param->pb_delta);  in allegro_encode_config_blob()
181 	dst[i++] = FIELD_PREP(GENMASK(31, 16), param->golden_ref_frequency) |  in allegro_encode_config_blob()
182 		   FIELD_PREP(GENMASK(15, 0), param->golden_delta);  in allegro_encode_config_blob()
184 		dst[i++] = param->rate_control_option;  in allegro_encode_config_blob()
189 		dst[i++] = param->num_pixel;  in allegro_encode_config_blob()
190 		dst[i++] = FIELD_PREP(GENMASK(31, 16), param->max_pixel_value) |  in allegro_encode_config_blob()
191 			FIELD_PREP(GENMASK(15, 0), param->max_psnr);  in allegro_encode_config_blob()
193 			dst[i++] = param->maxpicturesize[j];  in allegro_encode_config_blob()
197 		dst[i++] = param->gop_ctrl_mode;  in allegro_encode_config_blob()
202 		dst[i++] = FIELD_PREP(GENMASK(31, 24), param->freq_golden_ref) |  in allegro_encode_config_blob()
203 			   FIELD_PREP(GENMASK(23, 16), param->num_b) |  in allegro_encode_config_blob()
204 			   FIELD_PREP(GENMASK(15, 0), param->gop_length);  in allegro_encode_config_blob()
205 	dst[i++] = param->freq_idr;  in allegro_encode_config_blob()
207 		dst[i++] = param->enable_lt;  in allegro_encode_config_blob()
208 	dst[i++] = param->freq_lt;  in allegro_encode_config_blob()
209 	dst[i++] = param->gdr_mode;  in allegro_encode_config_blob()
211 		dst[i++] = FIELD_PREP(GENMASK(31, 24), param->freq_golden_ref) |  in allegro_encode_config_blob()
212 			   FIELD_PREP(GENMASK(23, 16), param->num_b) |  in allegro_encode_config_blob()
213 			   FIELD_PREP(GENMASK(15, 0), param->gop_length);  in allegro_encode_config_blob()
216 		dst[i++] = param->tmpdqp;  in allegro_encode_config_blob()
218 	dst[i++] = param->subframe_latency;  in allegro_encode_config_blob()
219 	dst[i++] = param->lda_control_mode;  in allegro_encode_config_blob()
221 		dst[i++] = param->unknown41;  in allegro_encode_config_blob()
225 			dst[i++] = param->lda_factors[j];  in allegro_encode_config_blob()
226 		dst[i++] = param->max_num_merge_cand;  in allegro_encode_config_blob()
253 ssize_t allegro_decode_config_blob(struct create_channel_param *param,  in allegro_decode_config_blob()  argument
260 		param->num_ref_idx_l0 = FIELD_GET(GENMASK(7, 4), src[9]);  in allegro_decode_config_blob()
261 		param->num_ref_idx_l1 = FIELD_GET(GENMASK(11, 8), src[9]);  in allegro_decode_config_blob()
263 		param->num_ref_idx_l0 = msg->num_ref_idx_l0;  in allegro_decode_config_blob()
264 		param->num_ref_idx_l1 = msg->num_ref_idx_l1;  in allegro_decode_config_blob()