131 			I2C_BOARD_INFO(TC90522_I2C_DEV_SAT, 0x1b),
134 			I2C_BOARD_INFO("qm1d1b0004", 0x60),
139 			I2C_BOARD_INFO(TC90522_I2C_DEV_TER, 0x1a),
142 			I2C_BOARD_INFO("tda665x_earthpt1", 0x61),
147 			I2C_BOARD_INFO(TC90522_I2C_DEV_SAT, 0x19),
150 			I2C_BOARD_INFO("qm1d1b0004", 0x60),
155 			I2C_BOARD_INFO(TC90522_I2C_DEV_TER, 0x18),
158 			I2C_BOARD_INFO("tda665x_earthpt1", 0x61),
164 	{0x04, 0x02}, {0x0d, 0x55}, {0x11, 0x40}, {0x13, 0x80}, {0x17, 0x01},
165 	{0x1c, 0x0a}, {0x1d, 0xaa}, {0x1e, 0x20}, {0x1f, 0x88}, {0x51, 0xb0},
166 	{0x52, 0x89}, {0x53, 0xb3}, {0x5a, 0x2d}, {0x5b, 0xd3}, {0x85, 0x69},
167 	{0x87, 0x04}, {0x8e, 0x02}, {0xa3, 0xf7}, {0xa5, 0xc0},
171 	{0x04, 0x02}, {0x11, 0x40}, {0x13, 0x80}, {0x17, 0x01}, {0x1c, 0x0a},
172 	{0x1d, 0xaa}, {0x1e, 0x20}, {0x1f, 0x88}, {0x51, 0xb0}, {0x52, 0x89},
173 	{0x53, 0xb3}, {0x5a, 0x2d}, {0x5b, 0xd3}, {0x85, 0x69}, {0x87, 0x04},
174 	{0x8e, 0x26}, {0xa3, 0xf7}, {0xa5, 0xc0},
178 	{0x03, 0x90}, {0x14, 0x8f}, {0x1c, 0x2a}, {0x1d, 0xa8}, {0x1e, 0xa2},
179 	{0x22, 0x83}, {0x31, 0x0d}, {0x32, 0xe0}, {0x39, 0xd3}, {0x3a, 0x00},
180 	{0x3b, 0x11}, {0x3c, 0x3f},
181 	{0x5c, 0x40}, {0x5f, 0x80}, {0x75, 0x02}, {0x76, 0x4e}, {0x77, 0x03},
182 	{0xef, 0x01}
186 	{0x03, 0x90}, {0x1c, 0x2a}, {0x1d, 0xa8}, {0x1e, 0xa2}, {0x22, 0x83},
187 	{0x3a, 0x04}, {0x3b, 0x11}, {0x3c, 0x3f}, {0x5c, 0x40}, {0x5f, 0x80},
188 	{0x75, 0x0a}, {0x76, 0x4c}, {0x77, 0x03}, {0xef, 0x01}
204 		wbuf = 0x07;  in config_demod()
205 		msg[0].addr = cl->addr;  in config_demod()
206 		msg[0].flags = 0;  in config_demod()
207 		msg[0].len = 1;  in config_demod()
208 		msg[0].buf = &wbuf;  in config_demod()
215 		if (ret < 0)  in config_demod()
217 		if (rbuf != 0x41)  in config_demod()
240 	for (i = 0; i < len; i++) {  in config_demod()
242 		if (ret < 0)  in config_demod()
245 	return 0;  in config_demod()
257 	u8 buf[2] = {0x01, 0x80};  in pt1_demod_block_init()
262 	for (i = 0; i < PT1_NR_ADAPS; i++) {  in pt1_demod_block_init()
269 		if (ret < 0)  in pt1_demod_block_init()
274 	for (i = 0; i < PT1_NR_ADAPS; i++) {  in pt1_demod_block_init()
281 		if (ret < 0)  in pt1_demod_block_init()
285 	return 0;  in pt1_demod_block_init()
299 module_param_named(nr_tables, pt1_nr_tables, uint, 0);
303 	pt1_write_reg(pt1, 0, 0x00000020);  in pt1_increment_table_count()
308 	pt1_write_reg(pt1, 0, 0x00000010);  in pt1_init_table_count()
314 	pt1_write_reg(pt1, 0, 0x0c000040);  in pt1_register_tables()
319 	pt1_write_reg(pt1, 0, 0x08080000);  in pt1_unregister_tables()
325 	for (i = 0; i < 57; i++) {  in pt1_sync()
326 		if (pt1_read_reg(pt1, 0) & 0x20000000)  in pt1_sync()
327 			return 0;  in pt1_sync()
328 		pt1_write_reg(pt1, 0, 0x00000008);  in pt1_sync()
337 	u64 id = 0;  in pt1_identify()
338 	for (i = 0; i < 57; i++) {  in pt1_identify()
339 		id |= (u64)(pt1_read_reg(pt1, 0) >> 30 & 1) << i;  in pt1_identify()
340 		pt1_write_reg(pt1, 0, 0x00000008);  in pt1_identify()
348 	pt1_write_reg(pt1, 0, 0x00000008);  in pt1_unlock()
349 	for (i = 0; i < 3; i++) {  in pt1_unlock()
350 		if (pt1_read_reg(pt1, 0) & 0x80000000)  in pt1_unlock()
351 			return 0;  in pt1_unlock()
361 	pt1_write_reg(pt1, 0, 0x01010000);  in pt1_reset_pci()
362 	pt1_write_reg(pt1, 0, 0x01000000);  in pt1_reset_pci()
363 	for (i = 0; i < 10; i++) {  in pt1_reset_pci()
364 		if (pt1_read_reg(pt1, 0) & 0x00000001)  in pt1_reset_pci()
365 			return 0;  in pt1_reset_pci()
375 	pt1_write_reg(pt1, 0, 0x02020000);  in pt1_reset_ram()
376 	pt1_write_reg(pt1, 0, 0x02000000);  in pt1_reset_ram()
377 	for (i = 0; i < 10; i++) {  in pt1_reset_ram()
378 		if (pt1_read_reg(pt1, 0) & 0x00000002)  in pt1_reset_ram()
379 			return 0;  in pt1_reset_ram()
390 	status = pt1_read_reg(pt1, 0) & 0x00000004;  in pt1_do_enable_ram()
391 	pt1_write_reg(pt1, 0, 0x00000002);  in pt1_do_enable_ram()
392 	for (i = 0; i < 10; i++) {  in pt1_do_enable_ram()
393 		for (j = 0; j < 1024; j++) {  in pt1_do_enable_ram()
394 			if ((pt1_read_reg(pt1, 0) & 0x00000004) != status)  in pt1_do_enable_ram()
395 				return 0;  in pt1_do_enable_ram()
408 	phase = pt1->pdev->device == 0x211a ? 128 : 166;  in pt1_enable_ram()
409 	for (i = 0; i < phase; i++) {  in pt1_enable_ram()
411 		if (ret < 0)  in pt1_enable_ram()
414 	return 0;  in pt1_enable_ram()
419 	pt1_write_reg(pt1, 0, 0x0b0b0000);  in pt1_disable_ram()
430 	for (i = 0; i < PT1_NR_ADAPS; i++)  in pt1_init_streams()
431 		pt1_set_stream(pt1, i, 0);  in pt1_init_streams()
445 		return 0;  in pt1_filter()
447 	for (i = 0; i < PT1_NR_UPACKETS; i++) {  in pt1_filter()
450 		if (index < 0 || index >=  PT1_NR_ADAPS)  in pt1_filter()
455 			adap->upacket_count = 0;  in pt1_filter()
462 		sc = upacket >> 26 & 0x7;  in pt1_filter()
463 		if (adap->st_count != -1 && sc != ((adap->st_count + 1) & 0x7))  in pt1_filter()
476 			adap->upacket_count = 0;  in pt1_filter()
479 				adap->packet_count = 0;  in pt1_filter()
484 	page->upackets[PT1_NR_UPACKETS - 1] = 0;  in pt1_filter()
504 			for (i = 0; i < PT1_NR_ADAPS; i++)  in pt1_thread()
512 			delay = ktime_set(0, PT1_FETCH_DELAY * NSEC_PER_MSEC);  in pt1_thread()
522 			pt1->buf_index = 0;  in pt1_thread()
524 				pt1->table_index = 0;  in pt1_thread()
528 	return 0;  in pt1_thread()
569 	page->upackets[PT1_NR_UPACKETS - 1] = 0;  in pt1_init_buffer()
573 	return 0;  in pt1_init_buffer()
580 	for (i = 0; i < PT1_NR_BUFS; i++)  in pt1_cleanup_table()
598 	for (i = 0; i < PT1_NR_BUFS; i++) {  in pt1_init_table()
600 		if (ret < 0)  in pt1_init_table()
609 	return 0;  in pt1_init_table()
627 	for (i = 0; i < pt1_nr_tables; i++)  in pt1_cleanup_tables()
640 		return 0;  in pt1_init_tables()
648 	i = 0;  in pt1_init_tables()
649 	ret = pt1_init_table(pt1, &tables[0], &first_pfn);  in pt1_init_tables()
666 	return 0;  in pt1_init_tables()
678 	int ret = 0;  in pt1_start_polling()
704 	return 0;  in pt1_start_feed()
712 	for (i = 0, count = 0; i < PT1_NR_ADAPS; i++)  in pt1_stop_polling()
715 	if (count == 0 && pt1->kthread) {  in pt1_stop_polling()
727 		pt1_set_stream(adap->pt1, adap->index, 0);  in pt1_stop_feed()
730 	return 0;  in pt1_stop_feed()
748 	for (i = 0; i < PT1_NR_ADAPS; i++) {  in pt1_update_power()
779 		return 0;  in pt1_set_voltage()
789 	ret = 0;  in pt1_sleep()
804 	adap->sleep = 0;  in pt1_wakeup()
809 	if (ret == 0 && adap->orig_init)  in pt1_wakeup()
854 	adap->upacket_count = 0;  in pt1_alloc_adapter()
855 	adap->packet_count = 0;  in pt1_alloc_adapter()
862 	if (ret < 0)  in pt1_alloc_adapter()
874 	if (ret < 0)  in pt1_alloc_adapter()
880 	dmxdev->capabilities = 0;  in pt1_alloc_adapter()
882 	if (ret < 0)  in pt1_alloc_adapter()
902 	for (i = 0; i < PT1_NR_ADAPS; i++)  in pt1_cleanup_adapters()
912 	for (i = 0; i < PT1_NR_ADAPS; i++) {  in pt1_init_adapters()
922 	return 0;  in pt1_init_adapters()
950 	if (ret < 0)  in pt1_init_frontend()
954 	return 0;  in pt1_init_frontend()
960 	for (i = 0; i < PT1_NR_ADAPS; i++)  in pt1_cleanup_frontends()
969 	for (i = 0; i < ARRAY_SIZE(pt1_configs); i++) {  in pt1_init_frontends()
1010 		if (ret < 0)  in pt1_init_frontends()
1015 	if (ret < 0)  in pt1_init_frontends()
1018 	return 0;  in pt1_init_frontends()
1027 	for (; i >= 0; i--) {  in pt1_init_frontends()
1044 	pt1_i2c_emit(pt1, addr,     1, 0, 0, data, addr + 1);  in pt1_i2c_write_bit()
1045 	pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, data, addr + 2);  in pt1_i2c_write_bit()
1046 	pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, data, addr + 3);  in pt1_i2c_write_bit()
1052 	pt1_i2c_emit(pt1, addr,     1, 0, 0, 1, addr + 1);  in pt1_i2c_read_bit()
1053 	pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 1, addr + 2);  in pt1_i2c_read_bit()
1055 	pt1_i2c_emit(pt1, addr + 3, 1, 0, 0, 1, addr + 4);  in pt1_i2c_read_bit()
1062 	for (i = 0; i < 8; i++)  in pt1_i2c_write_byte()
1071 	for (i = 0; i < 8; i++)  in pt1_i2c_read_byte()
1079 	pt1_i2c_emit(pt1, addr,     1, 0, 1, 1, addr + 1);  in pt1_i2c_prepare()
1080 	pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);  in pt1_i2c_prepare()
1081 	pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, 0, addr + 3);  in pt1_i2c_prepare()
1091 	for (i = 0; i < msg->len; i++)  in pt1_i2c_write_msg()
1102 	for (i = 0; i < msg->len; i++)  in pt1_i2c_read_msg()
1109 	pt1_i2c_emit(pt1, addr,     1, 0, 0, 0, addr + 1);  in pt1_i2c_end()
1110 	pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);  in pt1_i2c_end()
1111 	pt1_i2c_emit(pt1, addr + 2, 1, 0, 1, 1, 0);  in pt1_i2c_end()
1113 	pt1_write_reg(pt1, 0, 0x00000004);  in pt1_i2c_end()
1118 	} while (pt1_read_reg(pt1, 0) & 0x00000080);  in pt1_i2c_end()
1119 	return 0;  in pt1_i2c_end()
1124 	int addr = 0;  in pt1_i2c_begin()
1126 	pt1_i2c_emit(pt1, addr,     0, 0, 1, 1, addr /* itself */);  in pt1_i2c_begin()
1130 		pt1_i2c_emit(pt1, addr,     1, 0, 1, 1, addr + 1);  in pt1_i2c_begin()
1131 		pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);  in pt1_i2c_begin()
1149 	for (i = 0; i < num; i++) {  in pt1_i2c_xfer()
1170 			if (ret < 0)  in pt1_i2c_xfer()
1182 			if (ret < 0)  in pt1_i2c_xfer()
1203 	for (i = 0; i < 128; i++)  in pt1_i2c_wait()
1204 		pt1_i2c_emit(pt1, 0, 0, 0, 1, 1, 0);  in pt1_i2c_wait()
1210 	for (i = 0; i < 1024; i++)  in pt1_i2c_init()
1211 		pt1_i2c_emit(pt1, i, 0, 0, 1, 1, 0);  in pt1_i2c_init()
1222 	pt1->power = 0;  in pt1_suspend()
1225 	return 0;  in pt1_suspend()
1234 	pt1->power = 0;  in pt1_resume()
1242 	if (ret < 0)  in pt1_resume()
1248 	if (ret < 0)  in pt1_resume()
1252 	if (ret < 0)  in pt1_resume()
1256 	if (ret < 0)  in pt1_resume()
1260 	if (ret < 0)  in pt1_resume()
1269 	pt1->reset = 0;  in pt1_resume()
1274 	if (ret < 0)  in pt1_resume()
1277 	for (i = 0; i < PT1_NR_ADAPS; i++)  in pt1_resume()
1281 	for (i = 0; i < pt1_nr_tables; i++) {  in pt1_resume()
1284 		for (j = 0; j < PT1_NR_BUFS; j++)  in pt1_resume()
1286 				= 0;  in pt1_resume()
1289 	pt1_register_tables(pt1, pt1->tables[0].addr >> PT1_PAGE_SHIFT);  in pt1_resume()
1291 	pt1->table_index = 0;  in pt1_resume()
1292 	pt1->buf_index = 0;  in pt1_resume()
1293 	for (i = 0; i < PT1_NR_ADAPS; i++) {  in pt1_resume()
1294 		pt1->adaps[i]->upacket_count = 0;  in pt1_resume()
1295 		pt1->adaps[i]->packet_count = 0;  in pt1_resume()
1299 	return 0;  in pt1_resume()
1303 	return 0;	/* resume anyway */  in pt1_resume()
1321 	pt1->power = 0;  in pt1_remove()
1340 	if (ret < 0)  in pt1_probe()
1344 	if (ret < 0)  in pt1_probe()
1350 	if (ret < 0)  in pt1_probe()
1353 	regs = pci_iomap(pdev, 0, 0);  in pt1_probe()
1368 	pt1->fe_clk = (pdev->device == 0x211a) ?  in pt1_probe()
1373 	if (ret < 0)  in pt1_probe()
1378 	pt1->power = 0;  in pt1_probe()
1389 	if (ret < 0)  in pt1_probe()
1396 	if (ret < 0)  in pt1_probe()
1402 	if (ret < 0)  in pt1_probe()
1406 	if (ret < 0)  in pt1_probe()
1410 	if (ret < 0)  in pt1_probe()
1414 	if (ret < 0)  in pt1_probe()
1423 	pt1->reset = 0;  in pt1_probe()
1428 	if (ret < 0)  in pt1_probe()
1432 	if (ret < 0)  in pt1_probe()
1435 	return 0;  in pt1_probe()
1441 	pt1->power = 0;  in pt1_probe()
1462 	{ PCI_DEVICE(0x10ee, 0x211a) },
1463 	{ PCI_DEVICE(0x10ee, 0x222a) },