Lines Matching refs:csi2

363 	u8 lanes, csi2bus = q->csi2.port;
372 	lanes = q->csi2.lanes;
500 	       base + CIO2_REG_PXM_FRF_CFG(q->csi2.port));
1367 	struct csi2_bus_info csi2;
1383 	if (cio2->queue[s_asd->csi2.port].sensor)
1390 	q = &cio2->queue[s_asd->csi2.port];
1392 	q->csi2 = s_asd->csi2;
1394 	q->csi_rx_base = cio2->base + CIO2_REG_PIPE_BASE(q->csi2.port);
1407 	cio2->queue[s_asd->csi2.port].sensor = NULL;
1421 		q = &cio2->queue[s_asd->csi2.port];
1468 		s_asd->csi2.port = vep.base.port;
1469 		s_asd->csi2.lanes = vep.bus.mipi_csi2.num_data_lanes;