Lines Matching refs:CX23888_IR_REFCLK_FREQ
101 #define CX23888_IR_REFCLK_FREQ (CX23888_VIDCLK_FREQ / 2) macro
181 DIV_ROUND_CLOSEST(CX23888_IR_REFCLK_FREQ, freq * 16)); in carrier_freq_to_clock_divider()
186 return DIV_ROUND_CLOSEST(CX23888_IR_REFCLK_FREQ, (divider + 1) * 16); in clock_divider_to_carrier_freq()
192 return DIV_ROUND_CLOSEST(CX23888_IR_REFCLK_FREQ, in clock_divider_to_freq()
215 DIV_ROUND_CLOSEST(CX23888_IR_REFCLK_FREQ / 1000000 * ns, 1000)); in ns_to_lpf_count()
222 CX23888_IR_REFCLK_FREQ / 1000000); in lpf_count_to_ns()
228 return DIV_ROUND_CLOSEST(count, CX23888_IR_REFCLK_FREQ / 1000000); in lpf_count_to_us()
242 CX23888_IR_REFCLK_FREQ / 1000000); in clock_divider_to_resolution()
255 rem = do_div(n, CX23888_IR_REFCLK_FREQ / 1000000); /* / MHz => ns */ in pulse_width_count_to_ns()
256 if (rem >= CX23888_IR_REFCLK_FREQ / 1000000 / 2) in pulse_width_count_to_ns()
271 rem = do_div(n, CX23888_IR_REFCLK_FREQ / 1000000); /* / MHz => us */ in pulse_width_count_to_us()
272 if (rem >= CX23888_IR_REFCLK_FREQ / 1000000 / 2) in pulse_width_count_to_us()
289 clocks = CX23888_IR_REFCLK_FREQ / 1000000 * (u64) ns; /* millicycles */ in ns_to_pulse_clocks()