Lines Matching +full:reset +full:- +full:gpio
1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #include <media/drv-intf/cx25840.h>
19 #include "netup-eeprom.h"
20 #include "netup-init.h"
21 #include "altera-ci.h"
24 #include "cx23888-ir.h"
29 "NetUP Dual DVB-T/C CI card revision");
35 "\t\t\tHVR-1250 (reported safe)\n"
41 /* ------------------------------------------------------------------ */
64 .name = "Hauppauge WinTV-HVR1800lp",
85 .name = "Hauppauge WinTV-HVR1800",
117 .name = "Hauppauge WinTV-HVR1250",
157 .name = "Hauppauge WinTV-HVR1500Q",
161 .name = "Hauppauge WinTV-HVR1500",
188 .name = "Hauppauge WinTV-HVR1200",
192 .name = "Hauppauge WinTV-HVR1700",
196 .name = "Hauppauge WinTV-HVR1400",
205 .name = "DViCO FusionHDTV DVB-T Dual Express",
297 .name = "DVBWorld DVB-S2 2005",
302 .name = "NetUP Dual DVB-S2 CI",
307 .name = "Hauppauge WinTV-HVR1270",
311 .name = "Hauppauge WinTV-HVR1275",
315 .name = "Hauppauge WinTV-HVR1255",
344 .name = "Hauppauge WinTV-HVR1255",
367 .name = "Hauppauge WinTV-HVR1210",
371 .name = "Mygica X8506 DMB-TH",
401 .name = "Magic-Pro ProHDTV Extreme 2",
431 .name = "Hauppauge WinTV-HVR1850",
465 .name = "Hauppauge WinTV-HVR1290",
469 .name = "Mygica X8558 PRO DMB-TH",
522 .name = "NetUP Dual DVB-T/C-CI RF",
536 .name = "MPX-885",
561 .name = "Mygica X8502/X8507 ISDB-T",
604 .name = "Prof Revolution DVB-S2 8000",
608 .name = "Hauppauge WinTV-HVR4400/HVR5500",
650 .name = "DViCO FusionHDTV DVB-T Dual Express2",
655 .name = "Hauppauge ImpactVCB-e",
684 .name = "Technotrend TT-budget CT2-4500 CI",
702 .name = "Hauppauge WinTV-HVR5525",
778 .name = "Hauppauge WinTV-QuadHD-DVB",
794 .name = "Hauppauge WinTV-QuadHD-DVB(885)",
800 .name = "Hauppauge WinTV-QuadHD-ATSC",
815 .name = "Hauppauge WinTV-QuadHD-ATSC(885)",
821 .name = "Hauppauge WinTV-HVR-1265(161111)",
841 .name = "Hauppauge WinTV-Starburst2",
864 .name = "AVerMedia H789-C",
891 /* ------------------------------------------------------------------ */
1118 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-4400 (Model 121xxx, Hybrid DVB-T/S2, IR) */
1122 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */
1126 .card = CX23885_BOARD_HAUPPAUGE_STARBURST, /* Hauppauge WinTV Starburst (Model 121x00, DVB-S2, IR) */
1130 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */
1206 .card = CX23885_BOARD_HAUPPAUGE_HVR1265_K4, /* Hauppauge WinTV HVR-1265 (Model 161xx1, Hybrid ATSC/QAM-B) */
1227 if (0 == dev->pci->subsystem_vendor &&
1228 0 == dev->pci->subsystem_device) {
1233 "%s: -- tux\n",
1234 dev->name, dev->name, dev->name, dev->name, dev->name);
1240 dev->name, dev->name, dev->name, dev->name);
1243 dev->name);
1245 pr_info("%s: card=%d -> %s\n",
1246 dev->name, i, cx23885_boards[i].name);
1266 dev->name,
1267 cx23885_boards[dev->board].name,
1280 /* WinTV-HVR1270 (PCIe, Retail, half height)
1283 /* WinTV-HVR1210 (PCIe, Retail, half height)
1284 * DVB-T and basic analog, IR Blast */
1286 /* WinTV-HVR1270 (PCIe, Retail, half height)
1289 /* WinTV-HVR1210 (PCIe, Retail, half height)
1290 * DVB-T and basic analog, IR Recv */
1292 /* WinTV-HVR1275 (PCIe, Retail, half height)
1295 /* WinTV-HVR1210 (PCIe, Retail, half height)
1296 * DVB-T and basic analog, IR Recv */
1298 /* WinTV-HVR1270 (PCIe, Retail, full height)
1301 /* WinTV-HVR1210 (PCIe, Retail, full height)
1302 * DVB-T and basic analog, IR Blast */
1304 /* WinTV-HVR1270 (PCIe, Retail, full height)
1307 /* WinTV-HVR1210 (PCIe, Retail, full height)
1308 * DVB-T and basic analog, IR Recv */
1310 /* WinTV-HVR1275 (PCIe, Retail, full height)
1313 /* WinTV-HVR1210 (PCIe, Retail, full height)
1314 * DVB-T and basic analog, IR Recv */
1316 /* WinTV-HVR1200 (PCIe, Retail, full height)
1317 * DVB-T and basic analog */
1319 /* WinTV-ImpactVCB-e (PCIe, Retail, half height)
1322 /* WinTV-HVR1200 (PCIe, OEM, half height)
1323 * DVB-T and basic analog */
1325 /* WinTV-HVR1200 (PCIe, OEM, half height)
1326 * DVB-T and basic analog */
1328 /* WinTV-HVR1200 (PCIe, OEM, full height)
1329 * DVB-T and basic analog */
1331 /* WinTV-HVR1200 (PCIe, OEM, half height)
1332 * DVB-T and basic analog */
1334 /* WinTV-HVR1200 (PCIe, OEM, full height)
1335 * DVB-T and basic analog */
1337 /* WinTV-HVR1200 (PCIe, OEM, full height)
1338 * DVB-T and basic analog */
1340 /* WinTV-HVR1200 (PCIe, OEM, half height)
1341 * DVB-T and basic analog */
1343 /* WinTV-HVR1200 (PCIe, OEM, full height)
1344 * DVB-T and basic analog */
1346 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
1349 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
1352 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
1355 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
1358 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
1361 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
1364 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1367 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1370 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
1373 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
1376 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
1379 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
1382 /* WinTV-HVR1250 (PCIe, No IR, half height,
1385 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1388 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
1391 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1394 /* WinTV-HVR1400 (Express Card, Retail, IR,
1395 * DVB-T and Basic analog */
1397 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
1398 * DVB-T and MPEG2 HW Encoder */
1400 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
1401 * DVB-T and MPEG2 HW Encoder */
1404 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
1408 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
1411 /* WinTV-HVR4400 (PCIe, DVB-S2, DVB-C/T) */
1414 /* WinTV-HVR5500 (PCIe, DVB-S2, DVB-C/T) */
1417 /* WinTV-HVR5525 (PCIe, DVB-S/S2, DVB-T/T2/C) */
1420 /* WinTV-HVR-1265 K4 (PCIe, Analog/ATSC/QAM-B) */
1424 /* WinTV-QuadHD (DVB) Tuner Pair 1 (PCIe, IR, half height,
1425 DVB-T/T2/C, DVB-T/T2/C */
1429 /* WinTV-QuadHD (DVB) Tuner Pair 2 (PCIe, IR, half height,
1430 DVB-T/T2/C, DVB-T/T2/C */
1434 /* WinTV-QuadHD (ATSC) Tuner Pair 1 (PCIe, IR, half height,
1435 * ATSC/QAM-B, ATSC/QAM-B */
1439 /* WinTV-QuadHD (ATSC) Tuner Pair 2 (PCIe, IR, half height,
1440 * ATSC/QAM-B, ATSC/QAM-B */
1444 dev->name, tv.model);
1449 dev->name, tv.model);
1453 to the cx23885 gpio's. If this chip doesn't get init'ed the demod
1462 switch (dev->board) {
1473 ((buf[i >> 3] >> (7 - (i & 7))) & 1) | 4);
1484 struct cx23885_dev *dev = port->dev;
1493 return -EINVAL;
1496 switch (dev->board) {
1506 /* Tuner Reset Command */
1513 * we need to reset the correct gpio. */
1514 if (port->nr == 1)
1516 else if (port->nr == 2)
1520 /* Tuner Reset Command */
1524 altera_ci_tuner_reset(dev, port->nr);
1527 /* XC3028L Reset Command */
1533 /* Drive the tuner into reset and back out */
1544 switch (dev->board) {
1546 /* GPIO-0 cx24227 demodulator reset */
1547 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1550 /* GPIO-0 cx24227 demodulator */
1551 /* GPIO-2 xc3028 tuner */
1553 /* Put the parts into reset */
1558 /* Bring the parts out of reset */
1562 /* GPIO-0 cx24227 demodulator reset */
1563 /* GPIO-2 xc5000 tuner reset */
1564 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
1567 /* GPIO-0 656_CLK */
1568 /* GPIO-1 656_D0 */
1569 /* GPIO-2 8295A Reset */
1570 /* GPIO-3-10 cx23417 data0-7 */
1571 /* GPIO-11-14 cx23417 addr0-3 */
1572 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1573 /* GPIO-19 IR_RX */
1575 /* CX23417 GPIO's */
1576 /* EIO15 Zilog Reset */
1577 /* EIO14 S5H1409/CX24227 Reset */
1580 /* Put the demod into reset and protect the eeprom */
1584 /* Bring the demod and blaster out of reset */
1588 /* Force the TDA8295A into reset and back */
1598 /* GPIO-0 tda10048 demodulator reset */
1599 /* GPIO-2 tda18271 tuner reset */
1601 /* Put the parts into reset and back */
1609 /* GPIO-0 TDA10048 demodulator reset */
1610 /* GPIO-2 TDA8295A Reset */
1611 /* GPIO-3-10 cx23417 data0-7 */
1612 /* GPIO-11-14 cx23417 addr0-3 */
1613 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1615 /* The following GPIO's are on the interna AVCore (cx25840) */
1616 /* GPIO-19 IR_RX */
1617 /* GPIO-20 IR_TX 416/DVBT Select */
1618 /* GPIO-21 IIS DAT */
1619 /* GPIO-22 IIS WCLK */
1620 /* GPIO-23 IIS BCLK */
1622 /* Put the parts into reset and back */
1630 /* GPIO-0 Dibcom7000p demodulator reset */
1631 /* GPIO-2 xc3028L tuner reset */
1632 /* GPIO-13 LED */
1634 /* Put the parts into reset and back */
1642 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
1643 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
1644 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
1645 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
1647 /* Put the parts into reset and back */
1656 /* GPIO-0 portb xc3028 reset */
1657 /* GPIO-1 portb zl10353 reset */
1658 /* GPIO-2 portc xc3028 reset */
1659 /* GPIO-3 portc zl10353 reset */
1661 /* Put the parts into reset and back */
1674 /* GPIO-2 xc3028 tuner reset */
1676 /* The following GPIO's are on the internal AVCore (cx25840) */
1677 /* GPIO-? zl10353 demod reset */
1679 /* Put the parts into reset and back */
1700 /* GPIO-0 INTA from CiMax1
1701 GPIO-1 INTB from CiMax2
1702 GPIO-2 reset chips
1703 GPIO-3 to GPIO-10 data/addr for CA
1704 GPIO-11 ~CS0 to CiMax1
1705 GPIO-12 ~CS1 to CiMax2
1706 GPIO-13 ADL0 load LSB addr
1707 GPIO-14 ADL1 load MSB addr
1708 GPIO-15 ~RDY from CiMax
1709 GPIO-17 ~RD to CiMax
1710 GPIO-18 ~WR to CiMax
1712 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
1713 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
1715 msleep(100);/* reset delay */
1716 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
1717 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
1718 /* GPIO-15 IN as ~ACK, rest as OUT */
1730 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
1731 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
1732 /* GPIO-9 Demod reset */
1734 /* Put the parts into reset and back */
1744 /* GPIO-0 (0)Analog / (1)Digital TV */
1745 /* GPIO-1 reset XC5000 */
1746 /* GPIO-2 demod reset */
1754 /* GPIO-0 reset first ATBM8830 */
1755 /* GPIO-1 reset second ATBM8830 */
1764 /* GPIO-0 656_CLK */
1765 /* GPIO-1 656_D0 */
1766 /* GPIO-2 Wake# */
1767 /* GPIO-3-10 cx23417 data0-7 */
1768 /* GPIO-11-14 cx23417 addr0-3 */
1769 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1770 /* GPIO-19 IR_RX */
1771 /* GPIO-20 C_IR_TX */
1772 /* GPIO-21 I2S DAT */
1773 /* GPIO-22 I2S WCLK */
1774 /* GPIO-23 I2S BCLK */
1775 /* ALT GPIO: EXP GPIO LATCH */
1777 /* CX23417 GPIO's */
1778 /* GPIO-14 S5H1411/CX24228 Reset */
1779 /* GPIO-13 EEPROM write protect */
1782 /* Put the demod into reset and protect the eeprom */
1786 /* Bring the demod out of reset */
1790 /* CX24228 GPIO */
1794 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1797 /* GPIO-0 ~INT in
1798 GPIO-1 TMS out
1799 GPIO-2 ~reset chips out
1800 GPIO-3 to GPIO-10 data/addr for CA in/out
1801 GPIO-11 ~CS out
1802 GPIO-12 ADDR out
1803 GPIO-13 ~WR out
1804 GPIO-14 ~RD out
1805 GPIO-15 ~RDY in
1806 GPIO-16 TCK out
1807 GPIO-17 TDO in
1808 GPIO-18 TDI out
1810 cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
1811 /* GPIO-0 as INT, reset & TMS low */
1813 msleep(100);/* reset delay */
1814 cx_set(GP0_IO, 0x00000004); /* reset high */
1815 cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
1816 /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
1825 /* GPIO-8 tda10071 demod reset */
1826 /* GPIO-9 si2165 demod reset (only HVR4400/HVR5500)*/
1828 /* Put the parts into reset and back */
1839 /* GPIO-0,1,2 setup direction as output */
1842 /* AF9013 demod reset */
1857 /* XC3028L tuner reset */
1866 /* enable GPIO3-18 pins */
1877 * GPIO-0 INTA from CiMax, input
1878 * GPIO-1 reset CiMax, output, high active
1879 * GPIO-2 reset demod, output, low active
1880 * GPIO-3 to GPIO-10 data/addr for CAM
1881 * GPIO-11 ~CS0 to CiMax1
1882 * GPIO-12 ~CS1 to CiMax2
1883 * GPIO-13 ADL0 load LSB addr
1884 * GPIO-14 ADL1 load MSB addr
1885 * GPIO-15 ~RDY from CiMax
1886 * GPIO-17 ~RD to CiMax
1887 * GPIO-18 ~WR to CiMax
1890 cx_set(GP0_IO, 0x00060002); /* GPIO 1/2 as output */
1891 cx_clear(GP0_IO, 0x00010004); /* GPIO 0 as input */
1892 msleep(100); /* reset delay */
1893 cx_set(GP0_IO, 0x00060004); /* GPIO as out, reset high */
1895 cx_write(MC417_CTL, 0x00000037); /* enable GPIO3-18 pins */
1897 /* GPIO-15 IN as ~ACK, rest as OUT */
1915 * HVR5525 GPIO Details:
1916 * GPIO-00 IR_WIDE
1917 * GPIO-02 wake#
1918 * GPIO-03 VAUX Pres.
1919 * GPIO-07 PROG#
1920 * GPIO-08 SAT_RESN
1921 * GPIO-09 TER_RESN
1922 * GPIO-10 B2_SENSE
1923 * GPIO-11 B1_SENSE
1924 * GPIO-15 IR_LED_STATUS
1925 * GPIO-19 IR_NARROW
1926 * GPIO-20 Blauster1
1930 /* Put the parts into reset and back */
1940 * card does not have any GPIO's connected to subcomponents.
1949 * GPIO-08 TER1_RESN
1950 * GPIO-09 TER2_RESN
1952 /* Put the parts into reset and back */
1994 switch (dev->board) {
2012 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
2013 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
2021 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
2022 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
2028 v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, ¶ms);
2032 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms);
2034 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms);
2050 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
2051 if (dev->sd_ir == NULL) {
2052 ret = -ENODEV;
2055 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
2061 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
2062 if (dev->sd_ir == NULL) {
2063 ret = -ENODEV;
2066 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
2071 request_module("ir-kbd-i2c");
2080 switch (dev->board) {
2086 dev->sd_ir = NULL;
2103 dev->sd_ir = NULL;
2135 switch (dev->board) {
2139 if (dev->sd_ir)
2155 if (dev->sd_ir)
2163 struct cx23885_tsport *ts1 = &dev->ts1;
2164 struct cx23885_tsport *ts2 = &dev->ts2;
2168 if (dev->i2c_bus[0].i2c_rc == 0) {
2169 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
2170 tveeprom_read(&dev->i2c_bus[0].i2c_client,
2174 switch (dev->board) {
2176 if (dev->i2c_bus[0].i2c_rc == 0) {
2186 if (dev->i2c_bus[0].i2c_rc == 0)
2210 if (dev->i2c_bus[0].i2c_rc == 0)
2215 dev->i2c_bus[1].i2c_client.addr = 0xa0 >> 1;
2216 tveeprom_read(&dev->i2c_bus[1].i2c_client,
2218 if (dev->i2c_bus[0].i2c_rc == 0)
2223 switch (dev->board) {
2226 ts1->gen_ctrl_val = 0x4; /* Parallel */
2227 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2228 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2231 ts2->gen_ctrl_val = 0x10e;
2232 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2233 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2238 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2239 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2240 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2243 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2244 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2245 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2249 /* Defaults for VID B - Analog encoder */
2251 ts1->gen_ctrl_val = 0x10e;
2252 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2253 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2256 ts1->vld_misc_val = 0x2000;
2257 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
2261 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2262 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2263 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2266 ts1->gen_ctrl_val = 0x4; /* Parallel */
2267 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2268 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2278 ts1->gen_ctrl_val = 0x5; /* Parallel */
2279 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2280 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2285 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2286 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2287 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2288 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2289 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2290 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2294 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2295 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2296 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2297 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2298 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2299 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2305 ts1->gen_ctrl_val = 0x5; /* Parallel */
2306 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2307 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2310 ts1->gen_ctrl_val = 0x5; /* Parallel */
2311 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2312 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2313 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2314 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2315 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2318 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2319 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2320 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2321 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2322 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2323 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2326 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2327 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2328 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2332 ts1->gen_ctrl_val = 0x5; /* Parallel */
2333 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2334 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2335 ts2->gen_ctrl_val = 0x8; /* Serial bus */
2336 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2337 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2340 ts1->gen_ctrl_val = 0x5; /* Parallel */
2341 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2342 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2343 ts2->gen_ctrl_val = 0xe; /* Serial bus */
2344 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2345 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2349 ts1->gen_ctrl_val = 0x5; /* Parallel */
2350 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2351 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2352 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2353 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2354 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2361 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2362 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2363 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2364 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2365 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2366 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2389 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2390 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2391 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2397 switch (dev->board) {
2446 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
2447 &dev->i2c_bus[2].i2c_adap,
2449 if (dev->sd_cx25840) {
2451 v4l2_set_subdev_hostdata(dev->sd_cx25840,
2452 &dev->clk_freq);
2454 dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
2455 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
2460 switch (dev->board) {
2462 v4l2_i2c_new_subdev(&dev->v4l2_dev,
2463 &dev->i2c_bus[0].i2c_adap,
2468 v4l2_i2c_new_subdev(&dev->v4l2_dev,
2469 &dev->i2c_bus[0].i2c_adap,
2472 v4l2_i2c_new_subdev(&dev->v4l2_dev,
2473 &dev->i2c_bus[0].i2c_adap,
2478 /* AUX-PLL 27MHz CLK */
2479 switch (dev->board) {
2486 const char *filename = "dvb-netup-altera-01.fw";
2497 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
2503 filename = "dvb-netup-altera-04.fw";
2506 filename = "dvb-netup-altera-01.fw";
2512 ret = request_firmware(&fw, filename, &dev->pci->dev);