Lines Matching +full:crystal +full:- +full:freq
1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Derived from cx25840-audio.c
11 #include "cx18-driver.h"
13 static int set_audclk_freq(struct cx18 *cx, u32 freq) in set_audclk_freq() argument
15 struct cx18_av_state *state = &cx->av_state; in set_audclk_freq()
17 if (freq != 32000 && freq != 44100 && freq != 48000) in set_audclk_freq()
18 return -EINVAL; in set_audclk_freq()
21 * The PLL parameters are based on the external crystal frequency that in set_audclk_freq()
24 * NTSC Color subcarrier freq * 8 = in set_audclk_freq()
31 * the NTSC Standards", Proceedings of the I-R-E, January 1954, pp 79-80 in set_audclk_freq()
34 * NTSC Standards", Proceedings of the I-R-E, January 1954, pp 81-83 in set_audclk_freq()
36 * As Mike Bradley has rightly pointed out, it's not the exact crystal in set_audclk_freq()
41 * crystal value at all, it will assume 28.636360 MHz, the crystal in set_audclk_freq()
42 * freq used in calculations in this driver will be: in set_audclk_freq()
47 * the shelf crystal will have for accuracy anyway. in set_audclk_freq()
56 if (state->aud_input > CX18_AV_AUDIO_SERIAL2) { in set_audclk_freq()
57 switch (freq) { in set_audclk_freq()
66 /* xtal * 0xf.15f17f0/4 = 108 MHz: 432 MHz pre-postdiv*/ in set_audclk_freq()
70 /* xtal * 0xd.bb3a060/0x20 = 32000 * 384: 393 MHz p-pd*/ in set_audclk_freq()
82 /* AUD_COUNT = 0x2fff = 8 samples * 4 * 384 - 1 */ in set_audclk_freq()
88 * ((8 samples/32,000) * (13,500,000 * 8) * 4 - 1) * 8 in set_audclk_freq()
101 /* xtal * 0xf.15f17f0/4 = 108 MHz: 432 MHz pre-postdiv*/ in set_audclk_freq()
105 /* xtal * 0xe.3150f90/0x18 = 44100 * 384: 406 MHz p-pd*/ in set_audclk_freq()
117 /* AUD_COUNT = 0x92ff = 49 samples * 2 * 384 - 1 */ in set_audclk_freq()
123 * ((49 samples/44,100) * (13,500,000 * 8) * 2 - 1) * 8 in set_audclk_freq()
136 /* xtal * 0xf.15f17f0/4 = 108 MHz: 432 MHz pre-postdiv*/ in set_audclk_freq()
140 /* xtal * 0xe.2913d68/0x16 = 48000 * 384: 406 MHz p-pd*/ in set_audclk_freq()
152 /* AUD_COUNT = 0x5fff = 4 samples * 16 * 384 - 1 */ in set_audclk_freq()
158 * ((4 samples/48,000) * (13,500,000 * 8) * 16 - 1) * 8 in set_audclk_freq()
164 switch (freq) { in set_audclk_freq()
173 /* xtal * 0xf.15f17f0/4 = 108 MHz: 432 MHz pre-postdiv*/ in set_audclk_freq()
177 /* xtal * 0xd.bb3a060/0x30 = 32000 * 256: 393 MHz p-pd*/ in set_audclk_freq()
193 /* AUD_COUNT = 0x1fff = 8 samples * 4 * 256 - 1 */ in set_audclk_freq()
199 * ((8 samples/32,000) * (13,500,000 * 8) * 4 - 1) * 8 in set_audclk_freq()
212 /* xtal * 0xf.15f17f0/4 = 108 MHz: 432 MHz pre-postdiv*/ in set_audclk_freq()
216 /* xtal * 0xe.3150f90/0x24 = 44100 * 256: 406 MHz p-pd*/ in set_audclk_freq()
232 /* AUD_COUNT = 0x61ff = 49 samples * 2 * 256 - 1 */ in set_audclk_freq()
238 * ((49 samples/44,100) * (13,500,000 * 8) * 2 - 1) * 8 in set_audclk_freq()
251 /* xtal * 0xf.15f17f0/4 = 108 MHz: 432 MHz pre-postdiv*/ in set_audclk_freq()
255 /* xtal * 0xd.bb3a060/0x20 = 48000 * 256: 393 MHz p-pd*/ in set_audclk_freq()
271 /* AUD_COUNT = 0x3fff = 4 samples * 16 * 256 - 1 */ in set_audclk_freq()
277 * ((4 samples/48,000) * (13,500,000 * 8) * 16 - 1) * 8 in set_audclk_freq()
284 state->audclk_freq = freq; in set_audclk_freq()
291 struct cx18_av_state *state = &cx->av_state; in cx18_av_audio_set_path()
305 if (state->aud_input <= CX18_AV_AUDIO_SERIAL2) { in cx18_av_audio_set_path()
310 * non-tuner inputs: autodetection is specific for in cx18_av_audio_set_path()
317 set_audclk_freq(cx, state->audclk_freq); in cx18_av_audio_set_path()
323 if (state->aud_input > CX18_AV_AUDIO_SERIAL2) { in cx18_av_audio_set_path()
333 /* First convert the volume to msp3400 values (0-127) */ in set_volume()
336 * -114dB to -96dB maps to 0 in set_volume()
341 vol -= 23; in set_volume()
344 cx18_av_write(cx, 0x8d4, 228 - (vol * 2)); in set_volume()
350 cx18_av_and_or(cx, 0x8d9, ~0x3f, 48 - (bass * 48 / 0xffff)); in set_bass()
356 cx18_av_and_or(cx, 0x8db, ~0x3f, 48 - (treble * 48 / 0xffff)); in set_treble()
371 cx18_av_and_or(cx, 0x8d5, ~0x7f, 0x80 - bal); in set_balance()
377 struct cx18_av_state *state = &cx->av_state; in set_mute()
380 if (state->aud_input > CX18_AV_AUDIO_SERIAL2) { in set_mute()
402 int cx18_av_s_clock_freq(struct v4l2_subdev *sd, u32 freq) in cx18_av_s_clock_freq() argument
405 struct cx18_av_state *state = &cx->av_state; in cx18_av_s_clock_freq()
409 if (state->aud_input > CX18_AV_AUDIO_SERIAL2) { in cx18_av_s_clock_freq()
417 retval = set_audclk_freq(cx, freq); in cx18_av_s_clock_freq()
421 if (state->aud_input > CX18_AV_AUDIO_SERIAL2) { in cx18_av_s_clock_freq()
433 switch (ctrl->id) { in cx18_av_audio_s_ctrl()
435 set_volume(cx, ctrl->val); in cx18_av_audio_s_ctrl()
438 set_bass(cx, ctrl->val); in cx18_av_audio_s_ctrl()
441 set_treble(cx, ctrl->val); in cx18_av_audio_s_ctrl()
444 set_balance(cx, ctrl->val); in cx18_av_audio_s_ctrl()
447 set_mute(cx, ctrl->val); in cx18_av_audio_s_ctrl()
450 return -EINVAL; in cx18_av_audio_s_ctrl()