24 module_param(debug, int, 0);
25 MODULE_PARM_DESC(debug, "Debug level (0-1)");
77 	for (i = 0; i < VPX_TIMEOUT_COUNT; i++) {  in vpx3220_fp_status()
78 		status = vpx3220_read(sd, 0x29);  in vpx3220_fp_status()
81 			return 0;  in vpx3220_fp_status()
97 	if (i2c_smbus_write_word_data(client, 0x27, swab16(fpaddr)) == -1) {  in vpx3220_fp_write()
102 	if (vpx3220_fp_status(sd) < 0)  in vpx3220_fp_write()
106 	if (i2c_smbus_write_word_data(client, 0x28, swab16(data)) == -1) {  in vpx3220_fp_write()
111 	return 0;  in vpx3220_fp_write()
120 	if (i2c_smbus_write_word_data(client, 0x26, swab16(fpaddr)) == -1) {  in vpx3220_fp_read()
125 	if (vpx3220_fp_status(sd) < 0)  in vpx3220_fp_read()
129 	data = i2c_smbus_read_word_data(client, 0x28);  in vpx3220_fp_read()
146 		if (ret < 0)  in vpx3220_write_block()
158 	int ret = 0;  in vpx3220_write_fp_block()
172 	0x1c, 0x00,		/* NTSC tint angle */
173 	0x88, 17,		/* Window 1 vertical */
174 	0x89, 240,		/* Vertical lines in */
175 	0x8a, 240,		/* Vertical lines out */
176 	0x8b, 000,		/* Horizontal begin */
177 	0x8c, 640,		/* Horizontal length */
178 	0x8d, 640,		/* Number of pixels */
179 	0x8f, 0xc00,		/* Disable window 2 */
180 	0xf0, 0x73,		/* 13.5 MHz transport, Forced
182 	0xf2, 0x13,		/* NTSC M, composite input */
183 	0xe7, 0x1e1,		/* Enable vertical standard
188 	0x88, 23,		/* Window 1 vertical begin */
189 	0x89, 288,		/* Vertical lines in (16 lines
191 	0x8a, 288,		/* Vertical lines out (16 lines
193 	0x8b, 16,		/* Horizontal begin */
194 	0x8c, 768,		/* Horizontal length */
195 	0x8d, 784,		/* Number of pixels
197 	0x8f, 0xc00,		/* Disable window 2 */
198 	0xf0, 0x77,		/* 13.5 MHz transport, Forced
200 	0xf2, 0x3d1,		/* PAL B,G,H,I, composite input */
201 	0xe7, 0x241,		/* PAL/SECAM set to 288 lines */
205 	0x88, 23,		/* Window 1 vertical begin */
206 	0x89, 288,		/* Vertical lines in (16 lines
208 	0x8a, 288,		/* Vertical lines out (16 lines
210 	0x8b, 16,		/* Horizontal begin */
211 	0x8c, 768,		/* Horizontal length */
212 	0x8d, 784,		/* Number of pixels
214 	0x8f, 0xc00,		/* Disable window 2 */
215 	0xf0, 0x77,		/* 13.5 MHz transport, Forced
217 	0xf2, 0x3d5,		/* SECAM, composite input */
218 	0xe7, 0x241,		/* PAL/SECAM set to 288 lines */
222 	0xf2, 0x00,		/* Disable all outputs */
223 	0x33, 0x0d,		/* Luma : VIN2, Chroma : CIN
225 	0xd8, 0xa8,		/* HREF/VREF active high, VREF
227 	0x20, 0x03,		/* IF compensation 0dB/oct */
228 	0xe0, 0xff,		/* Open up all comparators */
229 	0xe1, 0x00,
230 	0xe2, 0x7f,
231 	0xe3, 0x80,
232 	0xe4, 0x7f,
233 	0xe5, 0x80,
234 	0xe6, 0x00,		/* Brightness set to 0 */
235 	0xe7, 0xe0,		/* Contrast to 1.0, noise shaping
237 	0xe8, 0xf8,		/* YUV422, CbCr binary offset,
239 	0xea, 0x18,		/* LLC2 connected, output FIFO
241 	0xf0, 0x8a,		/* Half full level to 10, bus
242 				 * shuffler [7:0, 23:16, 15:8] */
243 	0xf1, 0x18,		/* Single clock, sync mode, no
245 	0xf8, 0x12,		/* Port A, PIXCLK, HF# & FE#
247 	0xf9, 0x24,		/* Port B, HREF, VREF, PREF &
252 	0x59, 0,
253 	0xa0, 2070,		/* ACC reference */
254 	0xa3, 0,
255 	0xa4, 0,
256 	0xa8, 30,
257 	0xb2, 768,
258 	0xbe, 27,
259 	0x58, 0,
260 	0x26, 0,
261 	0x4b, 0x298,		/* PLL gain */
279 	return 0;  in vpx3220_init()
287 	status = vpx3220_fp_read(sd, 0x0f3);  in vpx3220_status()
289 	v4l2_dbg(1, debug, sd, "status: 0x%04x\n", status);  in vpx3220_status()
291 	if (status < 0)  in vpx3220_status()
294 	if ((status & 0x20) == 0) {  in vpx3220_status()
295 		res = 0;  in vpx3220_status()
297 		switch (status & 0x18) {  in vpx3220_status()
298 		case 0x00:  in vpx3220_status()
299 		case 0x10:  in vpx3220_status()
300 		case 0x14:  in vpx3220_status()
301 		case 0x18:  in vpx3220_status()
305 		case 0x08:  in vpx3220_status()
309 		case 0x04:  in vpx3220_status()
310 		case 0x0c:  in vpx3220_status()
311 		case 0x1c:  in vpx3220_status()
322 	return 0;  in vpx3220_status()
345 	temp_input = vpx3220_fp_read(sd, 0xf2);  in vpx3220_s_std()
364 	vpx3220_fp_write(sd, 0xf2, temp_input | 0x0010);  in vpx3220_s_std()
366 	return 0;  in vpx3220_s_std()
374 	/* RJ:   input = 0: ST8 (PCTV) input  in vpx3220_s_routing()
379 		{0x0c, 0},  in vpx3220_s_routing()
380 		{0x0d, 0},  in vpx3220_s_routing()
381 		{0x0e, 1}  in vpx3220_s_routing()
389 	vpx3220_write(sd, 0x33, input_vals[input][0]);  in vpx3220_s_routing()
391 	data = vpx3220_fp_read(sd, 0xf2) & ~(0x0020);  in vpx3220_s_routing()
392 	if (data < 0)  in vpx3220_s_routing()
394 	/* 0x0010 is required to latch the setting */  in vpx3220_s_routing()
395 	vpx3220_fp_write(sd, 0xf2,  in vpx3220_s_routing()
396 			data | (input_vals[input][1] << 5) | 0x0010);  in vpx3220_s_routing()
399 	return 0;  in vpx3220_s_routing()
406 	vpx3220_write(sd, 0xf2, (enable ? 0x1b : 0x00));  in vpx3220_s_stream()
407 	return 0;  in vpx3220_s_stream()
416 		vpx3220_write(sd, 0xe6, ctrl->val);  in vpx3220_s_ctrl()
417 		return 0;  in vpx3220_s_ctrl()
420 		vpx3220_write(sd, 0xe7, ctrl->val + 192);  in vpx3220_s_ctrl()
421 		return 0;  in vpx3220_s_ctrl()
423 		vpx3220_fp_write(sd, 0xa0, ctrl->val);  in vpx3220_s_ctrl()
424 		return 0;  in vpx3220_s_ctrl()
426 		vpx3220_fp_write(sd, 0x1c, ctrl->val);  in vpx3220_s_ctrl()
427 		return 0;  in vpx3220_s_ctrl()
478 	decoder->input = 0;  in vpx3220_probe()
482 		V4L2_CID_BRIGHTNESS, -128, 127, 1, 0);  in vpx3220_probe()
484 		V4L2_CID_CONTRAST, 0, 63, 1, 32);  in vpx3220_probe()
486 		V4L2_CID_SATURATION, 0, 4095, 1, 2048);  in vpx3220_probe()
488 		V4L2_CID_HUE, -512, 511, 1, 0);  in vpx3220_probe()
498 	ver = i2c_smbus_read_byte_data(client, 0x00);  in vpx3220_probe()
499 	pn = (i2c_smbus_read_byte_data(client, 0x02) << 8) +  in vpx3220_probe()
500 		i2c_smbus_read_byte_data(client, 0x01);  in vpx3220_probe()
501 	if (ver == 0xec) {  in vpx3220_probe()
503 		case 0x4680:  in vpx3220_probe()
506 		case 0x4260:  in vpx3220_probe()
509 		case 0x4280:  in vpx3220_probe()
515 		v4l2_info(sd, "%s found @ 0x%x (%s)\n", name,  in vpx3220_probe()
518 		v4l2_info(sd, "chip (%02x:%04x) found @ 0x%x (%s)\n",  in vpx3220_probe()
525 	return 0;  in vpx3220_probe()