Lines Matching +full:vddgpio +full:- +full:0 +full:- +full:supply
1 // SPDX-License-Identifier: GPL-2.0-only
19 #include <linux/mtd/spi-nor.h>
26 #include <media/v4l2-async.h>
27 #include <media/v4l2-cci.h>
28 #include <media/v4l2-ctrls.h>
29 #include <media/v4l2-device.h>
30 #include <media/v4l2-event.h>
31 #include <media/v4l2-fwnode.h>
32 #include <media/v4l2-subdev.h>
38 #define THP7312_REG_FIRMWARE_VERSION_1 CCI_REG8(0xf000)
39 #define THP7312_REG_CAMERA_STATUS CCI_REG8(0xf001)
40 #define THP7312_REG_FIRMWARE_VERSION_2 CCI_REG8(0xf005)
41 #define THP7312_REG_SET_OUTPUT_ENABLE CCI_REG8(0xf008)
42 #define THP7312_OUTPUT_ENABLE 0x01
43 #define THP7312_OUTPUT_DISABLE 0x00
44 #define THP7312_REG_SET_OUTPUT_COLOR_COMPRESSION CCI_REG8(0xf009)
45 #define THP7312_REG_SET_OUTPUT_COLOR_UYVY 0x00
46 #define THP7312_REG_SET_OUTPUT_COLOR_YUY2 0x04
47 #define THP7312_REG_FLIP_MIRROR CCI_REG8(0xf00c)
48 #define THP7312_REG_FLIP_MIRROR_FLIP BIT(0)
50 #define THP7312_REG_VIDEO_IMAGE_SIZE CCI_REG8(0xf00d)
51 #define THP7312_VIDEO_IMAGE_SIZE_640x360 0x52
52 #define THP7312_VIDEO_IMAGE_SIZE_640x460 0x03
53 #define THP7312_VIDEO_IMAGE_SIZE_1280x720 0x0a
54 #define THP7312_VIDEO_IMAGE_SIZE_1920x1080 0x0b
55 #define THP7312_VIDEO_IMAGE_SIZE_3840x2160 0x0d
56 #define THP7312_VIDEO_IMAGE_SIZE_4160x3120 0x14
57 #define THP7312_VIDEO_IMAGE_SIZE_2016x1512 0x20
58 #define THP7312_VIDEO_IMAGE_SIZE_2048x1536 0x21
59 #define THP7312_REG_VIDEO_FRAME_RATE_MODE CCI_REG8(0xf00f)
60 #define THP7312_VIDEO_FRAME_RATE_MODE1 0x80
61 #define THP7312_VIDEO_FRAME_RATE_MODE2 0x81
62 #define THP7312_VIDEO_FRAME_RATE_MODE3 0x82
63 #define THP7312_REG_SET_DRIVING_MODE CCI_REG8(0xf010)
64 #define THP7312_REG_DRIVING_MODE_STATUS CCI_REG8(0xf011)
65 #define THP7312_REG_JPEG_COMPRESSION_FACTOR CCI_REG8(0xf01b)
66 #define THP7312_REG_AE_EXPOSURE_COMPENSATION CCI_REG8(0xf022)
67 #define THP7312_REG_AE_FLICKER_MODE CCI_REG8(0xf023)
68 #define THP7312_AE_FLICKER_MODE_50 0x00
69 #define THP7312_AE_FLICKER_MODE_60 0x01
70 #define THP7312_AE_FLICKER_MODE_DISABLE 0x80
71 #define THP7312_REG_AE_FIX_FRAME_RATE CCI_REG8(0xf02e)
72 #define THP7312_REG_MANUAL_WB_RED_GAIN CCI_REG8(0xf036)
73 #define THP7312_REG_MANUAL_WB_BLUE_GAIN CCI_REG8(0xf037)
74 #define THP7312_REG_WB_MODE CCI_REG8(0xf039)
75 #define THP7312_WB_MODE_AUTO 0x00
76 #define THP7312_WB_MODE_MANUAL 0x11
77 #define THP7312_REG_MANUAL_FOCUS_POSITION CCI_REG16(0xf03c)
78 #define THP7312_REG_AF_CONTROL CCI_REG8(0xf040)
79 #define THP7312_REG_AF_CONTROL_AF 0x01
80 #define THP7312_REG_AF_CONTROL_MANUAL 0x10
81 #define THP7312_REG_AF_CONTROL_LOCK 0x80
82 #define THP7312_REG_AF_SETTING CCI_REG8(0xf041)
83 #define THP7312_REG_AF_SETTING_ONESHOT_CONTRAST 0x00
84 #define THP7312_REG_AF_SETTING_ONESHOT_PDAF 0x40
85 #define THP7312_REG_AF_SETTING_ONESHOT_HYBRID 0x80
86 #define THP7312_REG_AF_SETTING_CONTINUOUS_CONTRAST 0x30
87 #define THP7312_REG_AF_SETTING_CONTINUOUS_PDAF 0x70
88 #define THP7312_REG_AF_SETTING_CONTINUOUS_HYBRID 0xf0
89 #define THP7312_REG_AF_SUPPORT CCI_REG8(0xf043)
91 #define THP7312_AF_SUPPORT_CONTRAST BIT(0)
92 #define THP7312_REG_SATURATION CCI_REG8(0xf052)
93 #define THP7312_REG_SHARPNESS CCI_REG8(0xf053)
94 #define THP7312_REG_BRIGHTNESS CCI_REG8(0xf056)
95 #define THP7312_REG_CONTRAST CCI_REG8(0xf057)
96 #define THP7312_REG_NOISE_REDUCTION CCI_REG8(0xf059)
99 #define TH7312_REG_CUSTOM_MIPI_SET CCI_REG8(0xf0f6)
100 #define TH7312_REG_CUSTOM_MIPI_STATUS CCI_REG8(0xf0f7)
101 #define TH7312_REG_CUSTOM_MIPI_RD CCI_REG8(0xf0f8)
102 #define TH7312_REG_CUSTOM_MIPI_TD CCI_REG8(0xf0f9)
109 #define THP7312_REG_FW_DRIVABILITY CCI_REG32(0xd65c)
110 #define THP7312_REG_FW_DEST_BANK_ADDR CCI_REG32(0xff08)
111 #define THP7312_REG_FW_VERIFY_RESULT CCI_REG8(0xff60)
112 #define THP7312_REG_FW_RESET_FLASH CCI_REG8(0xff61)
113 #define THP7312_REG_FW_MEMORY_IO_SETTING CCI_REG8(0xff62)
115 #define THP7312_FW_MEMORY_IO_GPIO1 0
116 #define THP7312_REG_FW_CRC_RESULT CCI_REG32(0xff64)
117 #define THP7312_REG_FW_STATUS CCI_REG8(0xfffc)
121 #define THP7312_FW_VERSION_MINOR(v) ((v) & 0xff)
130 * enum thp7312_focus_state - State of the focus handler
134 * @THP7312_FOCUS_STATE_AUTO: Continuous auto-focus
137 * @THP7312_FOCUS_STATE_ONESHOT: One-shot auto-focus
149 * manual -> auto [label="FOCUS_AUTO <- true"]
150 * locked -> auto [label="FOCUS_AUTO <- true"]
151 * oneshot -> auto [label="FOCUS_AUTO <- true"]
152 * auto -> locked [label="FOCUS_AUTO <- false"]
154 * locked -> manual [label="FOCUS_ABSOLUTE <- *"]
155 * oneshot -> manual [label="FOCUS_ABSOLUTE <- *"]
157 * manual -> oneshot [label="FOCUS_START <- *"]
158 * locked -> oneshot [label="FOCUS_START <- *"]
169 THP7312_BOOT_MODE_2WIRE_SLAVE = 0,
197 "vddgpio-0",
198 "vddgpio-1",
207 { 30, 300000000, 0x81 },
208 { 60, 387500000, 0x82 },
209 { 0 }
216 { 30, 300000000, 0x81 },
217 { 0 }
224 { 30, 600000000, 0x81 },
225 { 0 }
232 { 20, 600000000, 0x81 },
233 { 0 }
319 if (!nearest && (mode->width != width || mode->height != height)) in thp7312_find_mode()
336 for (rate = mode->rates; rate->fps && best_delta; ++rate) { in thp7312_find_rate()
337 unsigned int delta = abs(rate->fps - fps); in thp7312_find_rate()
351 /* -----------------------------------------------------------------------------
359 timeout_us, false, (dev)->regmap, addr, \
366 u8 used_lanes = 0; in thp7312_map_data_lanes()
367 u8 val = 0; in thp7312_map_data_lanes()
372 * data-lanes array, so we need to do a conversion. Do this in the same in thp7312_map_data_lanes()
373 * pass as validating data-lanes. in thp7312_map_data_lanes()
375 for (i = 0; i < num_lanes; i++) { in thp7312_map_data_lanes()
377 return -EINVAL; in thp7312_map_data_lanes()
380 return -EINVAL; in thp7312_map_data_lanes()
385 * data-lanes is 1-indexed while the field position in the in thp7312_map_data_lanes()
386 * register is 0-indexed. in thp7312_map_data_lanes()
388 val |= i << ((lanes[i] - 1) * 2); in thp7312_map_data_lanes()
393 return 0; in thp7312_map_data_lanes()
398 struct device *dev = thp7312->dev; in thp7312_set_mipi_lanes()
399 int ret = 0; in thp7312_set_mipi_lanes()
402 cci_write(thp7312->regmap, TH7312_REG_CUSTOM_MIPI_RD, in thp7312_set_mipi_lanes()
403 thp7312->sensors[0].lane_remap, &ret); in thp7312_set_mipi_lanes()
404 cci_write(thp7312->regmap, TH7312_REG_CUSTOM_MIPI_TD, in thp7312_set_mipi_lanes()
405 thp7312->lane_remap, &ret); in thp7312_set_mipi_lanes()
406 cci_write(thp7312->regmap, TH7312_REG_CUSTOM_MIPI_SET, 1, &ret); in thp7312_set_mipi_lanes()
412 val, val == 0x00, 100000, 2000000); in thp7312_set_mipi_lanes()
418 return 0; in thp7312_set_mipi_lanes()
425 struct device *dev = thp7312->dev; in thp7312_change_mode()
426 u64 val = 0; in thp7312_change_mode()
430 val == 0x80, 20000, 200000); in thp7312_change_mode()
431 if (ret < 0) { in thp7312_change_mode()
436 cci_write(thp7312->regmap, THP7312_REG_VIDEO_IMAGE_SIZE, in thp7312_change_mode()
437 mode->reg_image_size, &ret); in thp7312_change_mode()
438 cci_write(thp7312->regmap, THP7312_REG_VIDEO_FRAME_RATE_MODE, in thp7312_change_mode()
439 rate->reg_frame_rate_mode, &ret); in thp7312_change_mode()
440 cci_write(thp7312->regmap, THP7312_REG_JPEG_COMPRESSION_FACTOR, 0x5e, in thp7312_change_mode()
442 cci_write(thp7312->regmap, THP7312_REG_SET_DRIVING_MODE, 0x01, &ret); in thp7312_change_mode()
448 val, val == 0x01, 20000, 100000); in thp7312_change_mode()
449 if (ret < 0) { in thp7312_change_mode()
454 return 0; in thp7312_change_mode()
462 switch (format->code) { in thp7312_set_framefmt()
473 return -EINVAL; in thp7312_set_framefmt()
476 return cci_write(thp7312->regmap, in thp7312_set_framefmt()
493 fmt = v4l2_subdev_state_get_format(sd_state, 0); in thp7312_init_mode()
494 interval = v4l2_subdev_state_get_interval(sd_state, 0); in thp7312_init_mode()
496 mode = thp7312_find_mode(fmt->width, fmt->height, false); in thp7312_init_mode()
497 rate = thp7312_find_rate(mode, interval->denominator, false); in thp7312_init_mode()
500 return -EINVAL; in thp7312_init_mode()
511 return cci_write(thp7312->regmap, THP7312_REG_SET_OUTPUT_ENABLE, in thp7312_stream_enable()
518 struct device *dev = thp7312->dev; in thp7312_check_status_stream_mode()
519 u64 status = 0; in thp7312_check_status_stream_mode()
522 while (status != 0x80) { in thp7312_check_status_stream_mode()
523 ret = cci_read(thp7312->regmap, THP7312_REG_CAMERA_STATUS, in thp7312_check_status_stream_mode()
528 if (status == 0x80) { in thp7312_check_status_stream_mode()
530 return 0; in thp7312_check_status_stream_mode()
533 if (status != 0x00) { in thp7312_check_status_stream_mode()
535 return -EINVAL; in thp7312_check_status_stream_mode()
542 return 0; in thp7312_check_status_stream_mode()
549 gpiod_set_value_cansleep(thp7312->reset_gpio, 1); in thp7312_reset()
555 rate = clk_get_rate(thp7312->iclk); in thp7312_reset()
558 gpiod_set_value_cansleep(thp7312->reset_gpio, 0); in thp7312_reset()
569 /* -----------------------------------------------------------------------------
575 regulator_bulk_disable(ARRAY_SIZE(thp7312->supplies), thp7312->supplies); in __thp7312_power_off()
576 clk_disable_unprepare(thp7312->iclk); in __thp7312_power_off()
586 struct device *dev = thp7312->dev; in __thp7312_power_on()
589 ret = regulator_bulk_enable(ARRAY_SIZE(thp7312->supplies), in __thp7312_power_on()
590 thp7312->supplies); in __thp7312_power_on()
591 if (ret < 0) in __thp7312_power_on()
594 ret = clk_prepare_enable(thp7312->iclk); in __thp7312_power_on()
595 if (ret < 0) { in __thp7312_power_on()
597 regulator_bulk_disable(ARRAY_SIZE(thp7312->supplies), in __thp7312_power_on()
598 thp7312->supplies); in __thp7312_power_on()
608 return 0; in __thp7312_power_on()
616 if (ret < 0) in thp7312_power_on()
620 if (ret < 0) in thp7312_power_on()
627 return 0; in thp7312_power_on()
641 thp7312->ctrls_applied = false; in thp7312_pm_runtime_suspend()
643 return 0; in thp7312_pm_runtime_suspend()
659 /* -----------------------------------------------------------------------------
667 for (i = 0; i < ARRAY_SIZE(thp7312_colour_fmts); ++i) { in thp7312_find_bus_code()
679 if (code->index >= ARRAY_SIZE(thp7312_colour_fmts)) in thp7312_enum_mbus_code()
680 return -EINVAL; in thp7312_enum_mbus_code()
682 code->code = thp7312_colour_fmts[code->index]; in thp7312_enum_mbus_code()
684 return 0; in thp7312_enum_mbus_code()
691 if (!thp7312_find_bus_code(fse->code)) in thp7312_enum_frame_size()
692 return -EINVAL; in thp7312_enum_frame_size()
694 if (fse->index >= ARRAY_SIZE(thp7312_mode_info_data)) in thp7312_enum_frame_size()
695 return -EINVAL; in thp7312_enum_frame_size()
697 fse->min_width = thp7312_mode_info_data[fse->index].width; in thp7312_enum_frame_size()
698 fse->max_width = fse->min_width; in thp7312_enum_frame_size()
699 fse->min_height = thp7312_mode_info_data[fse->index].height; in thp7312_enum_frame_size()
700 fse->max_height = fse->min_height; in thp7312_enum_frame_size()
702 return 0; in thp7312_enum_frame_size()
711 unsigned int index = fie->index; in thp7312_enum_frame_interval()
713 if (!thp7312_find_bus_code(fie->code)) in thp7312_enum_frame_interval()
714 return -EINVAL; in thp7312_enum_frame_interval()
716 mode = thp7312_find_mode(fie->width, fie->height, false); in thp7312_enum_frame_interval()
718 return -EINVAL; in thp7312_enum_frame_interval()
720 for (rate = mode->rates; rate->fps; ++rate, --index) { in thp7312_enum_frame_interval()
722 fie->interval.numerator = 1; in thp7312_enum_frame_interval()
723 fie->interval.denominator = rate->fps; in thp7312_enum_frame_interval()
725 return 0; in thp7312_enum_frame_interval()
729 return -EINVAL; in thp7312_enum_frame_interval()
737 struct v4l2_mbus_framefmt *mbus_fmt = &format->format; in thp7312_set_fmt()
742 if (!thp7312_find_bus_code(mbus_fmt->code)) in thp7312_set_fmt()
743 mbus_fmt->code = thp7312_colour_fmts[0]; in thp7312_set_fmt()
745 mode = thp7312_find_mode(mbus_fmt->width, mbus_fmt->height, true); in thp7312_set_fmt()
747 fmt = v4l2_subdev_state_get_format(sd_state, 0); in thp7312_set_fmt()
749 fmt->code = mbus_fmt->code; in thp7312_set_fmt()
750 fmt->width = mode->width; in thp7312_set_fmt()
751 fmt->height = mode->height; in thp7312_set_fmt()
752 fmt->colorspace = V4L2_COLORSPACE_SRGB; in thp7312_set_fmt()
753 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace); in thp7312_set_fmt()
754 fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE; in thp7312_set_fmt()
755 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace); in thp7312_set_fmt()
759 interval = v4l2_subdev_state_get_interval(sd_state, 0); in thp7312_set_fmt()
760 interval->numerator = 1; in thp7312_set_fmt()
761 interval->denominator = mode->rates[0].fps; in thp7312_set_fmt()
763 if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) in thp7312_set_fmt()
764 thp7312->link_freq = mode->rates[0].link_freq; in thp7312_set_fmt()
766 return 0; in thp7312_set_fmt()
780 /* Avoid divisions by 0, pick the highest frame if the interval is 0. */ in thp7312_set_frame_interval()
781 fps = fi->interval.numerator in thp7312_set_frame_interval()
782 ? DIV_ROUND_CLOSEST(fi->interval.denominator, fi->interval.numerator) in thp7312_set_frame_interval()
785 fmt = v4l2_subdev_state_get_format(sd_state, 0); in thp7312_set_frame_interval()
786 mode = thp7312_find_mode(fmt->width, fmt->height, false); in thp7312_set_frame_interval()
789 interval = v4l2_subdev_state_get_interval(sd_state, 0); in thp7312_set_frame_interval()
790 interval->numerator = 1; in thp7312_set_frame_interval()
791 interval->denominator = rate->fps; in thp7312_set_frame_interval()
793 if (fi->which == V4L2_SUBDEV_FORMAT_ACTIVE) in thp7312_set_frame_interval()
794 thp7312->link_freq = rate->link_freq; in thp7312_set_frame_interval()
796 fi->interval = *interval; in thp7312_set_frame_interval()
798 return 0; in thp7312_set_frame_interval()
812 pm_runtime_mark_last_busy(thp7312->dev); in thp7312_s_stream()
813 pm_runtime_put_autosuspend(thp7312->dev); in thp7312_s_stream()
817 return 0; in thp7312_s_stream()
820 ret = pm_runtime_resume_and_get(thp7312->dev); in thp7312_s_stream()
828 if (!thp7312->ctrls_applied) { in thp7312_s_stream()
829 ret = __v4l2_ctrl_handler_setup(&thp7312->ctrl_handler); in thp7312_s_stream()
833 thp7312->ctrls_applied = true; in thp7312_s_stream()
843 pm_runtime_mark_last_busy(thp7312->dev); in thp7312_s_stream()
844 pm_runtime_put_autosuspend(thp7312->dev); in thp7312_s_stream()
854 const struct thp7312_mode_info *default_mode = &thp7312_mode_info_data[0]; in thp7312_init_state()
858 fmt = v4l2_subdev_state_get_format(sd_state, 0); in thp7312_init_state()
859 interval = v4l2_subdev_state_get_interval(sd_state, 0); in thp7312_init_state()
865 fmt->code = MEDIA_BUS_FMT_YUYV8_1X16; in thp7312_init_state()
866 fmt->colorspace = V4L2_COLORSPACE_SRGB; in thp7312_init_state()
867 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace); in thp7312_init_state()
868 fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE; in thp7312_init_state()
869 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace); in thp7312_init_state()
870 fmt->width = default_mode->width; in thp7312_init_state()
871 fmt->height = default_mode->height; in thp7312_init_state()
872 fmt->field = V4L2_FIELD_NONE; in thp7312_init_state()
874 interval->numerator = 1; in thp7312_init_state()
875 interval->denominator = default_mode->rates[0].fps; in thp7312_init_state()
877 return 0; in thp7312_init_state()
910 /* -----------------------------------------------------------------------------
916 return container_of(ctrl->handler, struct thp7312_device, ctrl_handler); in to_thp7312_from_ctrl()
919 /* 0: 3000cm, 18: 8cm */
929 enum thp7312_focus_state new_state = thp7312->focus_state; in thp7312_set_focus()
933 int ret = 0; in thp7312_set_focus()
936 if (thp7312->focus_absolute->is_new) { in thp7312_set_focus()
939 value = thp7312_focus_values[thp7312->focus_absolute->val]; in thp7312_set_focus()
941 ret = cci_write(thp7312->regmap, in thp7312_set_focus()
948 switch (thp7312->focus_state) { in thp7312_set_focus()
951 if (thp7312->focus_auto->val) in thp7312_set_focus()
953 else if (thp7312->focus_start->is_new) in thp7312_set_focus()
958 if (!thp7312->focus_auto->val) in thp7312_set_focus()
963 if (thp7312->focus_auto->val) in thp7312_set_focus()
965 else if (thp7312->focus_start->is_new) in thp7312_set_focus()
967 else if (thp7312->focus_absolute->is_new) in thp7312_set_focus()
972 if (thp7312->focus_auto->val) in thp7312_set_focus()
974 else if (thp7312->focus_start->is_new) in thp7312_set_focus()
976 else if (thp7312->focus_absolute->is_new) in thp7312_set_focus()
983 * one-shot focus is requested, there's nothing new to program to the in thp7312_set_focus()
986 if (thp7312->focus_state == new_state && in thp7312_set_focus()
987 !thp7312->focus_method->is_new && !thp7312->focus_start->is_new) in thp7312_set_focus()
988 return 0; in thp7312_set_focus()
993 switch (thp7312->focus_method->val) { in thp7312_set_focus()
1026 cci_write(thp7312->regmap, THP7312_REG_AF_SETTING, af_setting, &ret); in thp7312_set_focus()
1029 (thp7312->focus_state == THP7312_FOCUS_STATE_AUTO || in thp7312_set_focus()
1030 thp7312->focus_state == THP7312_FOCUS_STATE_ONESHOT)) { in thp7312_set_focus()
1032 cci_write(thp7312->regmap, THP7312_REG_AF_CONTROL, in thp7312_set_focus()
1036 cci_write(thp7312->regmap, THP7312_REG_AF_CONTROL, af_control, &ret); in thp7312_set_focus()
1041 thp7312->focus_state = new_state; in thp7312_set_focus()
1043 return 0; in thp7312_set_focus()
1049 int ret = 0; in thp7312_s_ctrl()
1052 if (ctrl->flags & V4L2_CTRL_FLAG_INACTIVE) in thp7312_s_ctrl()
1053 return -EINVAL; in thp7312_s_ctrl()
1055 if (!pm_runtime_get_if_active(thp7312->dev)) in thp7312_s_ctrl()
1056 return 0; in thp7312_s_ctrl()
1058 switch (ctrl->id) { in thp7312_s_ctrl()
1060 cci_write(thp7312->regmap, THP7312_REG_BRIGHTNESS, in thp7312_s_ctrl()
1061 ctrl->val + 10, &ret); in thp7312_s_ctrl()
1065 /* 0 = Auto adjust frame rate, 1 = Fix frame rate */ in thp7312_s_ctrl()
1066 cci_write(thp7312->regmap, THP7312_REG_AE_FIX_FRAME_RATE, in thp7312_s_ctrl()
1067 ctrl->val ? 0 : 1, &ret); in thp7312_s_ctrl()
1079 value = (thp7312->hflip->val ? THP7312_REG_FLIP_MIRROR_MIRROR : 0) in thp7312_s_ctrl()
1080 | (thp7312->vflip->val ? THP7312_REG_FLIP_MIRROR_FLIP : 0); in thp7312_s_ctrl()
1082 cci_write(thp7312->regmap, THP7312_REG_FLIP_MIRROR, value, &ret); in thp7312_s_ctrl()
1087 value = thp7312->noise_reduction_auto->val ? 0 in thp7312_s_ctrl()
1089 thp7312->noise_reduction_absolute->val; in thp7312_s_ctrl()
1091 cci_write(thp7312->regmap, THP7312_REG_NOISE_REDUCTION, value, in thp7312_s_ctrl()
1096 value = ctrl->val ? THP7312_WB_MODE_AUTO : THP7312_WB_MODE_MANUAL; in thp7312_s_ctrl()
1098 cci_write(thp7312->regmap, THP7312_REG_WB_MODE, value, &ret); in thp7312_s_ctrl()
1102 cci_write(thp7312->regmap, THP7312_REG_MANUAL_WB_RED_GAIN, in thp7312_s_ctrl()
1103 ctrl->val, &ret); in thp7312_s_ctrl()
1107 cci_write(thp7312->regmap, THP7312_REG_MANUAL_WB_BLUE_GAIN, in thp7312_s_ctrl()
1108 ctrl->val, &ret); in thp7312_s_ctrl()
1112 cci_write(thp7312->regmap, THP7312_REG_AE_EXPOSURE_COMPENSATION, in thp7312_s_ctrl()
1113 ctrl->val, &ret); in thp7312_s_ctrl()
1117 if (ctrl->val == V4L2_CID_POWER_LINE_FREQUENCY_60HZ) { in thp7312_s_ctrl()
1119 } else if (ctrl->val == V4L2_CID_POWER_LINE_FREQUENCY_50HZ) { in thp7312_s_ctrl()
1122 if (thp7312->fw_version == THP7312_FW_VERSION(40, 3)) { in thp7312_s_ctrl()
1130 cci_write(thp7312->regmap, THP7312_REG_AE_FLICKER_MODE, in thp7312_s_ctrl()
1135 cci_write(thp7312->regmap, THP7312_REG_SATURATION, in thp7312_s_ctrl()
1136 ctrl->val, &ret); in thp7312_s_ctrl()
1140 cci_write(thp7312->regmap, THP7312_REG_CONTRAST, in thp7312_s_ctrl()
1141 ctrl->val, &ret); in thp7312_s_ctrl()
1145 cci_write(thp7312->regmap, THP7312_REG_SHARPNESS, in thp7312_s_ctrl()
1146 ctrl->val, &ret); in thp7312_s_ctrl()
1153 pm_runtime_mark_last_busy(thp7312->dev); in thp7312_s_ctrl()
1154 pm_runtime_put_autosuspend(thp7312->dev); in thp7312_s_ctrl()
1164 * Refer to Documentation/userspace-api/media/drivers/thp7312.rst for details.
1169 .name = "Auto-Focus Method",
1180 .name = "Auto-Focus Method",
1194 .min = 0,
1203 .min = 0,
1212 .min = 0,
1213 .def = 0,
1220 -2000, -1667, -1333, -1000, -667, -333, 0, 333, 667, 1000, 1333, 1667, 2000
1225 struct v4l2_ctrl_handler *hdl = &thp7312->ctrl_handler; in thp7312_init_controls()
1226 struct device *dev = thp7312->dev; in thp7312_init_controls()
1235 * Check what auto-focus methods the connected sensor supports, if any. in thp7312_init_controls()
1239 if (thp7312->fw_version >= THP7312_FW_VERSION(90, 3)) { in thp7312_init_controls()
1242 ret = cci_read(thp7312->regmap, THP7312_REG_AF_SUPPORT, &val, in thp7312_init_controls()
1255 + (af_support ? 4 : 0); in thp7312_init_controls()
1266 thp7312->focus_state = THP7312_FOCUS_STATE_MANUAL; in thp7312_init_controls()
1268 thp7312->focus_auto = in thp7312_init_controls()
1271 0, 1, 1, 1); in thp7312_init_controls()
1272 thp7312->focus_absolute = in thp7312_init_controls()
1275 0, ARRAY_SIZE(thp7312_focus_values), in thp7312_init_controls()
1276 1, 0); in thp7312_init_controls()
1277 thp7312->focus_method = in thp7312_init_controls()
1279 thp7312->focus_start = in thp7312_init_controls()
1284 v4l2_ctrl_cluster(4, &thp7312->focus_auto); in thp7312_init_controls()
1288 0, 1, 1, 1); in thp7312_init_controls()
1297 -10, 10, 1, 0); in thp7312_init_controls()
1299 0, 31, 1, 10); in thp7312_init_controls()
1301 0, 20, 1, 10); in thp7312_init_controls()
1303 0, 31, 1, 8); in thp7312_init_controls()
1305 thp7312->hflip = v4l2_ctrl_new_std(hdl, &thp7312_ctrl_ops, in thp7312_init_controls()
1306 V4L2_CID_HFLIP, 0, 1, 1, 0); in thp7312_init_controls()
1307 thp7312->vflip = v4l2_ctrl_new_std(hdl, &thp7312_ctrl_ops, in thp7312_init_controls()
1308 V4L2_CID_VFLIP, 0, 1, 1, 0); in thp7312_init_controls()
1310 v4l2_ctrl_cluster(2, &thp7312->hflip); in thp7312_init_controls()
1314 ARRAY_SIZE(exp_bias_qmenu) - 1, in thp7312_init_controls()
1319 V4L2_CID_POWER_LINE_FREQUENCY_60HZ, 0, in thp7312_init_controls()
1322 thp7312->link_freq = thp7312_mode_info_data[0].rates[0].link_freq; in thp7312_init_controls()
1325 V4L2_CID_LINK_FREQ, 0, 0, in thp7312_init_controls()
1326 &thp7312->link_freq); in thp7312_init_controls()
1341 for (i = 0; i < ARRAY_SIZE(thp7312_v4l2_ctrls_custom); i++) { in thp7312_init_controls()
1348 if (ctrl_cfg->id == V4L2_CID_THP7312_NOISE_REDUCTION_AUTO) in thp7312_init_controls()
1349 thp7312->noise_reduction_auto = ctrl; in thp7312_init_controls()
1350 else if (ctrl_cfg->id == V4L2_CID_THP7312_NOISE_REDUCTION_ABSOLUTE) in thp7312_init_controls()
1351 thp7312->noise_reduction_absolute = ctrl; in thp7312_init_controls()
1354 v4l2_ctrl_cluster(2, &thp7312->noise_reduction_auto); in thp7312_init_controls()
1356 if (hdl->error) { in thp7312_init_controls()
1358 ret = hdl->error; in thp7312_init_controls()
1362 link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; in thp7312_init_controls()
1371 /* -----------------------------------------------------------------------------
1377 * variable-size "header". Both are stored in flash memory.
1397 0xd5, 0x18, 0x00, 0x00, 0x00, 0x80
1401 0xd5, 0x0c, 0x80, 0x00, 0x00, 0x00
1405 0xd5, 0x04
1413 * BB BB BB: (write size - 1)
1414 * Source address always starts from 0
1416 static const u8 thp7312_cmd_write_ram_to_flash[] = { 0xff, 0x70, 0x0f };
1423 * BB BB BB: (calculate size - 1)
1425 static const u8 thp7312_cmd_calc_crc[] = { 0xff, 0x70, 0x09 };
1427 static const u8 thp7312_jedec_rdid[] = { SPINOR_OP_RDID, 0x00, 0x00, 0x00 };
1428 static const u8 thp7312_jedec_rdsr[] = { SPINOR_OP_RDSR, 0x00, 0x00, 0x00 };
1433 u64 val = 0; in thp7312_read_firmware_version()
1434 int ret = 0; in thp7312_read_firmware_version()
1438 cci_read(thp7312->regmap, THP7312_REG_FIRMWARE_VERSION_1, &val, &ret); in thp7312_read_firmware_version()
1441 cci_read(thp7312->regmap, THP7312_REG_FIRMWARE_VERSION_2, &val, &ret); in thp7312_read_firmware_version()
1444 thp7312->fw_version = THP7312_FW_VERSION(major, minor); in thp7312_read_firmware_version()
1451 struct i2c_client *client = to_i2c_client(thp7312->dev); in thp7312_write_buf()
1455 return ret >= 0 ? 0 : ret; in thp7312_write_buf()
1461 struct device *dev = thp7312->dev; in __thp7312_flash_reg_write()
1468 return -EINVAL; in __thp7312_flash_reg_write()
1473 if (ret < 0) { in __thp7312_flash_reg_write()
1479 temp_write_buf[0] = 0xd5; in __thp7312_flash_reg_write()
1480 temp_write_buf[1] = 0x00; in __thp7312_flash_reg_write()
1483 if (ret < 0) in __thp7312_flash_reg_write()
1489 return 0; in __thp7312_flash_reg_write()
1496 struct i2c_client *client = to_i2c_client(thp7312->dev); in __thp7312_flash_reg_read()
1504 msgs[0].addr = client->addr; in __thp7312_flash_reg_read()
1505 msgs[0].flags = 0; in __thp7312_flash_reg_read()
1506 msgs[0].len = sizeof(thp7312_cmd_read_reg); in __thp7312_flash_reg_read()
1507 msgs[0].buf = (u8 *)thp7312_cmd_read_reg; in __thp7312_flash_reg_read()
1509 msgs[1].addr = client->addr; in __thp7312_flash_reg_read()
1514 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); in __thp7312_flash_reg_read()
1515 return ret >= 0 ? 0 : ret; in __thp7312_flash_reg_read()
1527 struct device *dev = thp7312->dev; in thp7312_fw_prepare_config()
1530 ret = cci_write(thp7312->regmap, THP7312_REG_FW_MEMORY_IO_SETTING, in thp7312_fw_prepare_config()
1538 ret = cci_write(thp7312->regmap, THP7312_REG_FW_DRIVABILITY, 0x00777777, in thp7312_fw_prepare_config()
1550 struct device *dev = thp7312->dev; in thp7312_fw_prepare_check()
1551 u8 read_buf[3] = { 0 }; in thp7312_fw_prepare_check()
1561 dev_dbg(dev, "Flash Memory: JEDEC ID = 0x%x 0x%x 0x%x\n", in thp7312_fw_prepare_check()
1562 read_buf[0], read_buf[1], read_buf[2]); in thp7312_fw_prepare_check()
1569 struct device *dev = thp7312->dev; in thp7312_fw_prepare_reset()
1572 ret = cci_write(thp7312->regmap, THP7312_REG_FW_RESET_FLASH, 0x81, NULL); in thp7312_fw_prepare_reset()
1584 struct device *dev = thp7312->dev; in thp7312_flash_erase()
1585 u8 read_buf[1] = { 0 }; in thp7312_flash_erase()
1590 for (block = 0; block < 3; block++) { in thp7312_flash_erase()
1591 const u8 jedec_se[] = { SPINOR_OP_SE, block, 0x00, 0x00 }; in thp7312_flash_erase()
1594 if (ret < 0) { in thp7312_flash_erase()
1600 if (ret < 0) { in thp7312_flash_erase()
1605 for (i = 0; i < THP7312_FLASH_MEMORY_ERASE_TIMEOUT; i++) { in thp7312_flash_erase()
1610 /* Check Busy bit. Busy == 0x0 means erase complete. */ in thp7312_flash_erase()
1611 if (!(read_buf[0] & SR_WIP)) in thp7312_flash_erase()
1622 if (read_buf[0] & SR_WEL) in thp7312_flash_erase()
1633 struct device *dev = thp7312->dev; in thp7312_write_download_data_by_unit()
1634 u8 *write_buf = thp7312->fw_write_buf; in thp7312_write_download_data_by_unit()
1637 dev_dbg(dev, "%s: addr = 0x%04x, data = 0x%p, size = %u\n", in thp7312_write_download_data_by_unit()
1640 write_buf[0] = (addr >> 8) & 0xff; in thp7312_write_download_data_by_unit()
1641 write_buf[1] = (addr >> 0) & 0xff; in thp7312_write_download_data_by_unit()
1646 * Command ID (address to download): 0x0000 - 0x7fff in thp7312_write_download_data_by_unit()
1650 if (ret < 0) in thp7312_write_download_data_by_unit()
1653 return ret >= 0 ? FW_UPLOAD_ERR_NONE : FW_UPLOAD_ERR_RW_ERROR; in thp7312_write_download_data_by_unit()
1659 struct device *dev = thp7312->dev; in thp7312_fw_load_to_ram()
1669 for (i = 0; i < num_banks; i++) { in thp7312_fw_load_to_ram()
1670 const u32 bank_addr = 0x10000000 | (i * THP7312_RAM_BANK_SIZE); in thp7312_fw_load_to_ram()
1674 ret = cci_write(thp7312->regmap, THP7312_REG_FW_DEST_BANK_ADDR, in thp7312_fw_load_to_ram()
1685 for (j = 0 ; j < num_chunks; j++) { in thp7312_fw_load_to_ram()
1701 size -= chunk_size; in thp7312_fw_load_to_ram()
1718 command[cmd_size] = (dest & 0xff0000) >> 16; in thp7312_fw_write_to_flash()
1719 command[cmd_size + 1] = (dest & 0x00ff00) >> 8; in thp7312_fw_write_to_flash()
1720 command[cmd_size + 2] = (dest & 0x0000ff); in thp7312_fw_write_to_flash()
1721 command[cmd_size + 3] = ((write_size - 1) & 0xff0000) >> 16; in thp7312_fw_write_to_flash()
1722 command[cmd_size + 4] = ((write_size - 1) & 0x00ff00) >> 8; in thp7312_fw_write_to_flash()
1723 command[cmd_size + 5] = ((write_size - 1) & 0x0000ff); in thp7312_fw_write_to_flash()
1726 if (ret < 0) in thp7312_fw_write_to_flash()
1731 ret = cci_read(thp7312->regmap, THP7312_REG_FW_VERIFY_RESULT, &val, in thp7312_fw_write_to_flash()
1733 if (ret < 0) in thp7312_fw_write_to_flash()
1742 struct device *dev = thp7312->dev; in thp7312_fw_check_crc()
1743 u16 header_size = fw_size - THP7312_FW_RAM_SIZE; in thp7312_fw_check_crc()
1746 u32 size = THP7312_FW_RAM_SIZE - 4; in thp7312_fw_check_crc()
1753 command[cmd_size] = 0; in thp7312_fw_check_crc()
1754 command[cmd_size + 1] = (header_size >> 8) & 0xff; in thp7312_fw_check_crc()
1755 command[cmd_size + 2] = header_size & 0xff; in thp7312_fw_check_crc()
1757 command[cmd_size + 3] = (size >> 16) & 0xff; in thp7312_fw_check_crc()
1758 command[cmd_size + 4] = (size >> 8) & 0xff; in thp7312_fw_check_crc()
1759 command[cmd_size + 5] = size & 0xff; in thp7312_fw_check_crc()
1762 if (ret < 0) in thp7312_fw_check_crc()
1767 fw_crc = get_unaligned_be32(&fw_data[fw_size - 4]); in thp7312_fw_check_crc()
1769 ret = cci_read(thp7312->regmap, THP7312_REG_FW_CRC_RESULT, &crc, NULL); in thp7312_fw_check_crc()
1770 if (ret < 0) in thp7312_fw_check_crc()
1774 dev_err(dev, "CRC mismatch: firmware 0x%08x, flash 0x%08llx\n", in thp7312_fw_check_crc()
1785 struct thp7312_device *thp7312 = fw_upload->dd_handle; in thp7312_fw_prepare()
1786 struct device *dev = thp7312->dev; in thp7312_fw_prepare()
1789 mutex_lock(&thp7312->fw_lock); in thp7312_fw_prepare()
1790 thp7312->fw_cancel = false; in thp7312_fw_prepare()
1791 mutex_unlock(&thp7312->fw_lock); in thp7312_fw_prepare()
1811 mutex_lock(&thp7312->fw_lock); in thp7312_fw_prepare()
1812 ret = thp7312->fw_cancel ? FW_UPLOAD_ERR_CANCELED : FW_UPLOAD_ERR_NONE; in thp7312_fw_prepare()
1813 mutex_unlock(&thp7312->fw_lock); in thp7312_fw_prepare()
1822 struct thp7312_device *thp7312 = fw_upload->dd_handle; in thp7312_fw_write()
1823 struct device *dev = thp7312->dev; in thp7312_fw_write()
1824 u16 header_size = size - THP7312_FW_RAM_SIZE; in thp7312_fw_write()
1828 mutex_lock(&thp7312->fw_lock); in thp7312_fw_write()
1829 cancel = thp7312->fw_cancel; in thp7312_fw_write()
1830 mutex_unlock(&thp7312->fw_lock); in thp7312_fw_write()
1843 ret = thp7312_fw_write_to_flash(thp7312, 0, 0x1ffff); in thp7312_fw_write()
1851 ret = thp7312_fw_write_to_flash(thp7312, 0x20000, header_size - 1); in thp7312_fw_write()
1871 * This may be called asynchronously with an on-going update. All other
1878 struct thp7312_device *thp7312 = fw_upload->dd_handle; in thp7312_fw_cancel()
1880 mutex_lock(&thp7312->fw_lock); in thp7312_fw_cancel()
1881 thp7312->fw_cancel = true; in thp7312_fw_cancel()
1882 mutex_unlock(&thp7312->fw_lock); in thp7312_fw_cancel()
1894 struct device *dev = thp7312->dev; in thp7312_register_flash_mode()
1901 mutex_init(&thp7312->fw_lock); in thp7312_register_flash_mode()
1903 thp7312->fw_write_buf = devm_kzalloc(dev, THP7312_FW_DOWNLOAD_UNIT + 2, in thp7312_register_flash_mode()
1905 if (!thp7312->fw_write_buf) in thp7312_register_flash_mode()
1906 return -ENOMEM; in thp7312_register_flash_mode()
1909 if (ret < 0) in thp7312_register_flash_mode()
1912 ret = cci_read(thp7312->regmap, THP7312_REG_FW_STATUS, &val, NULL); in thp7312_register_flash_mode()
1918 fwl = firmware_upload_register(THIS_MODULE, dev, "thp7312-firmware", in thp7312_register_flash_mode()
1926 thp7312->fwl = fwl; in thp7312_register_flash_mode()
1927 return 0; in thp7312_register_flash_mode()
1934 /* -----------------------------------------------------------------------------
1942 for (i = 0; i < ARRAY_SIZE(thp7312->supplies); i++) in thp7312_get_regulators()
1943 thp7312->supplies[i].supply = thp7312_supply_name[i]; in thp7312_get_regulators()
1945 return devm_regulator_bulk_get(thp7312->dev, in thp7312_get_regulators()
1946 ARRAY_SIZE(thp7312->supplies), in thp7312_get_regulators()
1947 thp7312->supplies); in thp7312_get_regulators()
1953 struct device *dev = thp7312->dev; in thp7312_sensor_parse_dt()
1964 if (ret < 0) { in thp7312_sensor_parse_dt()
1966 return -EINVAL; in thp7312_sensor_parse_dt()
1969 if (reg >= ARRAY_SIZE(thp7312->sensors)) { in thp7312_sensor_parse_dt()
1970 dev_err(dev, "Out-of-bounds 'reg' value %u\n", reg); in thp7312_sensor_parse_dt()
1971 return -EINVAL; in thp7312_sensor_parse_dt()
1974 sensor = &thp7312->sensors[reg]; in thp7312_sensor_parse_dt()
1975 if (sensor->info) { in thp7312_sensor_parse_dt()
1977 return -EINVAL; in thp7312_sensor_parse_dt()
1981 if (ret < 0) { in thp7312_sensor_parse_dt()
1983 return -EINVAL; in thp7312_sensor_parse_dt()
1986 for (i = 0; i < ARRAY_SIZE(thp7312_sensor_info); i++) { in thp7312_sensor_parse_dt()
1990 if (!strcmp(info->model, model)) { in thp7312_sensor_parse_dt()
1991 sensor->info = info; in thp7312_sensor_parse_dt()
1996 if (!sensor->info) { in thp7312_sensor_parse_dt()
1998 return -EINVAL; in thp7312_sensor_parse_dt()
2001 ret = fwnode_property_read_u32_array(node, "data-lanes", values, in thp7312_sensor_parse_dt()
2003 if (ret < 0) { in thp7312_sensor_parse_dt()
2004 dev_err(dev, "Failed to read property data-lanes: %d\n", ret); in thp7312_sensor_parse_dt()
2008 for (i = 0; i < ARRAY_SIZE(data_lanes); ++i) in thp7312_sensor_parse_dt()
2011 ret = thp7312_map_data_lanes(&sensor->lane_remap, data_lanes, in thp7312_sensor_parse_dt()
2014 dev_err(dev, "Invalid sensor@%u data-lanes value\n", reg); in thp7312_sensor_parse_dt()
2018 return 0; in thp7312_sensor_parse_dt()
2026 struct device *dev = thp7312->dev; in thp7312_parse_dt()
2029 unsigned int num_sensors = 0; in thp7312_parse_dt()
2035 return dev_err_probe(dev, -EINVAL, "Endpoint node not found\n"); in thp7312_parse_dt()
2042 ret = thp7312_map_data_lanes(&thp7312->lane_remap, in thp7312_parse_dt()
2046 dev_err(dev, "Invalid data-lanes value\n"); in thp7312_parse_dt()
2051 * The thine,boot-mode property is optional and default to in thp7312_parse_dt()
2054 thp7312->boot_mode = THP7312_BOOT_MODE_SPI_MASTER; in thp7312_parse_dt()
2055 ret = device_property_read_u32(dev, "thine,boot-mode", in thp7312_parse_dt()
2056 &thp7312->boot_mode); in thp7312_parse_dt()
2057 if (ret && ret != -EINVAL) in thp7312_parse_dt()
2059 "thine,boot-mode"); in thp7312_parse_dt()
2061 if (thp7312->boot_mode != THP7312_BOOT_MODE_2WIRE_SLAVE && in thp7312_parse_dt()
2062 thp7312->boot_mode != THP7312_BOOT_MODE_SPI_MASTER) in thp7312_parse_dt()
2063 return dev_err_probe(dev, -EINVAL, "Invalid '%s' value %u\n", in thp7312_parse_dt()
2064 "thine,boot-mode", thp7312->boot_mode); in thp7312_parse_dt()
2070 return -EINVAL; in thp7312_parse_dt()
2084 return -EINVAL; in thp7312_parse_dt()
2087 return 0; in thp7312_parse_dt()
2092 struct device *dev = &client->dev; in thp7312_probe()
2098 return -ENOMEM; in thp7312_probe()
2100 thp7312->dev = dev; in thp7312_probe()
2102 thp7312->regmap = devm_cci_regmap_init_i2c(client, 16); in thp7312_probe()
2103 if (IS_ERR(thp7312->regmap)) in thp7312_probe()
2104 return dev_err_probe(dev, PTR_ERR(thp7312->regmap), in thp7312_probe()
2108 if (ret < 0) in thp7312_probe()
2115 thp7312->iclk = devm_clk_get(dev, NULL); in thp7312_probe()
2116 if (IS_ERR(thp7312->iclk)) in thp7312_probe()
2117 return dev_err_probe(dev, PTR_ERR(thp7312->iclk), in thp7312_probe()
2120 thp7312->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); in thp7312_probe()
2121 if (IS_ERR(thp7312->reset_gpio)) in thp7312_probe()
2122 return dev_err_probe(dev, PTR_ERR(thp7312->reset_gpio), in thp7312_probe()
2125 if (thp7312->boot_mode == THP7312_BOOT_MODE_2WIRE_SLAVE) in thp7312_probe()
2128 v4l2_i2c_subdev_init(&thp7312->sd, client, &thp7312_subdev_ops); in thp7312_probe()
2129 thp7312->sd.internal_ops = &thp7312_internal_ops; in thp7312_probe()
2130 thp7312->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS; in thp7312_probe()
2131 thp7312->pad.flags = MEDIA_PAD_FL_SOURCE; in thp7312_probe()
2132 thp7312->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; in thp7312_probe()
2134 ret = media_entity_pads_init(&thp7312->sd.entity, 1, &thp7312->pad); in thp7312_probe()
2148 if (ret < 0) { in thp7312_probe()
2159 thp7312->sd.ctrl_handler = &thp7312->ctrl_handler; in thp7312_probe()
2160 thp7312->sd.state_lock = thp7312->ctrl_handler.lock; in thp7312_probe()
2162 ret = v4l2_subdev_init_finalize(&thp7312->sd); in thp7312_probe()
2163 if (ret < 0) { in thp7312_probe()
2179 ret = v4l2_async_register_subdev(&thp7312->sd); in thp7312_probe()
2180 if (ret < 0) { in thp7312_probe()
2193 THP7312_FW_VERSION_MAJOR(thp7312->fw_version), in thp7312_probe()
2194 THP7312_FW_VERSION_MINOR(thp7312->fw_version)); in thp7312_probe()
2196 return 0; in thp7312_probe()
2201 v4l2_subdev_cleanup(&thp7312->sd); in thp7312_probe()
2203 v4l2_ctrl_handler_free(&thp7312->ctrl_handler); in thp7312_probe()
2207 media_entity_cleanup(&thp7312->sd.entity); in thp7312_probe()
2216 if (thp7312->boot_mode == THP7312_BOOT_MODE_2WIRE_SLAVE) { in thp7312_remove()
2217 firmware_upload_unregister(thp7312->fwl); in thp7312_remove()
2222 v4l2_async_unregister_subdev(&thp7312->sd); in thp7312_remove()
2223 v4l2_subdev_cleanup(&thp7312->sd); in thp7312_remove()
2224 media_entity_cleanup(&thp7312->sd.entity); in thp7312_remove()
2225 v4l2_ctrl_handler_free(&thp7312->ctrl_handler); in thp7312_remove()
2231 pm_runtime_disable(thp7312->dev); in thp7312_remove()
2232 if (!pm_runtime_status_suspended(thp7312->dev)) in thp7312_remove()
2234 pm_runtime_set_suspended(thp7312->dev); in thp7312_remove()