Lines Matching full:hdcp
241 #define HDMI_FLAGS_HDCP BIT(4) /* HDCP detected */
299 /* HDCP DE Control */
314 /* HDCP EP Filter Control */
437 #define INTERRUPT_HDCP BIT(6) /* HDCP module */
446 #define MASK_HDCP_MTP BIT(7) /* HDCP MTP busy */
447 #define MASK_HDCP_DLMTP BIT(4) /* HDCP end download MTP to SRAM */
448 #define MASK_HDCP_DLRAM BIT(3) /* HDCP end download keys from SRAM */
449 #define MASK_HDCP_ENC BIT(2) /* HDCP ENC */
450 #define MASK_STATE_C5 BIT(1) /* HDCP State C5 reached */
478 #define MASK_HDCP_DDC_SW BIT(2) /* HDCP DDC switching finished */
585 #define RESET_HDCP BIT(6) /* Reset HDCP module */
587 #define RESET_SCFG BIT(4) /* Reset HDCP and repeater function */
588 #define RESET_HCFG BIT(3) /* Reset HDCP DDC part */
594 #define NACK_HDCP BIT(7) /* No ACK on HDCP request */
602 #define HDCP_HDMI BIT(7) /* HDCP supports HDMI (vs DVI only) */
603 #define HDCP_REPEATER BIT(6) /* HDCP supports repeater function */
606 #define HDCP_11 BIT(1) /* HDCP 1.1 supported */