328 static int ov01a10_write_reg(struct ov01a10 *ov01a10, u16 reg, u16 len, u32 val)  in ov01a10_write_reg()  function
355 		ret = ov01a10_write_reg(ov01a10, r_list->regs[i].address, 1,  in ov01a10_write_reg_list()
374 	ret = ov01a10_write_reg(ov01a10, OV01A10_REG_DIGITAL_GAIN_B, 3, real);  in ov01a10_update_digital_gain()
380 	ret = ov01a10_write_reg(ov01a10, OV01A10_REG_DIGITAL_GAIN_GB, 3, real);  in ov01a10_update_digital_gain()
386 	ret = ov01a10_write_reg(ov01a10, OV01A10_REG_DIGITAL_GAIN_GR, 3, real);  in ov01a10_update_digital_gain()
392 	ret = ov01a10_write_reg(ov01a10, OV01A10_REG_DIGITAL_GAIN_R, 3, real);  in ov01a10_update_digital_gain()
406 	return ov01a10_write_reg(ov01a10, OV01A10_REG_TEST_PATTERN, 1, pattern);  in ov01a10_test_pattern()
416 	ret = ov01a10_write_reg(ov01a10, OV01A10_REG_X_WIN, 1, offset);  in ov01a10_set_hflip()
427 	return ov01a10_write_reg(ov01a10, OV01A10_REG_FORMAT1, 1, val);  in ov01a10_set_hflip()
436 	ret = ov01a10_write_reg(ov01a10, OV01A10_REG_Y_WIN, 1, offset);  in ov01a10_set_vflip()
447 	return ov01a10_write_reg(ov01a10, OV01A10_REG_FORMAT1, 1, val);  in ov01a10_set_vflip()
472 		ret = ov01a10_write_reg(ov01a10, OV01A10_REG_ANALOG_GAIN, 2,  in ov01a10_set_ctrl()
481 		ret = ov01a10_write_reg(ov01a10, OV01A10_REG_EXPOSURE, 2,  in ov01a10_set_ctrl()
486 		ret = ov01a10_write_reg(ov01a10, OV01A10_REG_VTS, 2,  in ov01a10_set_ctrl()
645 	ret = ov01a10_write_reg(ov01a10, OV01A10_REG_MODE_SELECT, 1,  in ov01a10_start_streaming()
658 	ret = ov01a10_write_reg(ov01a10, OV01A10_REG_MODE_SELECT, 1,  in ov01a10_stop_streaming()